/*
 *******************************************************************************
 *
 * Copyright (c) 2017 Advanced Micro Devices, Inc. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 ******************************************************************************/

#pragma once

#include "gfx9_plus_merged_registers.h"

typedef union ATC_ATS_CNTL                             regATC_ATS_CNTL;
typedef union ATC_ATS_DEFAULT_PAGE_LOW                 regATC_ATS_DEFAULT_PAGE_LOW;
typedef union ATC_ATS_FAULT_CNTL                       regATC_ATS_FAULT_CNTL;
typedef union ATC_ATS_FAULT_STATUS_ADDR                regATC_ATS_FAULT_STATUS_ADDR;
typedef union ATC_ATS_FAULT_STATUS_INFO                regATC_ATS_FAULT_STATUS_INFO;
typedef union ATC_ATS_FAULT_STATUS_INFO2               regATC_ATS_FAULT_STATUS_INFO2;
typedef union ATC_ATS_GFX_ATCL2_STATUS                 regATC_ATS_GFX_ATCL2_STATUS;
typedef union ATC_ATS_MMHUB_ATCL2_STATUS               regATC_ATS_MMHUB_ATCL2_STATUS;
typedef union ATC_ATS_SDPPORT_CNTL                     regATC_ATS_SDPPORT_CNTL;
typedef union ATC_ATS_STATUS                           regATC_ATS_STATUS;
typedef union ATC_ATS_VMID_SNAPSHOT_GFX_STAT           regATC_ATS_VMID_SNAPSHOT_GFX_STAT;
typedef union ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT         regATC_ATS_VMID_SNAPSHOT_MMHUB_STAT;
typedef union ATC_ATS_VMID_STATUS                      regATC_ATS_VMID_STATUS;
typedef union ATC_L2_CACHE_DATA0__GFX09                regATC_L2_CACHE_DATA0__GFX09;
typedef union ATC_L2_CACHE_DATA1__GFX09                regATC_L2_CACHE_DATA1__GFX09;
typedef union ATC_L2_CACHE_DATA2__GFX09                regATC_L2_CACHE_DATA2__GFX09;
typedef union ATC_L2_CGTT_CLK_CTRL__GFX09              regATC_L2_CGTT_CLK_CTRL__GFX09;
typedef union ATC_L2_CNTL__GFX09                       regATC_L2_CNTL__GFX09;
typedef union ATC_L2_CNTL2__GFX09                      regATC_L2_CNTL2__GFX09;
typedef union ATC_L2_CNTL3__GFX09                      regATC_L2_CNTL3__GFX09;
typedef union ATC_L2_DEBUG__GFX09                      regATC_L2_DEBUG__GFX09;
typedef union ATC_L2_MEM_POWER_LS__GFX09               regATC_L2_MEM_POWER_LS__GFX09;
typedef union ATC_L2_MISC_CG__GFX09                    regATC_L2_MISC_CG__GFX09;
typedef union ATC_L2_PERFCOUNTER0_CFG__GFX09           regATC_L2_PERFCOUNTER0_CFG__GFX09;
typedef union ATC_L2_PERFCOUNTER1_CFG__GFX09           regATC_L2_PERFCOUNTER1_CFG__GFX09;
typedef union ATC_L2_PERFCOUNTER_HI__GFX09             regATC_L2_PERFCOUNTER_HI__GFX09;
typedef union ATC_L2_PERFCOUNTER_LO__GFX09             regATC_L2_PERFCOUNTER_LO__GFX09;
typedef union ATC_L2_PERFCOUNTER_RSLT_CNTL__GFX09      regATC_L2_PERFCOUNTER_RSLT_CNTL__GFX09;
typedef union ATC_L2_STATUS__GFX09                     regATC_L2_STATUS__GFX09;
typedef union ATC_L2_STATUS2__GFX09                    regATC_L2_STATUS2__GFX09;
typedef union ATC_PERFCOUNTER0_CFG                     regATC_PERFCOUNTER0_CFG;
typedef union ATC_PERFCOUNTER1_CFG                     regATC_PERFCOUNTER1_CFG;
typedef union ATC_PERFCOUNTER2_CFG                     regATC_PERFCOUNTER2_CFG;
typedef union ATC_PERFCOUNTER3_CFG                     regATC_PERFCOUNTER3_CFG;
typedef union ATC_PERFCOUNTER_HI                       regATC_PERFCOUNTER_HI;
typedef union ATC_PERFCOUNTER_LO                       regATC_PERFCOUNTER_LO;
typedef union ATC_PERFCOUNTER_RSLT_CNTL                regATC_PERFCOUNTER_RSLT_CNTL;
typedef union ATC_TRANS_FAULT_RSPCNTRL                 regATC_TRANS_FAULT_RSPCNTRL;
typedef union ATC_VMID0_PASID_MAPPING                  regATC_VMID0_PASID_MAPPING;
typedef union ATC_VMID10_PASID_MAPPING                 regATC_VMID10_PASID_MAPPING;
typedef union ATC_VMID11_PASID_MAPPING                 regATC_VMID11_PASID_MAPPING;
typedef union ATC_VMID12_PASID_MAPPING                 regATC_VMID12_PASID_MAPPING;
typedef union ATC_VMID13_PASID_MAPPING                 regATC_VMID13_PASID_MAPPING;
typedef union ATC_VMID14_PASID_MAPPING                 regATC_VMID14_PASID_MAPPING;
typedef union ATC_VMID15_PASID_MAPPING                 regATC_VMID15_PASID_MAPPING;
typedef union ATC_VMID16_PASID_MAPPING                 regATC_VMID16_PASID_MAPPING;
typedef union ATC_VMID17_PASID_MAPPING                 regATC_VMID17_PASID_MAPPING;
typedef union ATC_VMID18_PASID_MAPPING                 regATC_VMID18_PASID_MAPPING;
typedef union ATC_VMID19_PASID_MAPPING                 regATC_VMID19_PASID_MAPPING;
typedef union ATC_VMID1_PASID_MAPPING                  regATC_VMID1_PASID_MAPPING;
typedef union ATC_VMID20_PASID_MAPPING                 regATC_VMID20_PASID_MAPPING;
typedef union ATC_VMID21_PASID_MAPPING                 regATC_VMID21_PASID_MAPPING;
typedef union ATC_VMID22_PASID_MAPPING                 regATC_VMID22_PASID_MAPPING;
typedef union ATC_VMID23_PASID_MAPPING                 regATC_VMID23_PASID_MAPPING;
typedef union ATC_VMID24_PASID_MAPPING                 regATC_VMID24_PASID_MAPPING;
typedef union ATC_VMID25_PASID_MAPPING                 regATC_VMID25_PASID_MAPPING;
typedef union ATC_VMID26_PASID_MAPPING                 regATC_VMID26_PASID_MAPPING;
typedef union ATC_VMID27_PASID_MAPPING                 regATC_VMID27_PASID_MAPPING;
typedef union ATC_VMID28_PASID_MAPPING                 regATC_VMID28_PASID_MAPPING;
typedef union ATC_VMID29_PASID_MAPPING                 regATC_VMID29_PASID_MAPPING;
typedef union ATC_VMID2_PASID_MAPPING                  regATC_VMID2_PASID_MAPPING;
typedef union ATC_VMID30_PASID_MAPPING                 regATC_VMID30_PASID_MAPPING;
typedef union ATC_VMID31_PASID_MAPPING                 regATC_VMID31_PASID_MAPPING;
typedef union ATC_VMID3_PASID_MAPPING                  regATC_VMID3_PASID_MAPPING;
typedef union ATC_VMID4_PASID_MAPPING                  regATC_VMID4_PASID_MAPPING;
typedef union ATC_VMID5_PASID_MAPPING                  regATC_VMID5_PASID_MAPPING;
typedef union ATC_VMID6_PASID_MAPPING                  regATC_VMID6_PASID_MAPPING;
typedef union ATC_VMID7_PASID_MAPPING                  regATC_VMID7_PASID_MAPPING;
typedef union ATC_VMID8_PASID_MAPPING                  regATC_VMID8_PASID_MAPPING;
typedef union ATC_VMID9_PASID_MAPPING                  regATC_VMID9_PASID_MAPPING;
typedef union ATC_VMID_PASID_MAPPING_UPDATE_STATUS     regATC_VMID_PASID_MAPPING_UPDATE_STATUS;
typedef union ATHUB_COMMAND                            regATHUB_COMMAND;
typedef union ATHUB_IH_CREDIT                          regATHUB_IH_CREDIT;
typedef union ATHUB_MEM_POWER_LS                       regATHUB_MEM_POWER_LS;
typedef union ATHUB_MISC_CNTL                          regATHUB_MISC_CNTL;
typedef union ATHUB_PCIE_ATS_CNTL                      regATHUB_PCIE_ATS_CNTL;
typedef union ATHUB_PCIE_ATS_CNTL_VF_0                 regATHUB_PCIE_ATS_CNTL_VF_0;
typedef union ATHUB_PCIE_ATS_CNTL_VF_1                 regATHUB_PCIE_ATS_CNTL_VF_1;
typedef union ATHUB_PCIE_ATS_CNTL_VF_10                regATHUB_PCIE_ATS_CNTL_VF_10;
typedef union ATHUB_PCIE_ATS_CNTL_VF_11                regATHUB_PCIE_ATS_CNTL_VF_11;
typedef union ATHUB_PCIE_ATS_CNTL_VF_12                regATHUB_PCIE_ATS_CNTL_VF_12;
typedef union ATHUB_PCIE_ATS_CNTL_VF_13                regATHUB_PCIE_ATS_CNTL_VF_13;
typedef union ATHUB_PCIE_ATS_CNTL_VF_14                regATHUB_PCIE_ATS_CNTL_VF_14;
typedef union ATHUB_PCIE_ATS_CNTL_VF_15                regATHUB_PCIE_ATS_CNTL_VF_15;
typedef union ATHUB_PCIE_ATS_CNTL_VF_2                 regATHUB_PCIE_ATS_CNTL_VF_2;
typedef union ATHUB_PCIE_ATS_CNTL_VF_3                 regATHUB_PCIE_ATS_CNTL_VF_3;
typedef union ATHUB_PCIE_ATS_CNTL_VF_4                 regATHUB_PCIE_ATS_CNTL_VF_4;
typedef union ATHUB_PCIE_ATS_CNTL_VF_5                 regATHUB_PCIE_ATS_CNTL_VF_5;
typedef union ATHUB_PCIE_ATS_CNTL_VF_6                 regATHUB_PCIE_ATS_CNTL_VF_6;
typedef union ATHUB_PCIE_ATS_CNTL_VF_7                 regATHUB_PCIE_ATS_CNTL_VF_7;
typedef union ATHUB_PCIE_ATS_CNTL_VF_8                 regATHUB_PCIE_ATS_CNTL_VF_8;
typedef union ATHUB_PCIE_ATS_CNTL_VF_9                 regATHUB_PCIE_ATS_CNTL_VF_9;
typedef union ATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC       regATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC;
typedef union ATHUB_PCIE_PAGE_REQ_CNTL                 regATHUB_PCIE_PAGE_REQ_CNTL;
typedef union ATHUB_PCIE_PASID_CNTL                    regATHUB_PCIE_PASID_CNTL;
typedef union ATHUB_SHARED_ACTIVE_FCN_ID               regATHUB_SHARED_ACTIVE_FCN_ID;
typedef union ATHUB_SHARED_VIRT_RESET_REQ              regATHUB_SHARED_VIRT_RESET_REQ;
typedef union ATS_IH_CREDIT                            regATS_IH_CREDIT;
typedef union BCI_DEBUG_READ                           regBCI_DEBUG_READ;
typedef union CB_BLEND0_CONTROL                        regCB_BLEND0_CONTROL;
typedef union CB_BLEND1_CONTROL                        regCB_BLEND1_CONTROL;
typedef union CB_BLEND2_CONTROL                        regCB_BLEND2_CONTROL;
typedef union CB_BLEND3_CONTROL                        regCB_BLEND3_CONTROL;
typedef union CB_BLEND4_CONTROL                        regCB_BLEND4_CONTROL;
typedef union CB_BLEND5_CONTROL                        regCB_BLEND5_CONTROL;
typedef union CB_BLEND6_CONTROL                        regCB_BLEND6_CONTROL;
typedef union CB_BLEND7_CONTROL                        regCB_BLEND7_CONTROL;
typedef union CB_BLEND_ALPHA                           regCB_BLEND_ALPHA;
typedef union CB_BLEND_BLUE                            regCB_BLEND_BLUE;
typedef union CB_BLEND_GREEN                           regCB_BLEND_GREEN;
typedef union CB_BLEND_RED                             regCB_BLEND_RED;
typedef union CB_CGTT_SCLK_CTRL                        regCB_CGTT_SCLK_CTRL;
typedef union CB_COLOR0_ATTRIB__GFX09                  regCB_COLOR0_ATTRIB__GFX09;
typedef union CB_COLOR0_ATTRIB2                        regCB_COLOR0_ATTRIB2;
typedef union CB_COLOR0_BASE                           regCB_COLOR0_BASE;
typedef union CB_COLOR0_BASE_EXT                       regCB_COLOR0_BASE_EXT;
typedef union CB_COLOR0_CLEAR_WORD0                    regCB_COLOR0_CLEAR_WORD0;
typedef union CB_COLOR0_CLEAR_WORD1                    regCB_COLOR0_CLEAR_WORD1;
typedef union CB_COLOR0_CMASK                          regCB_COLOR0_CMASK;
typedef union CB_COLOR0_CMASK_BASE_EXT                 regCB_COLOR0_CMASK_BASE_EXT;
typedef union CB_COLOR0_DCC_BASE                       regCB_COLOR0_DCC_BASE;
typedef union CB_COLOR0_DCC_BASE_EXT                   regCB_COLOR0_DCC_BASE_EXT;
typedef union CB_COLOR0_DCC_CONTROL                    regCB_COLOR0_DCC_CONTROL;
typedef union CB_COLOR0_FMASK                          regCB_COLOR0_FMASK;
typedef union CB_COLOR0_FMASK_BASE_EXT                 regCB_COLOR0_FMASK_BASE_EXT;
typedef union CB_COLOR0_INFO                           regCB_COLOR0_INFO;
typedef union CB_COLOR0_VIEW__GFX09                    regCB_COLOR0_VIEW__GFX09;
typedef union CB_COLOR1_ATTRIB__GFX09                  regCB_COLOR1_ATTRIB__GFX09;
typedef union CB_COLOR1_ATTRIB2                        regCB_COLOR1_ATTRIB2;
typedef union CB_COLOR1_BASE                           regCB_COLOR1_BASE;
typedef union CB_COLOR1_BASE_EXT                       regCB_COLOR1_BASE_EXT;
typedef union CB_COLOR1_CLEAR_WORD0                    regCB_COLOR1_CLEAR_WORD0;
typedef union CB_COLOR1_CLEAR_WORD1                    regCB_COLOR1_CLEAR_WORD1;
typedef union CB_COLOR1_CMASK                          regCB_COLOR1_CMASK;
typedef union CB_COLOR1_CMASK_BASE_EXT                 regCB_COLOR1_CMASK_BASE_EXT;
typedef union CB_COLOR1_DCC_BASE                       regCB_COLOR1_DCC_BASE;
typedef union CB_COLOR1_DCC_BASE_EXT                   regCB_COLOR1_DCC_BASE_EXT;
typedef union CB_COLOR1_DCC_CONTROL                    regCB_COLOR1_DCC_CONTROL;
typedef union CB_COLOR1_FMASK                          regCB_COLOR1_FMASK;
typedef union CB_COLOR1_FMASK_BASE_EXT                 regCB_COLOR1_FMASK_BASE_EXT;
typedef union CB_COLOR1_INFO                           regCB_COLOR1_INFO;
typedef union CB_COLOR1_VIEW__GFX09                    regCB_COLOR1_VIEW__GFX09;
typedef union CB_COLOR2_ATTRIB__GFX09                  regCB_COLOR2_ATTRIB__GFX09;
typedef union CB_COLOR2_ATTRIB2                        regCB_COLOR2_ATTRIB2;
typedef union CB_COLOR2_BASE                           regCB_COLOR2_BASE;
typedef union CB_COLOR2_BASE_EXT                       regCB_COLOR2_BASE_EXT;
typedef union CB_COLOR2_CLEAR_WORD0                    regCB_COLOR2_CLEAR_WORD0;
typedef union CB_COLOR2_CLEAR_WORD1                    regCB_COLOR2_CLEAR_WORD1;
typedef union CB_COLOR2_CMASK                          regCB_COLOR2_CMASK;
typedef union CB_COLOR2_CMASK_BASE_EXT                 regCB_COLOR2_CMASK_BASE_EXT;
typedef union CB_COLOR2_DCC_BASE                       regCB_COLOR2_DCC_BASE;
typedef union CB_COLOR2_DCC_BASE_EXT                   regCB_COLOR2_DCC_BASE_EXT;
typedef union CB_COLOR2_DCC_CONTROL                    regCB_COLOR2_DCC_CONTROL;
typedef union CB_COLOR2_FMASK                          regCB_COLOR2_FMASK;
typedef union CB_COLOR2_FMASK_BASE_EXT                 regCB_COLOR2_FMASK_BASE_EXT;
typedef union CB_COLOR2_INFO                           regCB_COLOR2_INFO;
typedef union CB_COLOR2_VIEW__GFX09                    regCB_COLOR2_VIEW__GFX09;
typedef union CB_COLOR3_ATTRIB__GFX09                  regCB_COLOR3_ATTRIB__GFX09;
typedef union CB_COLOR3_ATTRIB2                        regCB_COLOR3_ATTRIB2;
typedef union CB_COLOR3_BASE                           regCB_COLOR3_BASE;
typedef union CB_COLOR3_BASE_EXT                       regCB_COLOR3_BASE_EXT;
typedef union CB_COLOR3_CLEAR_WORD0                    regCB_COLOR3_CLEAR_WORD0;
typedef union CB_COLOR3_CLEAR_WORD1                    regCB_COLOR3_CLEAR_WORD1;
typedef union CB_COLOR3_CMASK                          regCB_COLOR3_CMASK;
typedef union CB_COLOR3_CMASK_BASE_EXT                 regCB_COLOR3_CMASK_BASE_EXT;
typedef union CB_COLOR3_DCC_BASE                       regCB_COLOR3_DCC_BASE;
typedef union CB_COLOR3_DCC_BASE_EXT                   regCB_COLOR3_DCC_BASE_EXT;
typedef union CB_COLOR3_DCC_CONTROL                    regCB_COLOR3_DCC_CONTROL;
typedef union CB_COLOR3_FMASK                          regCB_COLOR3_FMASK;
typedef union CB_COLOR3_FMASK_BASE_EXT                 regCB_COLOR3_FMASK_BASE_EXT;
typedef union CB_COLOR3_INFO                           regCB_COLOR3_INFO;
typedef union CB_COLOR3_VIEW__GFX09                    regCB_COLOR3_VIEW__GFX09;
typedef union CB_COLOR4_ATTRIB__GFX09                  regCB_COLOR4_ATTRIB__GFX09;
typedef union CB_COLOR4_ATTRIB2                        regCB_COLOR4_ATTRIB2;
typedef union CB_COLOR4_BASE                           regCB_COLOR4_BASE;
typedef union CB_COLOR4_BASE_EXT                       regCB_COLOR4_BASE_EXT;
typedef union CB_COLOR4_CLEAR_WORD0                    regCB_COLOR4_CLEAR_WORD0;
typedef union CB_COLOR4_CLEAR_WORD1                    regCB_COLOR4_CLEAR_WORD1;
typedef union CB_COLOR4_CMASK                          regCB_COLOR4_CMASK;
typedef union CB_COLOR4_CMASK_BASE_EXT                 regCB_COLOR4_CMASK_BASE_EXT;
typedef union CB_COLOR4_DCC_BASE                       regCB_COLOR4_DCC_BASE;
typedef union CB_COLOR4_DCC_BASE_EXT                   regCB_COLOR4_DCC_BASE_EXT;
typedef union CB_COLOR4_DCC_CONTROL                    regCB_COLOR4_DCC_CONTROL;
typedef union CB_COLOR4_FMASK                          regCB_COLOR4_FMASK;
typedef union CB_COLOR4_FMASK_BASE_EXT                 regCB_COLOR4_FMASK_BASE_EXT;
typedef union CB_COLOR4_INFO                           regCB_COLOR4_INFO;
typedef union CB_COLOR4_VIEW__GFX09                    regCB_COLOR4_VIEW__GFX09;
typedef union CB_COLOR5_ATTRIB__GFX09                  regCB_COLOR5_ATTRIB__GFX09;
typedef union CB_COLOR5_ATTRIB2                        regCB_COLOR5_ATTRIB2;
typedef union CB_COLOR5_BASE                           regCB_COLOR5_BASE;
typedef union CB_COLOR5_BASE_EXT                       regCB_COLOR5_BASE_EXT;
typedef union CB_COLOR5_CLEAR_WORD0                    regCB_COLOR5_CLEAR_WORD0;
typedef union CB_COLOR5_CLEAR_WORD1                    regCB_COLOR5_CLEAR_WORD1;
typedef union CB_COLOR5_CMASK                          regCB_COLOR5_CMASK;
typedef union CB_COLOR5_CMASK_BASE_EXT                 regCB_COLOR5_CMASK_BASE_EXT;
typedef union CB_COLOR5_DCC_BASE                       regCB_COLOR5_DCC_BASE;
typedef union CB_COLOR5_DCC_BASE_EXT                   regCB_COLOR5_DCC_BASE_EXT;
typedef union CB_COLOR5_DCC_CONTROL                    regCB_COLOR5_DCC_CONTROL;
typedef union CB_COLOR5_FMASK                          regCB_COLOR5_FMASK;
typedef union CB_COLOR5_FMASK_BASE_EXT                 regCB_COLOR5_FMASK_BASE_EXT;
typedef union CB_COLOR5_INFO                           regCB_COLOR5_INFO;
typedef union CB_COLOR5_VIEW__GFX09                    regCB_COLOR5_VIEW__GFX09;
typedef union CB_COLOR6_ATTRIB__GFX09                  regCB_COLOR6_ATTRIB__GFX09;
typedef union CB_COLOR6_ATTRIB2                        regCB_COLOR6_ATTRIB2;
typedef union CB_COLOR6_BASE                           regCB_COLOR6_BASE;
typedef union CB_COLOR6_BASE_EXT                       regCB_COLOR6_BASE_EXT;
typedef union CB_COLOR6_CLEAR_WORD0                    regCB_COLOR6_CLEAR_WORD0;
typedef union CB_COLOR6_CLEAR_WORD1                    regCB_COLOR6_CLEAR_WORD1;
typedef union CB_COLOR6_CMASK                          regCB_COLOR6_CMASK;
typedef union CB_COLOR6_CMASK_BASE_EXT                 regCB_COLOR6_CMASK_BASE_EXT;
typedef union CB_COLOR6_DCC_BASE                       regCB_COLOR6_DCC_BASE;
typedef union CB_COLOR6_DCC_BASE_EXT                   regCB_COLOR6_DCC_BASE_EXT;
typedef union CB_COLOR6_DCC_CONTROL                    regCB_COLOR6_DCC_CONTROL;
typedef union CB_COLOR6_FMASK                          regCB_COLOR6_FMASK;
typedef union CB_COLOR6_FMASK_BASE_EXT                 regCB_COLOR6_FMASK_BASE_EXT;
typedef union CB_COLOR6_INFO                           regCB_COLOR6_INFO;
typedef union CB_COLOR6_VIEW__GFX09                    regCB_COLOR6_VIEW__GFX09;
typedef union CB_COLOR7_ATTRIB__GFX09                  regCB_COLOR7_ATTRIB__GFX09;
typedef union CB_COLOR7_ATTRIB2                        regCB_COLOR7_ATTRIB2;
typedef union CB_COLOR7_BASE                           regCB_COLOR7_BASE;
typedef union CB_COLOR7_BASE_EXT                       regCB_COLOR7_BASE_EXT;
typedef union CB_COLOR7_CLEAR_WORD0                    regCB_COLOR7_CLEAR_WORD0;
typedef union CB_COLOR7_CLEAR_WORD1                    regCB_COLOR7_CLEAR_WORD1;
typedef union CB_COLOR7_CMASK                          regCB_COLOR7_CMASK;
typedef union CB_COLOR7_CMASK_BASE_EXT                 regCB_COLOR7_CMASK_BASE_EXT;
typedef union CB_COLOR7_DCC_BASE                       regCB_COLOR7_DCC_BASE;
typedef union CB_COLOR7_DCC_BASE_EXT                   regCB_COLOR7_DCC_BASE_EXT;
typedef union CB_COLOR7_DCC_CONTROL                    regCB_COLOR7_DCC_CONTROL;
typedef union CB_COLOR7_FMASK                          regCB_COLOR7_FMASK;
typedef union CB_COLOR7_FMASK_BASE_EXT                 regCB_COLOR7_FMASK_BASE_EXT;
typedef union CB_COLOR7_INFO                           regCB_COLOR7_INFO;
typedef union CB_COLOR7_VIEW__GFX09                    regCB_COLOR7_VIEW__GFX09;
typedef union CB_COLOR_CONTROL                         regCB_COLOR_CONTROL;
typedef union CB_DCC_CONFIG__GFX09                     regCB_DCC_CONFIG__GFX09;
typedef union CB_DCC_CONTROL                           regCB_DCC_CONTROL;
typedef union CB_DEBUG_BUS_19                          regCB_DEBUG_BUS_19;
typedef union CB_DEBUG_BUS_21                          regCB_DEBUG_BUS_21;
typedef union CB_HW_CONTROL__GFX09                     regCB_HW_CONTROL__GFX09;
typedef union CB_HW_CONTROL_1                          regCB_HW_CONTROL_1;
typedef union CB_HW_CONTROL_2__GFX09                   regCB_HW_CONTROL_2__GFX09;
typedef union CB_HW_CONTROL_3                          regCB_HW_CONTROL_3;
typedef union CB_HW_MEM_ARBITER_RD                     regCB_HW_MEM_ARBITER_RD;
typedef union CB_HW_MEM_ARBITER_WR                     regCB_HW_MEM_ARBITER_WR;
typedef union CB_MRT0_EPITCH__GFX09                    regCB_MRT0_EPITCH__GFX09;
typedef union CB_MRT1_EPITCH__GFX09                    regCB_MRT1_EPITCH__GFX09;
typedef union CB_MRT2_EPITCH__GFX09                    regCB_MRT2_EPITCH__GFX09;
typedef union CB_MRT3_EPITCH__GFX09                    regCB_MRT3_EPITCH__GFX09;
typedef union CB_MRT4_EPITCH__GFX09                    regCB_MRT4_EPITCH__GFX09;
typedef union CB_MRT5_EPITCH__GFX09                    regCB_MRT5_EPITCH__GFX09;
typedef union CB_MRT6_EPITCH__GFX09                    regCB_MRT6_EPITCH__GFX09;
typedef union CB_MRT7_EPITCH__GFX09                    regCB_MRT7_EPITCH__GFX09;
typedef union CB_PERFCOUNTER0_HI                       regCB_PERFCOUNTER0_HI;
typedef union CB_PERFCOUNTER0_LO                       regCB_PERFCOUNTER0_LO;
typedef union CB_PERFCOUNTER0_SELECT                   regCB_PERFCOUNTER0_SELECT;
typedef union CB_PERFCOUNTER0_SELECT1                  regCB_PERFCOUNTER0_SELECT1;
typedef union CB_PERFCOUNTER1_HI                       regCB_PERFCOUNTER1_HI;
typedef union CB_PERFCOUNTER1_LO                       regCB_PERFCOUNTER1_LO;
typedef union CB_PERFCOUNTER1_SELECT                   regCB_PERFCOUNTER1_SELECT;
typedef union CB_PERFCOUNTER2_HI                       regCB_PERFCOUNTER2_HI;
typedef union CB_PERFCOUNTER2_LO                       regCB_PERFCOUNTER2_LO;
typedef union CB_PERFCOUNTER2_SELECT                   regCB_PERFCOUNTER2_SELECT;
typedef union CB_PERFCOUNTER3_HI                       regCB_PERFCOUNTER3_HI;
typedef union CB_PERFCOUNTER3_LO                       regCB_PERFCOUNTER3_LO;
typedef union CB_PERFCOUNTER3_SELECT                   regCB_PERFCOUNTER3_SELECT;
typedef union CB_PERFCOUNTER_FILTER                    regCB_PERFCOUNTER_FILTER;
typedef union CB_SHADER_MASK                           regCB_SHADER_MASK;
typedef union CB_TARGET_MASK                           regCB_TARGET_MASK;
typedef union CC_GC_EDC_CONFIG                         regCC_GC_EDC_CONFIG;
typedef union CC_GC_PRIM_CONFIG                        regCC_GC_PRIM_CONFIG;
typedef union CC_GC_SHADER_ARRAY_CONFIG__GFX09         regCC_GC_SHADER_ARRAY_CONFIG__GFX09;
typedef union CC_GC_SHADER_RATE_CONFIG                 regCC_GC_SHADER_RATE_CONFIG;
typedef union CC_RB_BACKEND_DISABLE                    regCC_RB_BACKEND_DISABLE;
typedef union CC_RB_DAISY_CHAIN                        regCC_RB_DAISY_CHAIN;
typedef union CC_RB_REDUNDANCY                         regCC_RB_REDUNDANCY;
typedef union CGTS_CU0_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU0_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU0_SP0_CTRL_REG__GFX09             regCGTS_CU0_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU0_SP1_CTRL_REG__GFX09             regCGTS_CU0_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU0_TA_SQC_CTRL_REG__GFX09          regCGTS_CU0_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU0_TCPI_CTRL_REG__GFX09            regCGTS_CU0_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU0_TD_TCP_CTRL_REG__GFX09          regCGTS_CU0_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU10_LDS_SQ_CTRL_REG__GFX09         regCGTS_CU10_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU10_SP0_CTRL_REG__GFX09            regCGTS_CU10_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU10_SP1_CTRL_REG__GFX09            regCGTS_CU10_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU10_TA_SQC_CTRL_REG__GFX09         regCGTS_CU10_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU10_TCPI_CTRL_REG__GFX09           regCGTS_CU10_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU10_TD_TCP_CTRL_REG__GFX09         regCGTS_CU10_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU11_LDS_SQ_CTRL_REG__GFX09         regCGTS_CU11_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU11_SP0_CTRL_REG__GFX09            regCGTS_CU11_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU11_SP1_CTRL_REG__GFX09            regCGTS_CU11_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU11_TA_SQC_CTRL_REG__GFX09         regCGTS_CU11_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU11_TCPI_CTRL_REG__GFX09           regCGTS_CU11_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU11_TD_TCP_CTRL_REG__GFX09         regCGTS_CU11_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU12_LDS_SQ_CTRL_REG__GFX09         regCGTS_CU12_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU12_SP0_CTRL_REG__GFX09            regCGTS_CU12_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU12_SP1_CTRL_REG__GFX09            regCGTS_CU12_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU12_TA_SQC_CTRL_REG__GFX09         regCGTS_CU12_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU12_TCPI_CTRL_REG__GFX09           regCGTS_CU12_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU12_TD_TCP_CTRL_REG__GFX09         regCGTS_CU12_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU13_LDS_SQ_CTRL_REG__GFX09         regCGTS_CU13_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU13_SP0_CTRL_REG__GFX09            regCGTS_CU13_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU13_SP1_CTRL_REG__GFX09            regCGTS_CU13_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU13_TA_SQC_CTRL_REG__GFX09         regCGTS_CU13_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU13_TCPI_CTRL_REG__GFX09           regCGTS_CU13_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU13_TD_TCP_CTRL_REG__GFX09         regCGTS_CU13_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU14_LDS_SQ_CTRL_REG__GFX09         regCGTS_CU14_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU14_SP0_CTRL_REG__GFX09            regCGTS_CU14_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU14_SP1_CTRL_REG__GFX09            regCGTS_CU14_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU14_TA_SQC_CTRL_REG__GFX09         regCGTS_CU14_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU14_TCPI_CTRL_REG__GFX09           regCGTS_CU14_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU14_TD_TCP_CTRL_REG__GFX09         regCGTS_CU14_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU15_LDS_SQ_CTRL_REG__GFX09         regCGTS_CU15_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU15_SP0_CTRL_REG__GFX09            regCGTS_CU15_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU15_SP1_CTRL_REG__GFX09            regCGTS_CU15_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU15_TA_SQC_CTRL_REG__GFX09         regCGTS_CU15_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU15_TCPI_CTRL_REG__GFX09           regCGTS_CU15_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU15_TD_TCP_CTRL_REG__GFX09         regCGTS_CU15_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU1_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU1_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU1_SP0_CTRL_REG__GFX09             regCGTS_CU1_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU1_SP1_CTRL_REG__GFX09             regCGTS_CU1_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU1_TA_SQC_CTRL_REG__GFX09          regCGTS_CU1_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU1_TCPI_CTRL_REG__GFX09            regCGTS_CU1_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU1_TD_TCP_CTRL_REG__GFX09          regCGTS_CU1_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU2_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU2_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU2_SP0_CTRL_REG__GFX09             regCGTS_CU2_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU2_SP1_CTRL_REG__GFX09             regCGTS_CU2_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU2_TA_SQC_CTRL_REG__GFX09          regCGTS_CU2_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU2_TCPI_CTRL_REG__GFX09            regCGTS_CU2_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU2_TD_TCP_CTRL_REG__GFX09          regCGTS_CU2_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU3_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU3_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU3_SP0_CTRL_REG__GFX09             regCGTS_CU3_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU3_SP1_CTRL_REG__GFX09             regCGTS_CU3_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU3_TA_SQC_CTRL_REG__GFX09          regCGTS_CU3_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU3_TCPI_CTRL_REG__GFX09            regCGTS_CU3_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU3_TD_TCP_CTRL_REG__GFX09          regCGTS_CU3_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU4_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU4_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU4_SP0_CTRL_REG__GFX09             regCGTS_CU4_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU4_SP1_CTRL_REG__GFX09             regCGTS_CU4_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU4_TA_SQC_CTRL_REG__GFX09          regCGTS_CU4_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU4_TCPI_CTRL_REG__GFX09            regCGTS_CU4_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU4_TD_TCP_CTRL_REG__GFX09          regCGTS_CU4_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU5_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU5_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU5_SP0_CTRL_REG__GFX09             regCGTS_CU5_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU5_SP1_CTRL_REG__GFX09             regCGTS_CU5_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU5_TA_SQC_CTRL_REG__GFX09          regCGTS_CU5_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU5_TCPI_CTRL_REG__GFX09            regCGTS_CU5_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU5_TD_TCP_CTRL_REG__GFX09          regCGTS_CU5_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU6_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU6_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU6_SP0_CTRL_REG__GFX09             regCGTS_CU6_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU6_SP1_CTRL_REG__GFX09             regCGTS_CU6_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU6_TA_SQC_CTRL_REG__GFX09          regCGTS_CU6_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU6_TCPI_CTRL_REG__GFX09            regCGTS_CU6_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU6_TD_TCP_CTRL_REG__GFX09          regCGTS_CU6_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU7_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU7_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU7_SP0_CTRL_REG__GFX09             regCGTS_CU7_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU7_SP1_CTRL_REG__GFX09             regCGTS_CU7_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU7_TA_SQC_CTRL_REG__GFX09          regCGTS_CU7_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU7_TCPI_CTRL_REG__GFX09            regCGTS_CU7_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU7_TD_TCP_CTRL_REG__GFX09          regCGTS_CU7_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU8_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU8_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU8_SP0_CTRL_REG__GFX09             regCGTS_CU8_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU8_SP1_CTRL_REG__GFX09             regCGTS_CU8_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU8_TA_SQC_CTRL_REG__GFX09          regCGTS_CU8_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU8_TCPI_CTRL_REG__GFX09            regCGTS_CU8_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU8_TD_TCP_CTRL_REG__GFX09          regCGTS_CU8_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_CU9_LDS_SQ_CTRL_REG__GFX09          regCGTS_CU9_LDS_SQ_CTRL_REG__GFX09;
typedef union CGTS_CU9_SP0_CTRL_REG__GFX09             regCGTS_CU9_SP0_CTRL_REG__GFX09;
typedef union CGTS_CU9_SP1_CTRL_REG__GFX09             regCGTS_CU9_SP1_CTRL_REG__GFX09;
typedef union CGTS_CU9_TA_SQC_CTRL_REG__GFX09          regCGTS_CU9_TA_SQC_CTRL_REG__GFX09;
typedef union CGTS_CU9_TCPI_CTRL_REG__GFX09            regCGTS_CU9_TCPI_CTRL_REG__GFX09;
typedef union CGTS_CU9_TD_TCP_CTRL_REG__GFX09          regCGTS_CU9_TD_TCP_CTRL_REG__GFX09;
typedef union CGTS_RD_CTRL_REG__GFX09                  regCGTS_RD_CTRL_REG__GFX09;
typedef union CGTS_RD_REG                              regCGTS_RD_REG;
typedef union CGTS_SM_CTRL_REG__GFX09                  regCGTS_SM_CTRL_REG__GFX09;
typedef union CGTS_TCC_DISABLE                         regCGTS_TCC_DISABLE;
typedef union CGTS_USER_TCC_DISABLE                    regCGTS_USER_TCC_DISABLE;
typedef union CGTT_BCI_CLK_CTRL                        regCGTT_BCI_CLK_CTRL;
typedef union CGTT_CPC_CLK_CTRL                        regCGTT_CPC_CLK_CTRL;
typedef union CGTT_CPF_CLK_CTRL__GFX09                 regCGTT_CPF_CLK_CTRL__GFX09;
typedef union CGTT_CP_CLK_CTRL                         regCGTT_CP_CLK_CTRL;
typedef union CGTT_GDS_CLK_CTRL                        regCGTT_GDS_CLK_CTRL;
typedef union CGTT_IA_CLK_CTRL                         regCGTT_IA_CLK_CTRL;
typedef union CGTT_PA_CLK_CTRL                         regCGTT_PA_CLK_CTRL;
typedef union CGTT_PC_CLK_CTRL                         regCGTT_PC_CLK_CTRL;
typedef union CGTT_RLC_CLK_CTRL                        regCGTT_RLC_CLK_CTRL;
typedef union CGTT_ROM_CLK_CTRL0                       regCGTT_ROM_CLK_CTRL0;
typedef union CGTT_SC_CLK_CTRL0                        regCGTT_SC_CLK_CTRL0;
typedef union CGTT_SC_CLK_CTRL1                        regCGTT_SC_CLK_CTRL1;
typedef union CGTT_SPI_CLK_CTRL__GFX09                 regCGTT_SPI_CLK_CTRL__GFX09;
typedef union CGTT_SQG_CLK_CTRL                        regCGTT_SQG_CLK_CTRL;
typedef union CGTT_SQ_CLK_CTRL                         regCGTT_SQ_CLK_CTRL;
typedef union CGTT_SX_CLK_CTRL0                        regCGTT_SX_CLK_CTRL0;
typedef union CGTT_SX_CLK_CTRL1                        regCGTT_SX_CLK_CTRL1;
typedef union CGTT_SX_CLK_CTRL2                        regCGTT_SX_CLK_CTRL2;
typedef union CGTT_SX_CLK_CTRL3                        regCGTT_SX_CLK_CTRL3;
typedef union CGTT_SX_CLK_CTRL4                        regCGTT_SX_CLK_CTRL4;
typedef union CGTT_TCI_CLK_CTRL                        regCGTT_TCI_CLK_CTRL;
typedef union CGTT_TCPF_CLK_CTRL                       regCGTT_TCPF_CLK_CTRL;
typedef union CGTT_TCPI_CLK_CTRL                       regCGTT_TCPI_CLK_CTRL;
typedef union CGTT_VGT_CLK_CTRL                        regCGTT_VGT_CLK_CTRL;
typedef union CGTT_WD_CLK_CTRL                         regCGTT_WD_CLK_CTRL;
typedef union COHER_DEST_BASE_0                        regCOHER_DEST_BASE_0;
typedef union COHER_DEST_BASE_1                        regCOHER_DEST_BASE_1;
typedef union COHER_DEST_BASE_2                        regCOHER_DEST_BASE_2;
typedef union COHER_DEST_BASE_3                        regCOHER_DEST_BASE_3;
typedef union COHER_DEST_BASE_HI_0                     regCOHER_DEST_BASE_HI_0;
typedef union COHER_DEST_BASE_HI_1                     regCOHER_DEST_BASE_HI_1;
typedef union COHER_DEST_BASE_HI_2                     regCOHER_DEST_BASE_HI_2;
typedef union COHER_DEST_BASE_HI_3                     regCOHER_DEST_BASE_HI_3;
typedef union COMPUTE_DIM_X                            regCOMPUTE_DIM_X;
typedef union COMPUTE_DIM_Y                            regCOMPUTE_DIM_Y;
typedef union COMPUTE_DIM_Z                            regCOMPUTE_DIM_Z;
typedef union COMPUTE_DISPATCH_ID                      regCOMPUTE_DISPATCH_ID;
typedef union COMPUTE_DISPATCH_INITIATOR               regCOMPUTE_DISPATCH_INITIATOR;
typedef union COMPUTE_DISPATCH_PKT_ADDR_HI             regCOMPUTE_DISPATCH_PKT_ADDR_HI;
typedef union COMPUTE_DISPATCH_PKT_ADDR_LO             regCOMPUTE_DISPATCH_PKT_ADDR_LO;
typedef union COMPUTE_DISPATCH_SCRATCH_BASE_HI         regCOMPUTE_DISPATCH_SCRATCH_BASE_HI;
typedef union COMPUTE_DISPATCH_SCRATCH_BASE_LO         regCOMPUTE_DISPATCH_SCRATCH_BASE_LO;
typedef union COMPUTE_MISC_RESERVED                    regCOMPUTE_MISC_RESERVED;
typedef union COMPUTE_NOWHERE                          regCOMPUTE_NOWHERE;
typedef union COMPUTE_NUM_THREAD_X                     regCOMPUTE_NUM_THREAD_X;
typedef union COMPUTE_NUM_THREAD_Y                     regCOMPUTE_NUM_THREAD_Y;
typedef union COMPUTE_NUM_THREAD_Z                     regCOMPUTE_NUM_THREAD_Z;
typedef union COMPUTE_PERFCOUNT_ENABLE                 regCOMPUTE_PERFCOUNT_ENABLE;
typedef union COMPUTE_PGM_HI                           regCOMPUTE_PGM_HI;
typedef union COMPUTE_PGM_LO                           regCOMPUTE_PGM_LO;
typedef union COMPUTE_PGM_RSRC1                        regCOMPUTE_PGM_RSRC1;
typedef union COMPUTE_PGM_RSRC2                        regCOMPUTE_PGM_RSRC2;
typedef union COMPUTE_PIPELINESTAT_ENABLE              regCOMPUTE_PIPELINESTAT_ENABLE;
typedef union COMPUTE_RELAUNCH                         regCOMPUTE_RELAUNCH;
typedef union COMPUTE_RESOURCE_LIMITS                  regCOMPUTE_RESOURCE_LIMITS;
typedef union COMPUTE_RESTART_X                        regCOMPUTE_RESTART_X;
typedef union COMPUTE_RESTART_Y                        regCOMPUTE_RESTART_Y;
typedef union COMPUTE_RESTART_Z                        regCOMPUTE_RESTART_Z;
typedef union COMPUTE_START_X                          regCOMPUTE_START_X;
typedef union COMPUTE_START_Y                          regCOMPUTE_START_Y;
typedef union COMPUTE_START_Z                          regCOMPUTE_START_Z;
typedef union COMPUTE_STATIC_THREAD_MGMT_SE0__GFX09    regCOMPUTE_STATIC_THREAD_MGMT_SE0__GFX09;
typedef union COMPUTE_STATIC_THREAD_MGMT_SE1__GFX09    regCOMPUTE_STATIC_THREAD_MGMT_SE1__GFX09;
typedef union COMPUTE_STATIC_THREAD_MGMT_SE2__GFX09    regCOMPUTE_STATIC_THREAD_MGMT_SE2__GFX09;
typedef union COMPUTE_STATIC_THREAD_MGMT_SE3__GFX09    regCOMPUTE_STATIC_THREAD_MGMT_SE3__GFX09;
typedef union COMPUTE_THREADGROUP_ID                   regCOMPUTE_THREADGROUP_ID;
typedef union COMPUTE_THREAD_TRACE_ENABLE              regCOMPUTE_THREAD_TRACE_ENABLE;
typedef union COMPUTE_TMPRING_SIZE                     regCOMPUTE_TMPRING_SIZE;
typedef union COMPUTE_USER_DATA_0                      regCOMPUTE_USER_DATA_0;
typedef union COMPUTE_USER_DATA_1                      regCOMPUTE_USER_DATA_1;
typedef union COMPUTE_USER_DATA_10                     regCOMPUTE_USER_DATA_10;
typedef union COMPUTE_USER_DATA_11                     regCOMPUTE_USER_DATA_11;
typedef union COMPUTE_USER_DATA_12                     regCOMPUTE_USER_DATA_12;
typedef union COMPUTE_USER_DATA_13                     regCOMPUTE_USER_DATA_13;
typedef union COMPUTE_USER_DATA_14                     regCOMPUTE_USER_DATA_14;
typedef union COMPUTE_USER_DATA_15                     regCOMPUTE_USER_DATA_15;
typedef union COMPUTE_USER_DATA_2                      regCOMPUTE_USER_DATA_2;
typedef union COMPUTE_USER_DATA_3                      regCOMPUTE_USER_DATA_3;
typedef union COMPUTE_USER_DATA_4                      regCOMPUTE_USER_DATA_4;
typedef union COMPUTE_USER_DATA_5                      regCOMPUTE_USER_DATA_5;
typedef union COMPUTE_USER_DATA_6                      regCOMPUTE_USER_DATA_6;
typedef union COMPUTE_USER_DATA_7                      regCOMPUTE_USER_DATA_7;
typedef union COMPUTE_USER_DATA_8                      regCOMPUTE_USER_DATA_8;
typedef union COMPUTE_USER_DATA_9                      regCOMPUTE_USER_DATA_9;
typedef union COMPUTE_VMID                             regCOMPUTE_VMID;
typedef union COMPUTE_WAVE_RESTORE_ADDR_HI             regCOMPUTE_WAVE_RESTORE_ADDR_HI;
typedef union COMPUTE_WAVE_RESTORE_ADDR_LO             regCOMPUTE_WAVE_RESTORE_ADDR_LO;
typedef union CPC_INT_ADDR                             regCPC_INT_ADDR;
typedef union CPC_INT_CNTL                             regCPC_INT_CNTL;
typedef union CPC_INT_CNTX_ID                          regCPC_INT_CNTX_ID;
typedef union CPC_INT_INFO                             regCPC_INT_INFO;
typedef union CPC_INT_PASID                            regCPC_INT_PASID;
typedef union CPC_INT_STATUS                           regCPC_INT_STATUS;
typedef union CPC_LATENCY_STATS_DATA                   regCPC_LATENCY_STATS_DATA;
typedef union CPC_LATENCY_STATS_SELECT                 regCPC_LATENCY_STATS_SELECT;
typedef union CPC_PERFCOUNTER0_HI                      regCPC_PERFCOUNTER0_HI;
typedef union CPC_PERFCOUNTER0_LO                      regCPC_PERFCOUNTER0_LO;
typedef union CPC_PERFCOUNTER0_SELECT__GFX09           regCPC_PERFCOUNTER0_SELECT__GFX09;
typedef union CPC_PERFCOUNTER0_SELECT1__GFX09          regCPC_PERFCOUNTER0_SELECT1__GFX09;
typedef union CPC_PERFCOUNTER1_HI                      regCPC_PERFCOUNTER1_HI;
typedef union CPC_PERFCOUNTER1_LO                      regCPC_PERFCOUNTER1_LO;
typedef union CPC_PERFCOUNTER1_SELECT__GFX09           regCPC_PERFCOUNTER1_SELECT__GFX09;
typedef union CPC_UTCL1_CNTL                           regCPC_UTCL1_CNTL;
typedef union CPC_UTCL1_ERROR                          regCPC_UTCL1_ERROR;
typedef union CPC_UTCL1_STATUS                         regCPC_UTCL1_STATUS;
typedef union CPF_LATENCY_STATS_DATA                   regCPF_LATENCY_STATS_DATA;
typedef union CPF_LATENCY_STATS_SELECT                 regCPF_LATENCY_STATS_SELECT;
typedef union CPF_PERFCOUNTER0_HI                      regCPF_PERFCOUNTER0_HI;
typedef union CPF_PERFCOUNTER0_LO                      regCPF_PERFCOUNTER0_LO;
typedef union CPF_PERFCOUNTER0_SELECT__GFX09           regCPF_PERFCOUNTER0_SELECT__GFX09;
typedef union CPF_PERFCOUNTER0_SELECT1__GFX09          regCPF_PERFCOUNTER0_SELECT1__GFX09;
typedef union CPF_PERFCOUNTER1_HI                      regCPF_PERFCOUNTER1_HI;
typedef union CPF_PERFCOUNTER1_LO                      regCPF_PERFCOUNTER1_LO;
typedef union CPF_PERFCOUNTER1_SELECT__GFX09           regCPF_PERFCOUNTER1_SELECT__GFX09;
typedef union CPF_TC_PERF_COUNTER_WINDOW_SELECT        regCPF_TC_PERF_COUNTER_WINDOW_SELECT;
typedef union CPF_UTCL1_CNTL                           regCPF_UTCL1_CNTL;
typedef union CPF_UTCL1_STATUS                         regCPF_UTCL1_STATUS;
typedef union CPG_LATENCY_STATS_DATA                   regCPG_LATENCY_STATS_DATA;
typedef union CPG_LATENCY_STATS_SELECT                 regCPG_LATENCY_STATS_SELECT;
typedef union CPG_PERFCOUNTER0_HI                      regCPG_PERFCOUNTER0_HI;
typedef union CPG_PERFCOUNTER0_LO                      regCPG_PERFCOUNTER0_LO;
typedef union CPG_PERFCOUNTER0_SELECT__GFX09           regCPG_PERFCOUNTER0_SELECT__GFX09;
typedef union CPG_PERFCOUNTER0_SELECT1__GFX09          regCPG_PERFCOUNTER0_SELECT1__GFX09;
typedef union CPG_PERFCOUNTER1_HI                      regCPG_PERFCOUNTER1_HI;
typedef union CPG_PERFCOUNTER1_LO                      regCPG_PERFCOUNTER1_LO;
typedef union CPG_PERFCOUNTER1_SELECT__GFX09           regCPG_PERFCOUNTER1_SELECT__GFX09;
typedef union CPG_TC_PERF_COUNTER_WINDOW_SELECT        regCPG_TC_PERF_COUNTER_WINDOW_SELECT;
typedef union CPG_UTCL1_CNTL                           regCPG_UTCL1_CNTL;
typedef union CPG_UTCL1_ERROR                          regCPG_UTCL1_ERROR;
typedef union CPG_UTCL1_STATUS                         regCPG_UTCL1_STATUS;
typedef union CP_APPEND_ADDR_HI                        regCP_APPEND_ADDR_HI;
typedef union CP_APPEND_ADDR_LO                        regCP_APPEND_ADDR_LO;
typedef union CP_APPEND_DATA_HI                        regCP_APPEND_DATA_HI;
typedef union CP_APPEND_DATA_LO                        regCP_APPEND_DATA_LO;
typedef union CP_APPEND_LAST_CS_FENCE_HI               regCP_APPEND_LAST_CS_FENCE_HI;
typedef union CP_APPEND_LAST_CS_FENCE_LO               regCP_APPEND_LAST_CS_FENCE_LO;
typedef union CP_APPEND_LAST_PS_FENCE_HI               regCP_APPEND_LAST_PS_FENCE_HI;
typedef union CP_APPEND_LAST_PS_FENCE_LO               regCP_APPEND_LAST_PS_FENCE_LO;
typedef union CP_AQL_SMM_STATUS                        regCP_AQL_SMM_STATUS;
typedef union CP_ATOMIC_PREOP_HI                       regCP_ATOMIC_PREOP_HI;
typedef union CP_ATOMIC_PREOP_LO                       regCP_ATOMIC_PREOP_LO;
typedef union CP_BUSY_STAT                             regCP_BUSY_STAT;
typedef union CP_CEQ1_AVAIL                            regCP_CEQ1_AVAIL;
typedef union CP_CEQ2_AVAIL                            regCP_CEQ2_AVAIL;
typedef union CP_CE_COMPARE_COUNT                      regCP_CE_COMPARE_COUNT;
typedef union CP_CE_COMPLETION_STATUS                  regCP_CE_COMPLETION_STATUS;
typedef union CP_CE_COUNTER                            regCP_CE_COUNTER;
typedef union CP_CE_DE_COUNT                           regCP_CE_DE_COUNT;
typedef union CP_CE_HEADER_DUMP                        regCP_CE_HEADER_DUMP;
typedef union CP_CE_IB1_BASE_HI                        regCP_CE_IB1_BASE_HI;
typedef union CP_CE_IB1_BASE_LO                        regCP_CE_IB1_BASE_LO;
typedef union CP_CE_IB1_BUFSZ                          regCP_CE_IB1_BUFSZ;
typedef union CP_CE_IB1_CMD_BUFSZ                      regCP_CE_IB1_CMD_BUFSZ;
typedef union CP_CE_IB1_OFFSET                         regCP_CE_IB1_OFFSET;
typedef union CP_CE_IB2_BASE_HI                        regCP_CE_IB2_BASE_HI;
typedef union CP_CE_IB2_BASE_LO                        regCP_CE_IB2_BASE_LO;
typedef union CP_CE_IB2_BUFSZ                          regCP_CE_IB2_BUFSZ;
typedef union CP_CE_IB2_CMD_BUFSZ                      regCP_CE_IB2_CMD_BUFSZ;
typedef union CP_CE_IB2_OFFSET                         regCP_CE_IB2_OFFSET;
typedef union CP_CE_INIT_BASE_HI                       regCP_CE_INIT_BASE_HI;
typedef union CP_CE_INIT_BASE_LO                       regCP_CE_INIT_BASE_LO;
typedef union CP_CE_INIT_BUFSZ                         regCP_CE_INIT_BUFSZ;
typedef union CP_CE_INIT_CMD_BUFSZ                     regCP_CE_INIT_CMD_BUFSZ;
typedef union CP_CE_INSTR_PNTR                         regCP_CE_INSTR_PNTR;
typedef union CP_CE_INTR_ROUTINE_START                 regCP_CE_INTR_ROUTINE_START;
typedef union CP_CE_METADATA_BASE_ADDR                 regCP_CE_METADATA_BASE_ADDR;
typedef union CP_CE_METADATA_BASE_ADDR_HI              regCP_CE_METADATA_BASE_ADDR_HI;
typedef union CP_CE_PRGRM_CNTR_START                   regCP_CE_PRGRM_CNTR_START;
typedef union CP_CE_RB_OFFSET__GFX09                   regCP_CE_RB_OFFSET__GFX09;
typedef union CP_CE_ROQ_IB1_STAT                       regCP_CE_ROQ_IB1_STAT;
typedef union CP_CE_ROQ_IB2_STAT                       regCP_CE_ROQ_IB2_STAT;
typedef union CP_CE_ROQ_RB_STAT                        regCP_CE_ROQ_RB_STAT;
typedef union CP_CE_UCODE_ADDR                         regCP_CE_UCODE_ADDR;
typedef union CP_CE_UCODE_DATA                         regCP_CE_UCODE_DATA;
typedef union CP_CMD_DATA                              regCP_CMD_DATA;
typedef union CP_CMD_INDEX                             regCP_CMD_INDEX;
typedef union CP_CNTX_STAT                             regCP_CNTX_STAT;
typedef union CP_COHER_BASE                            regCP_COHER_BASE;
typedef union CP_COHER_BASE_HI                         regCP_COHER_BASE_HI;
typedef union CP_COHER_CNTL                            regCP_COHER_CNTL;
typedef union CP_COHER_SIZE                            regCP_COHER_SIZE;
typedef union CP_COHER_SIZE_HI                         regCP_COHER_SIZE_HI;
typedef union CP_COHER_START_DELAY                     regCP_COHER_START_DELAY;
typedef union CP_COHER_STATUS                          regCP_COHER_STATUS;
typedef union CP_CONTEXT_CNTL__GFX09                   regCP_CONTEXT_CNTL__GFX09;
typedef union CP_CPC_BUSY_STAT                         regCP_CPC_BUSY_STAT;
typedef union CP_CPC_GFX_CNTL                          regCP_CPC_GFX_CNTL;
typedef union CP_CPC_GRBM_FREE_COUNT                   regCP_CPC_GRBM_FREE_COUNT;
typedef union CP_CPC_HALT_HYST_COUNT                   regCP_CPC_HALT_HYST_COUNT;
typedef union CP_CPC_IC_BASE_CNTL                      regCP_CPC_IC_BASE_CNTL;
typedef union CP_CPC_IC_BASE_HI                        regCP_CPC_IC_BASE_HI;
typedef union CP_CPC_IC_BASE_LO                        regCP_CPC_IC_BASE_LO;
typedef union CP_CPC_IC_OP_CNTL                        regCP_CPC_IC_OP_CNTL;
typedef union CP_CPC_MGCG_SYNC_CNTL                    regCP_CPC_MGCG_SYNC_CNTL;
typedef union CP_CPC_SCRATCH_DATA                      regCP_CPC_SCRATCH_DATA;
typedef union CP_CPC_SCRATCH_INDEX                     regCP_CPC_SCRATCH_INDEX;
typedef union CP_CPC_STALLED_STAT1                     regCP_CPC_STALLED_STAT1;
typedef union CP_CPC_STATUS                            regCP_CPC_STATUS;
typedef union CP_CPF_BUSY_STAT__GFX09                  regCP_CPF_BUSY_STAT__GFX09;
typedef union CP_CPF_GRBM_FREE_COUNT                   regCP_CPF_GRBM_FREE_COUNT;
typedef union CP_CPF_STALLED_STAT1                     regCP_CPF_STALLED_STAT1;
typedef union CP_CPF_STATUS                            regCP_CPF_STATUS;
typedef union CP_CSF_STAT                              regCP_CSF_STAT;
typedef union CP_DEVICE_ID                             regCP_DEVICE_ID;
typedef union CP_DE_CE_COUNT                           regCP_DE_CE_COUNT;
typedef union CP_DE_DE_COUNT                           regCP_DE_DE_COUNT;
typedef union CP_DE_LAST_INVAL_COUNT                   regCP_DE_LAST_INVAL_COUNT;
typedef union CP_DFY_ADDR_HI                           regCP_DFY_ADDR_HI;
typedef union CP_DFY_ADDR_LO                           regCP_DFY_ADDR_LO;
typedef union CP_DFY_CMD                               regCP_DFY_CMD;
typedef union CP_DFY_CNTL__GFX09                       regCP_DFY_CNTL__GFX09;
typedef union CP_DFY_DATA_0                            regCP_DFY_DATA_0;
typedef union CP_DFY_DATA_1                            regCP_DFY_DATA_1;
typedef union CP_DFY_DATA_10                           regCP_DFY_DATA_10;
typedef union CP_DFY_DATA_11                           regCP_DFY_DATA_11;
typedef union CP_DFY_DATA_12                           regCP_DFY_DATA_12;
typedef union CP_DFY_DATA_13                           regCP_DFY_DATA_13;
typedef union CP_DFY_DATA_14                           regCP_DFY_DATA_14;
typedef union CP_DFY_DATA_15                           regCP_DFY_DATA_15;
typedef union CP_DFY_DATA_2                            regCP_DFY_DATA_2;
typedef union CP_DFY_DATA_3                            regCP_DFY_DATA_3;
typedef union CP_DFY_DATA_4                            regCP_DFY_DATA_4;
typedef union CP_DFY_DATA_5                            regCP_DFY_DATA_5;
typedef union CP_DFY_DATA_6                            regCP_DFY_DATA_6;
typedef union CP_DFY_DATA_7                            regCP_DFY_DATA_7;
typedef union CP_DFY_DATA_8                            regCP_DFY_DATA_8;
typedef union CP_DFY_DATA_9                            regCP_DFY_DATA_9;
typedef union CP_DFY_STAT                              regCP_DFY_STAT;
typedef union CP_DISPATCH_INDR_ADDR                    regCP_DISPATCH_INDR_ADDR;
typedef union CP_DISPATCH_INDR_ADDR_HI                 regCP_DISPATCH_INDR_ADDR_HI;
typedef union CP_DMA_CNTL                              regCP_DMA_CNTL;
typedef union CP_DMA_ME_COMMAND                        regCP_DMA_ME_COMMAND;
typedef union CP_DMA_ME_CONTROL__GFX09                 regCP_DMA_ME_CONTROL__GFX09;
typedef union CP_DMA_ME_DST_ADDR                       regCP_DMA_ME_DST_ADDR;
typedef union CP_DMA_ME_DST_ADDR_HI                    regCP_DMA_ME_DST_ADDR_HI;
typedef union CP_DMA_ME_SRC_ADDR                       regCP_DMA_ME_SRC_ADDR;
typedef union CP_DMA_ME_SRC_ADDR_HI                    regCP_DMA_ME_SRC_ADDR_HI;
typedef union CP_DMA_PFP_COMMAND                       regCP_DMA_PFP_COMMAND;
typedef union CP_DMA_PFP_CONTROL__GFX09                regCP_DMA_PFP_CONTROL__GFX09;
typedef union CP_DMA_PFP_DST_ADDR                      regCP_DMA_PFP_DST_ADDR;
typedef union CP_DMA_PFP_DST_ADDR_HI                   regCP_DMA_PFP_DST_ADDR_HI;
typedef union CP_DMA_PFP_SRC_ADDR                      regCP_DMA_PFP_SRC_ADDR;
typedef union CP_DMA_PFP_SRC_ADDR_HI                   regCP_DMA_PFP_SRC_ADDR_HI;
typedef union CP_DMA_PIO_COMMAND                       regCP_DMA_PIO_COMMAND;
typedef union CP_DMA_READ_TAGS                         regCP_DMA_READ_TAGS;
typedef union CP_DRAW_INDX_INDR_ADDR                   regCP_DRAW_INDX_INDR_ADDR;
typedef union CP_DRAW_INDX_INDR_ADDR_HI                regCP_DRAW_INDX_INDR_ADDR_HI;
typedef union CP_DRAW_OBJECT                           regCP_DRAW_OBJECT;
typedef union CP_DRAW_OBJECT_COUNTER                   regCP_DRAW_OBJECT_COUNTER;
typedef union CP_DRAW_WINDOW_CNTL                      regCP_DRAW_WINDOW_CNTL;
typedef union CP_DRAW_WINDOW_HI                        regCP_DRAW_WINDOW_HI;
typedef union CP_DRAW_WINDOW_LO                        regCP_DRAW_WINDOW_LO;
typedef union CP_DRAW_WINDOW_MASK_HI                   regCP_DRAW_WINDOW_MASK_HI;
typedef union CP_ECC_FIRSTOCCURRENCE                   regCP_ECC_FIRSTOCCURRENCE;
typedef union CP_ECC_FIRSTOCCURRENCE_RING0             regCP_ECC_FIRSTOCCURRENCE_RING0;
typedef union CP_ECC_FIRSTOCCURRENCE_RING1             regCP_ECC_FIRSTOCCURRENCE_RING1;
typedef union CP_ECC_FIRSTOCCURRENCE_RING2             regCP_ECC_FIRSTOCCURRENCE_RING2;
typedef union CP_EOPQ_WAIT_TIME                        regCP_EOPQ_WAIT_TIME;
typedef union CP_EOP_DONE_ADDR_HI                      regCP_EOP_DONE_ADDR_HI;
typedef union CP_EOP_DONE_ADDR_LO                      regCP_EOP_DONE_ADDR_LO;
typedef union CP_EOP_DONE_CNTX_ID                      regCP_EOP_DONE_CNTX_ID;
typedef union CP_EOP_DONE_DATA_CNTL                    regCP_EOP_DONE_DATA_CNTL;
typedef union CP_EOP_DONE_DATA_HI                      regCP_EOP_DONE_DATA_HI;
typedef union CP_EOP_DONE_DATA_LO                      regCP_EOP_DONE_DATA_LO;
typedef union CP_EOP_DONE_EVENT_CNTL__GFX09            regCP_EOP_DONE_EVENT_CNTL__GFX09;
typedef union CP_EOP_LAST_FENCE_HI                     regCP_EOP_LAST_FENCE_HI;
typedef union CP_EOP_LAST_FENCE_LO                     regCP_EOP_LAST_FENCE_LO;
typedef union CP_FATAL_ERROR                           regCP_FATAL_ERROR;
typedef union CP_GDS_ATOMIC0_PREOP_HI                  regCP_GDS_ATOMIC0_PREOP_HI;
typedef union CP_GDS_ATOMIC0_PREOP_LO                  regCP_GDS_ATOMIC0_PREOP_LO;
typedef union CP_GDS_ATOMIC1_PREOP_HI                  regCP_GDS_ATOMIC1_PREOP_HI;
typedef union CP_GDS_ATOMIC1_PREOP_LO                  regCP_GDS_ATOMIC1_PREOP_LO;
typedef union CP_GDS_BKUP_ADDR                         regCP_GDS_BKUP_ADDR;
typedef union CP_GDS_BKUP_ADDR_HI                      regCP_GDS_BKUP_ADDR_HI;
typedef union CP_GFX_ERROR__GFX09                      regCP_GFX_ERROR__GFX09;
typedef union CP_GFX_MQD_BASE_ADDR                     regCP_GFX_MQD_BASE_ADDR;
typedef union CP_GFX_MQD_BASE_ADDR_HI                  regCP_GFX_MQD_BASE_ADDR_HI;
typedef union CP_GFX_MQD_CONTROL                       regCP_GFX_MQD_CONTROL;
typedef union CP_GRBM_FREE_COUNT                       regCP_GRBM_FREE_COUNT;
typedef union CP_HPD_ROQ_OFFSETS                       regCP_HPD_ROQ_OFFSETS;
typedef union CP_HPD_STATUS0                           regCP_HPD_STATUS0;
typedef union CP_HPD_UTCL1_CNTL                        regCP_HPD_UTCL1_CNTL;
typedef union CP_HPD_UTCL1_ERROR                       regCP_HPD_UTCL1_ERROR;
typedef union CP_HPD_UTCL1_ERROR_ADDR                  regCP_HPD_UTCL1_ERROR_ADDR;
typedef union CP_HQD_ACTIVE                            regCP_HQD_ACTIVE;
typedef union CP_HQD_AQL_CONTROL                       regCP_HQD_AQL_CONTROL;
typedef union CP_HQD_ATOMIC0_PREOP_HI                  regCP_HQD_ATOMIC0_PREOP_HI;
typedef union CP_HQD_ATOMIC0_PREOP_LO                  regCP_HQD_ATOMIC0_PREOP_LO;
typedef union CP_HQD_ATOMIC1_PREOP_HI                  regCP_HQD_ATOMIC1_PREOP_HI;
typedef union CP_HQD_ATOMIC1_PREOP_LO                  regCP_HQD_ATOMIC1_PREOP_LO;
typedef union CP_HQD_CNTL_STACK_OFFSET                 regCP_HQD_CNTL_STACK_OFFSET;
typedef union CP_HQD_CNTL_STACK_SIZE                   regCP_HQD_CNTL_STACK_SIZE;
typedef union CP_HQD_CTX_SAVE_BASE_ADDR_HI             regCP_HQD_CTX_SAVE_BASE_ADDR_HI;
typedef union CP_HQD_CTX_SAVE_BASE_ADDR_LO             regCP_HQD_CTX_SAVE_BASE_ADDR_LO;
typedef union CP_HQD_CTX_SAVE_CONTROL                  regCP_HQD_CTX_SAVE_CONTROL;
typedef union CP_HQD_CTX_SAVE_SIZE                     regCP_HQD_CTX_SAVE_SIZE;
typedef union CP_HQD_DEQUEUE_REQUEST                   regCP_HQD_DEQUEUE_REQUEST;
typedef union CP_HQD_DMA_OFFLOAD                       regCP_HQD_DMA_OFFLOAD;
typedef union CP_HQD_EOP_BASE_ADDR                     regCP_HQD_EOP_BASE_ADDR;
typedef union CP_HQD_EOP_BASE_ADDR_HI                  regCP_HQD_EOP_BASE_ADDR_HI;
typedef union CP_HQD_EOP_CONTROL__GFX09                regCP_HQD_EOP_CONTROL__GFX09;
typedef union CP_HQD_EOP_EVENTS                        regCP_HQD_EOP_EVENTS;
typedef union CP_HQD_EOP_RPTR                          regCP_HQD_EOP_RPTR;
typedef union CP_HQD_EOP_WPTR                          regCP_HQD_EOP_WPTR;
typedef union CP_HQD_EOP_WPTR_MEM                      regCP_HQD_EOP_WPTR_MEM;
typedef union CP_HQD_ERROR                             regCP_HQD_ERROR;
typedef union CP_HQD_GDS_RESOURCE_STATE                regCP_HQD_GDS_RESOURCE_STATE;
typedef union CP_HQD_GFX_CONTROL                       regCP_HQD_GFX_CONTROL;
typedef union CP_HQD_GFX_STATUS                        regCP_HQD_GFX_STATUS;
typedef union CP_HQD_HQ_CONTROL0                       regCP_HQD_HQ_CONTROL0;
typedef union CP_HQD_HQ_CONTROL1                       regCP_HQD_HQ_CONTROL1;
typedef union CP_HQD_HQ_SCHEDULER0                     regCP_HQD_HQ_SCHEDULER0;
typedef union CP_HQD_HQ_SCHEDULER1                     regCP_HQD_HQ_SCHEDULER1;
typedef union CP_HQD_HQ_STATUS0                        regCP_HQD_HQ_STATUS0;
typedef union CP_HQD_HQ_STATUS1                        regCP_HQD_HQ_STATUS1;
typedef union CP_HQD_IB_BASE_ADDR                      regCP_HQD_IB_BASE_ADDR;
typedef union CP_HQD_IB_BASE_ADDR_HI                   regCP_HQD_IB_BASE_ADDR_HI;
typedef union CP_HQD_IB_CONTROL__GFX09                 regCP_HQD_IB_CONTROL__GFX09;
typedef union CP_HQD_IB_RPTR                           regCP_HQD_IB_RPTR;
typedef union CP_HQD_IQ_RPTR                           regCP_HQD_IQ_RPTR;
typedef union CP_HQD_IQ_TIMER__GFX09                   regCP_HQD_IQ_TIMER__GFX09;
typedef union CP_HQD_MSG_TYPE                          regCP_HQD_MSG_TYPE;
typedef union CP_HQD_OFFLOAD                           regCP_HQD_OFFLOAD;
typedef union CP_HQD_PERSISTENT_STATE                  regCP_HQD_PERSISTENT_STATE;
typedef union CP_HQD_PIPE_PRIORITY                     regCP_HQD_PIPE_PRIORITY;
typedef union CP_HQD_PQ_BASE                           regCP_HQD_PQ_BASE;
typedef union CP_HQD_PQ_BASE_HI                        regCP_HQD_PQ_BASE_HI;
typedef union CP_HQD_PQ_CONTROL__GFX09                 regCP_HQD_PQ_CONTROL__GFX09;
typedef union CP_HQD_PQ_DOORBELL_CONTROL               regCP_HQD_PQ_DOORBELL_CONTROL;
typedef union CP_HQD_PQ_RPTR                           regCP_HQD_PQ_RPTR;
typedef union CP_HQD_PQ_RPTR_REPORT_ADDR               regCP_HQD_PQ_RPTR_REPORT_ADDR;
typedef union CP_HQD_PQ_RPTR_REPORT_ADDR_HI            regCP_HQD_PQ_RPTR_REPORT_ADDR_HI;
typedef union CP_HQD_PQ_WPTR_HI                        regCP_HQD_PQ_WPTR_HI;
typedef union CP_HQD_PQ_WPTR_LO                        regCP_HQD_PQ_WPTR_LO;
typedef union CP_HQD_PQ_WPTR_POLL_ADDR                 regCP_HQD_PQ_WPTR_POLL_ADDR;
typedef union CP_HQD_PQ_WPTR_POLL_ADDR_HI              regCP_HQD_PQ_WPTR_POLL_ADDR_HI;
typedef union CP_HQD_QUANTUM                           regCP_HQD_QUANTUM;
typedef union CP_HQD_QUEUE_PRIORITY                    regCP_HQD_QUEUE_PRIORITY;
typedef union CP_HQD_SEMA_CMD                          regCP_HQD_SEMA_CMD;
typedef union CP_HQD_VMID                              regCP_HQD_VMID;
typedef union CP_HQD_WG_STATE_OFFSET                   regCP_HQD_WG_STATE_OFFSET;
typedef union CP_HYP_CE_UCODE_ADDR                     regCP_HYP_CE_UCODE_ADDR;
typedef union CP_HYP_CE_UCODE_DATA                     regCP_HYP_CE_UCODE_DATA;
typedef union CP_HYP_MEC1_UCODE_ADDR                   regCP_HYP_MEC1_UCODE_ADDR;
typedef union CP_HYP_MEC1_UCODE_DATA                   regCP_HYP_MEC1_UCODE_DATA;
typedef union CP_HYP_MEC2_UCODE_ADDR                   regCP_HYP_MEC2_UCODE_ADDR;
typedef union CP_HYP_MEC2_UCODE_DATA                   regCP_HYP_MEC2_UCODE_DATA;
typedef union CP_HYP_ME_UCODE_ADDR                     regCP_HYP_ME_UCODE_ADDR;
typedef union CP_HYP_ME_UCODE_DATA                     regCP_HYP_ME_UCODE_DATA;
typedef union CP_HYP_PFP_UCODE_ADDR                    regCP_HYP_PFP_UCODE_ADDR;
typedef union CP_HYP_PFP_UCODE_DATA                    regCP_HYP_PFP_UCODE_DATA;
typedef union CP_IB1_BASE_HI                           regCP_IB1_BASE_HI;
typedef union CP_IB1_BASE_LO                           regCP_IB1_BASE_LO;
typedef union CP_IB1_BUFSZ                             regCP_IB1_BUFSZ;
typedef union CP_IB1_CMD_BUFSZ                         regCP_IB1_CMD_BUFSZ;
typedef union CP_IB1_OFFSET                            regCP_IB1_OFFSET;
typedef union CP_IB1_PREAMBLE_BEGIN                    regCP_IB1_PREAMBLE_BEGIN;
typedef union CP_IB1_PREAMBLE_END                      regCP_IB1_PREAMBLE_END;
typedef union CP_IB2_BASE_HI                           regCP_IB2_BASE_HI;
typedef union CP_IB2_BASE_LO                           regCP_IB2_BASE_LO;
typedef union CP_IB2_BUFSZ                             regCP_IB2_BUFSZ;
typedef union CP_IB2_CMD_BUFSZ                         regCP_IB2_CMD_BUFSZ;
typedef union CP_IB2_OFFSET                            regCP_IB2_OFFSET;
typedef union CP_IB2_PREAMBLE_BEGIN                    regCP_IB2_PREAMBLE_BEGIN;
typedef union CP_IB2_PREAMBLE_END                      regCP_IB2_PREAMBLE_END;
typedef union CP_INDEX_BASE_ADDR                       regCP_INDEX_BASE_ADDR;
typedef union CP_INDEX_BASE_ADDR_HI                    regCP_INDEX_BASE_ADDR_HI;
typedef union CP_INDEX_TYPE                            regCP_INDEX_TYPE;
typedef union CP_INT_CNTL                              regCP_INT_CNTL;
typedef union CP_INT_CNTL_RING0                        regCP_INT_CNTL_RING0;
typedef union CP_INT_CNTL_RING1                        regCP_INT_CNTL_RING1;
typedef union CP_INT_CNTL_RING2                        regCP_INT_CNTL_RING2;
typedef union CP_INT_STATUS                            regCP_INT_STATUS;
typedef union CP_INT_STATUS_RING0                      regCP_INT_STATUS_RING0;
typedef union CP_INT_STATUS_RING1                      regCP_INT_STATUS_RING1;
typedef union CP_INT_STATUS_RING2                      regCP_INT_STATUS_RING2;
typedef union CP_INT_STAT_DEBUG                        regCP_INT_STAT_DEBUG;
typedef union CP_IQ_WAIT_TIME1                         regCP_IQ_WAIT_TIME1;
typedef union CP_IQ_WAIT_TIME2                         regCP_IQ_WAIT_TIME2;
typedef union CP_MAX_CONTEXT                           regCP_MAX_CONTEXT;
typedef union CP_ME0_PIPE0_PRIORITY                    regCP_ME0_PIPE0_PRIORITY;
typedef union CP_ME0_PIPE0_VMID                        regCP_ME0_PIPE0_VMID;
typedef union CP_ME0_PIPE1_PRIORITY                    regCP_ME0_PIPE1_PRIORITY;
typedef union CP_ME0_PIPE1_VMID                        regCP_ME0_PIPE1_VMID;
typedef union CP_ME0_PIPE2_PRIORITY                    regCP_ME0_PIPE2_PRIORITY;
typedef union CP_ME0_PIPE_PRIORITY_CNTS                regCP_ME0_PIPE_PRIORITY_CNTS;
typedef union CP_ME1_INT_STAT_DEBUG                    regCP_ME1_INT_STAT_DEBUG;
typedef union CP_ME1_PIPE0_INT_CNTL                    regCP_ME1_PIPE0_INT_CNTL;
typedef union CP_ME1_PIPE0_INT_STATUS                  regCP_ME1_PIPE0_INT_STATUS;
typedef union CP_ME1_PIPE0_PRIORITY                    regCP_ME1_PIPE0_PRIORITY;
typedef union CP_ME1_PIPE1_INT_CNTL                    regCP_ME1_PIPE1_INT_CNTL;
typedef union CP_ME1_PIPE1_INT_STATUS                  regCP_ME1_PIPE1_INT_STATUS;
typedef union CP_ME1_PIPE1_PRIORITY                    regCP_ME1_PIPE1_PRIORITY;
typedef union CP_ME1_PIPE2_INT_CNTL                    regCP_ME1_PIPE2_INT_CNTL;
typedef union CP_ME1_PIPE2_INT_STATUS                  regCP_ME1_PIPE2_INT_STATUS;
typedef union CP_ME1_PIPE2_PRIORITY                    regCP_ME1_PIPE2_PRIORITY;
typedef union CP_ME1_PIPE3_INT_CNTL                    regCP_ME1_PIPE3_INT_CNTL;
typedef union CP_ME1_PIPE3_INT_STATUS                  regCP_ME1_PIPE3_INT_STATUS;
typedef union CP_ME1_PIPE3_PRIORITY                    regCP_ME1_PIPE3_PRIORITY;
typedef union CP_ME1_PIPE_PRIORITY_CNTS                regCP_ME1_PIPE_PRIORITY_CNTS;
typedef union CP_ME2_INT_STAT_DEBUG                    regCP_ME2_INT_STAT_DEBUG;
typedef union CP_ME2_PIPE0_INT_CNTL                    regCP_ME2_PIPE0_INT_CNTL;
typedef union CP_ME2_PIPE0_INT_STATUS                  regCP_ME2_PIPE0_INT_STATUS;
typedef union CP_ME2_PIPE0_PRIORITY                    regCP_ME2_PIPE0_PRIORITY;
typedef union CP_ME2_PIPE1_INT_CNTL                    regCP_ME2_PIPE1_INT_CNTL;
typedef union CP_ME2_PIPE1_INT_STATUS                  regCP_ME2_PIPE1_INT_STATUS;
typedef union CP_ME2_PIPE1_PRIORITY                    regCP_ME2_PIPE1_PRIORITY;
typedef union CP_ME2_PIPE2_INT_CNTL                    regCP_ME2_PIPE2_INT_CNTL;
typedef union CP_ME2_PIPE2_INT_STATUS                  regCP_ME2_PIPE2_INT_STATUS;
typedef union CP_ME2_PIPE2_PRIORITY                    regCP_ME2_PIPE2_PRIORITY;
typedef union CP_ME2_PIPE3_INT_CNTL                    regCP_ME2_PIPE3_INT_CNTL;
typedef union CP_ME2_PIPE3_INT_STATUS                  regCP_ME2_PIPE3_INT_STATUS;
typedef union CP_ME2_PIPE3_PRIORITY                    regCP_ME2_PIPE3_PRIORITY;
typedef union CP_ME2_PIPE_PRIORITY_CNTS                regCP_ME2_PIPE_PRIORITY_CNTS;
typedef union CP_MEC1_F32_INTERRUPT                    regCP_MEC1_F32_INTERRUPT;
typedef union CP_MEC1_F32_INT_DIS                      regCP_MEC1_F32_INT_DIS;
typedef union CP_MEC1_INSTR_PNTR                       regCP_MEC1_INSTR_PNTR;
typedef union CP_MEC1_INTR_ROUTINE_START               regCP_MEC1_INTR_ROUTINE_START;
typedef union CP_MEC1_PRGRM_CNTR_START                 regCP_MEC1_PRGRM_CNTR_START;
typedef union CP_MEC2_F32_INTERRUPT                    regCP_MEC2_F32_INTERRUPT;
typedef union CP_MEC2_F32_INT_DIS                      regCP_MEC2_F32_INT_DIS;
typedef union CP_MEC2_INSTR_PNTR                       regCP_MEC2_INSTR_PNTR;
typedef union CP_MEC2_INTR_ROUTINE_START               regCP_MEC2_INTR_ROUTINE_START;
typedef union CP_MEC2_PRGRM_CNTR_START                 regCP_MEC2_PRGRM_CNTR_START;
typedef union CP_MEC_CNTL__GFX09                       regCP_MEC_CNTL__GFX09;
typedef union CP_MEC_DOORBELL_RANGE_LOWER              regCP_MEC_DOORBELL_RANGE_LOWER;
typedef union CP_MEC_DOORBELL_RANGE_UPPER              regCP_MEC_DOORBELL_RANGE_UPPER;
typedef union CP_MEC_ME1_HEADER_DUMP                   regCP_MEC_ME1_HEADER_DUMP;
typedef union CP_MEC_ME1_UCODE_ADDR                    regCP_MEC_ME1_UCODE_ADDR;
typedef union CP_MEC_ME1_UCODE_DATA                    regCP_MEC_ME1_UCODE_DATA;
typedef union CP_MEC_ME2_HEADER_DUMP                   regCP_MEC_ME2_HEADER_DUMP;
typedef union CP_MEC_ME2_UCODE_ADDR                    regCP_MEC_ME2_UCODE_ADDR;
typedef union CP_MEC_ME2_UCODE_DATA                    regCP_MEC_ME2_UCODE_DATA;
typedef union CP_MEM_SLP_CNTL                          regCP_MEM_SLP_CNTL;
typedef union CP_MEQ_AVAIL                             regCP_MEQ_AVAIL;
typedef union CP_MEQ_STAT                              regCP_MEQ_STAT;
typedef union CP_MEQ_STQ_THRESHOLD                     regCP_MEQ_STQ_THRESHOLD;
typedef union CP_MEQ_THRESHOLDS                        regCP_MEQ_THRESHOLDS;
typedef union CP_ME_ATOMIC_PREOP_HI                    regCP_ME_ATOMIC_PREOP_HI;
typedef union CP_ME_ATOMIC_PREOP_LO                    regCP_ME_ATOMIC_PREOP_LO;
typedef union CP_ME_CNTL                               regCP_ME_CNTL;
typedef union CP_ME_COHER_BASE                         regCP_ME_COHER_BASE;
typedef union CP_ME_COHER_BASE_HI                      regCP_ME_COHER_BASE_HI;
typedef union CP_ME_COHER_CNTL                         regCP_ME_COHER_CNTL;
typedef union CP_ME_COHER_SIZE                         regCP_ME_COHER_SIZE;
typedef union CP_ME_COHER_SIZE_HI                      regCP_ME_COHER_SIZE_HI;
typedef union CP_ME_COHER_STATUS                       regCP_ME_COHER_STATUS;
typedef union CP_ME_GDS_ATOMIC0_PREOP_HI               regCP_ME_GDS_ATOMIC0_PREOP_HI;
typedef union CP_ME_GDS_ATOMIC0_PREOP_LO               regCP_ME_GDS_ATOMIC0_PREOP_LO;
typedef union CP_ME_GDS_ATOMIC1_PREOP_HI               regCP_ME_GDS_ATOMIC1_PREOP_HI;
typedef union CP_ME_GDS_ATOMIC1_PREOP_LO               regCP_ME_GDS_ATOMIC1_PREOP_LO;
typedef union CP_ME_HEADER_DUMP                        regCP_ME_HEADER_DUMP;
typedef union CP_ME_INSTR_PNTR                         regCP_ME_INSTR_PNTR;
typedef union CP_ME_INTR_ROUTINE_START                 regCP_ME_INTR_ROUTINE_START;
typedef union CP_ME_MC_RADDR_HI                        regCP_ME_MC_RADDR_HI;
typedef union CP_ME_MC_RADDR_LO                        regCP_ME_MC_RADDR_LO;
typedef union CP_ME_MC_WADDR_HI                        regCP_ME_MC_WADDR_HI;
typedef union CP_ME_MC_WADDR_LO                        regCP_ME_MC_WADDR_LO;
typedef union CP_ME_MC_WDATA_HI                        regCP_ME_MC_WDATA_HI;
typedef union CP_ME_MC_WDATA_LO                        regCP_ME_MC_WDATA_LO;
typedef union CP_ME_PREEMPTION                         regCP_ME_PREEMPTION;
typedef union CP_ME_PRGRM_CNTR_START                   regCP_ME_PRGRM_CNTR_START;
typedef union CP_ME_RAM_DATA                           regCP_ME_RAM_DATA;
typedef union CP_ME_RAM_RADDR                          regCP_ME_RAM_RADDR;
typedef union CP_ME_RAM_WADDR                          regCP_ME_RAM_WADDR;
typedef union CP_MQD_BASE_ADDR                         regCP_MQD_BASE_ADDR;
typedef union CP_MQD_BASE_ADDR_HI                      regCP_MQD_BASE_ADDR_HI;
typedef union CP_MQD_CONTROL                           regCP_MQD_CONTROL;
typedef union CP_NUM_PRIM_NEEDED_COUNT0_HI             regCP_NUM_PRIM_NEEDED_COUNT0_HI;
typedef union CP_NUM_PRIM_NEEDED_COUNT0_LO             regCP_NUM_PRIM_NEEDED_COUNT0_LO;
typedef union CP_NUM_PRIM_NEEDED_COUNT1_HI             regCP_NUM_PRIM_NEEDED_COUNT1_HI;
typedef union CP_NUM_PRIM_NEEDED_COUNT1_LO             regCP_NUM_PRIM_NEEDED_COUNT1_LO;
typedef union CP_NUM_PRIM_NEEDED_COUNT2_HI             regCP_NUM_PRIM_NEEDED_COUNT2_HI;
typedef union CP_NUM_PRIM_NEEDED_COUNT2_LO             regCP_NUM_PRIM_NEEDED_COUNT2_LO;
typedef union CP_NUM_PRIM_NEEDED_COUNT3_HI             regCP_NUM_PRIM_NEEDED_COUNT3_HI;
typedef union CP_NUM_PRIM_NEEDED_COUNT3_LO             regCP_NUM_PRIM_NEEDED_COUNT3_LO;
typedef union CP_NUM_PRIM_WRITTEN_COUNT0_HI            regCP_NUM_PRIM_WRITTEN_COUNT0_HI;
typedef union CP_NUM_PRIM_WRITTEN_COUNT0_LO            regCP_NUM_PRIM_WRITTEN_COUNT0_LO;
typedef union CP_NUM_PRIM_WRITTEN_COUNT1_HI            regCP_NUM_PRIM_WRITTEN_COUNT1_HI;
typedef union CP_NUM_PRIM_WRITTEN_COUNT1_LO            regCP_NUM_PRIM_WRITTEN_COUNT1_LO;
typedef union CP_NUM_PRIM_WRITTEN_COUNT2_HI            regCP_NUM_PRIM_WRITTEN_COUNT2_HI;
typedef union CP_NUM_PRIM_WRITTEN_COUNT2_LO            regCP_NUM_PRIM_WRITTEN_COUNT2_LO;
typedef union CP_NUM_PRIM_WRITTEN_COUNT3_HI            regCP_NUM_PRIM_WRITTEN_COUNT3_HI;
typedef union CP_NUM_PRIM_WRITTEN_COUNT3_LO            regCP_NUM_PRIM_WRITTEN_COUNT3_LO;
typedef union CP_PA_CINVOC_COUNT_HI                    regCP_PA_CINVOC_COUNT_HI;
typedef union CP_PA_CINVOC_COUNT_LO                    regCP_PA_CINVOC_COUNT_LO;
typedef union CP_PA_CPRIM_COUNT_HI                     regCP_PA_CPRIM_COUNT_HI;
typedef union CP_PA_CPRIM_COUNT_LO                     regCP_PA_CPRIM_COUNT_LO;
typedef union CP_PERFMON_CNTL                          regCP_PERFMON_CNTL;
typedef union CP_PERFMON_CNTX_CNTL                     regCP_PERFMON_CNTX_CNTL;
typedef union CP_PFP_ATOMIC_PREOP_HI                   regCP_PFP_ATOMIC_PREOP_HI;
typedef union CP_PFP_ATOMIC_PREOP_LO                   regCP_PFP_ATOMIC_PREOP_LO;
typedef union CP_PFP_COMPLETION_STATUS                 regCP_PFP_COMPLETION_STATUS;
typedef union CP_PFP_F32_INTERRUPT                     regCP_PFP_F32_INTERRUPT;
typedef union CP_PFP_GDS_ATOMIC0_PREOP_HI              regCP_PFP_GDS_ATOMIC0_PREOP_HI;
typedef union CP_PFP_GDS_ATOMIC0_PREOP_LO              regCP_PFP_GDS_ATOMIC0_PREOP_LO;
typedef union CP_PFP_GDS_ATOMIC1_PREOP_HI              regCP_PFP_GDS_ATOMIC1_PREOP_HI;
typedef union CP_PFP_GDS_ATOMIC1_PREOP_LO              regCP_PFP_GDS_ATOMIC1_PREOP_LO;
typedef union CP_PFP_HEADER_DUMP                       regCP_PFP_HEADER_DUMP;
typedef union CP_PFP_IB_CONTROL                        regCP_PFP_IB_CONTROL;
typedef union CP_PFP_INSTR_PNTR                        regCP_PFP_INSTR_PNTR;
typedef union CP_PFP_INTR_ROUTINE_START                regCP_PFP_INTR_ROUTINE_START;
typedef union CP_PFP_LOAD_CONTROL                      regCP_PFP_LOAD_CONTROL;
typedef union CP_PFP_METADATA_BASE_ADDR                regCP_PFP_METADATA_BASE_ADDR;
typedef union CP_PFP_METADATA_BASE_ADDR_HI             regCP_PFP_METADATA_BASE_ADDR_HI;
typedef union CP_PFP_PRGRM_CNTR_START                  regCP_PFP_PRGRM_CNTR_START;
typedef union CP_PFP_UCODE_ADDR                        regCP_PFP_UCODE_ADDR;
typedef union CP_PFP_UCODE_DATA                        regCP_PFP_UCODE_DATA;
typedef union CP_PIPEID                                regCP_PIPEID;
typedef union CP_PIPE_STATS_ADDR_HI                    regCP_PIPE_STATS_ADDR_HI;
typedef union CP_PIPE_STATS_ADDR_LO                    regCP_PIPE_STATS_ADDR_LO;
typedef union CP_PIPE_STATS_CONTROL                    regCP_PIPE_STATS_CONTROL;
typedef union CP_PQ_STATUS                             regCP_PQ_STATUS;
typedef union CP_PQ_WPTR_POLL_CNTL                     regCP_PQ_WPTR_POLL_CNTL;
typedef union CP_PQ_WPTR_POLL_CNTL1                    regCP_PQ_WPTR_POLL_CNTL1;
typedef union CP_PRED_NOT_VISIBLE                      regCP_PRED_NOT_VISIBLE;
typedef union CP_PRT_LOD_STATS_CNTL0                   regCP_PRT_LOD_STATS_CNTL0;
typedef union CP_PRT_LOD_STATS_CNTL1                   regCP_PRT_LOD_STATS_CNTL1;
typedef union CP_PRT_LOD_STATS_CNTL2                   regCP_PRT_LOD_STATS_CNTL2;
typedef union CP_PRT_LOD_STATS_CNTL3                   regCP_PRT_LOD_STATS_CNTL3;
typedef union CP_PWR_CNTL                              regCP_PWR_CNTL;
typedef union CP_QUEUE_THRESHOLDS                      regCP_QUEUE_THRESHOLDS;
typedef union CP_RB0_ACTIVE                            regCP_RB0_ACTIVE;
typedef union CP_RB0_BASE                              regCP_RB0_BASE;
typedef union CP_RB0_BASE_HI                           regCP_RB0_BASE_HI;
typedef union CP_RB0_BUFSZ_MASK                        regCP_RB0_BUFSZ_MASK;
typedef union CP_RB0_CNTL__GFX09                       regCP_RB0_CNTL__GFX09;
typedef union CP_RB0_RPTR                              regCP_RB0_RPTR;
typedef union CP_RB0_RPTR_ADDR                         regCP_RB0_RPTR_ADDR;
typedef union CP_RB0_RPTR_ADDR_HI                      regCP_RB0_RPTR_ADDR_HI;
typedef union CP_RB0_WPTR                              regCP_RB0_WPTR;
typedef union CP_RB0_WPTR_HI                           regCP_RB0_WPTR_HI;
typedef union CP_RB1_BASE                              regCP_RB1_BASE;
typedef union CP_RB1_BASE_HI                           regCP_RB1_BASE_HI;
typedef union CP_RB1_CNTL__GFX09                       regCP_RB1_CNTL__GFX09;
typedef union CP_RB1_RPTR                              regCP_RB1_RPTR;
typedef union CP_RB1_RPTR_ADDR                         regCP_RB1_RPTR_ADDR;
typedef union CP_RB1_RPTR_ADDR_HI                      regCP_RB1_RPTR_ADDR_HI;
typedef union CP_RB1_WPTR                              regCP_RB1_WPTR;
typedef union CP_RB1_WPTR_HI                           regCP_RB1_WPTR_HI;
typedef union CP_RB2_BASE                              regCP_RB2_BASE;
typedef union CP_RB2_CNTL__GFX09                       regCP_RB2_CNTL__GFX09;
typedef union CP_RB2_RPTR                              regCP_RB2_RPTR;
typedef union CP_RB2_RPTR_ADDR                         regCP_RB2_RPTR_ADDR;
typedef union CP_RB2_RPTR_ADDR_HI                      regCP_RB2_RPTR_ADDR_HI;
typedef union CP_RB2_WPTR                              regCP_RB2_WPTR;
typedef union CP_RB_ACTIVE                             regCP_RB_ACTIVE;
typedef union CP_RB_BASE                               regCP_RB_BASE;
typedef union CP_RB_BUFSZ_MASK                         regCP_RB_BUFSZ_MASK;
typedef union CP_RB_CNTL__GFX09                        regCP_RB_CNTL__GFX09;
typedef union CP_RB_DOORBELL_CLEAR                     regCP_RB_DOORBELL_CLEAR;
typedef union CP_RB_DOORBELL_CONTROL                   regCP_RB_DOORBELL_CONTROL;
typedef union CP_RB_DOORBELL_CONTROL_SCH_0__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_0__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_1__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_1__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_2__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_2__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_3__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_3__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_4__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_4__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_5__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_5__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_6__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_6__GFX09;
typedef union CP_RB_DOORBELL_CONTROL_SCH_7__GFX09      regCP_RB_DOORBELL_CONTROL_SCH_7__GFX09;
typedef union CP_RB_DOORBELL_RANGE_LOWER               regCP_RB_DOORBELL_RANGE_LOWER;
typedef union CP_RB_DOORBELL_RANGE_UPPER               regCP_RB_DOORBELL_RANGE_UPPER;
typedef union CP_RB_OFFSET                             regCP_RB_OFFSET;
typedef union CP_RB_RPTR                               regCP_RB_RPTR;
typedef union CP_RB_RPTR_ADDR                          regCP_RB_RPTR_ADDR;
typedef union CP_RB_RPTR_ADDR_HI                       regCP_RB_RPTR_ADDR_HI;
typedef union CP_RB_RPTR_WR                            regCP_RB_RPTR_WR;
typedef union CP_RB_STATUS                             regCP_RB_STATUS;
typedef union CP_RB_VMID                               regCP_RB_VMID;
typedef union CP_RB_WPTR                               regCP_RB_WPTR;
typedef union CP_RB_WPTR_DELAY                         regCP_RB_WPTR_DELAY;
typedef union CP_RB_WPTR_HI                            regCP_RB_WPTR_HI;
typedef union CP_RB_WPTR_POLL_ADDR_HI                  regCP_RB_WPTR_POLL_ADDR_HI;
typedef union CP_RB_WPTR_POLL_ADDR_LO                  regCP_RB_WPTR_POLL_ADDR_LO;
typedef union CP_RB_WPTR_POLL_CNTL                     regCP_RB_WPTR_POLL_CNTL;
typedef union CP_RING0_PRIORITY                        regCP_RING0_PRIORITY;
typedef union CP_RING1_PRIORITY                        regCP_RING1_PRIORITY;
typedef union CP_RING2_PRIORITY                        regCP_RING2_PRIORITY;
typedef union CP_RINGID                                regCP_RINGID;
typedef union CP_RING_PRIORITY_CNTS                    regCP_RING_PRIORITY_CNTS;
typedef union CP_ROQ1_THRESHOLDS__GFX09                regCP_ROQ1_THRESHOLDS__GFX09;
typedef union CP_ROQ2_AVAIL                            regCP_ROQ2_AVAIL;
typedef union CP_ROQ2_THRESHOLDS__GFX09                regCP_ROQ2_THRESHOLDS__GFX09;
typedef union CP_ROQ_AVAIL                             regCP_ROQ_AVAIL;
typedef union CP_ROQ_IB1_STAT                          regCP_ROQ_IB1_STAT;
typedef union CP_ROQ_IB2_STAT                          regCP_ROQ_IB2_STAT;
typedef union CP_ROQ_RB_STAT                           regCP_ROQ_RB_STAT;
typedef union CP_ROQ_THRESHOLDS                        regCP_ROQ_THRESHOLDS;
typedef union CP_SAMPLE_STATUS                         regCP_SAMPLE_STATUS;
typedef union CP_SCRATCH_DATA                          regCP_SCRATCH_DATA;
typedef union CP_SCRATCH_INDEX                         regCP_SCRATCH_INDEX;
typedef union CP_SC_PSINVOC_COUNT0_HI                  regCP_SC_PSINVOC_COUNT0_HI;
typedef union CP_SC_PSINVOC_COUNT0_LO                  regCP_SC_PSINVOC_COUNT0_LO;
typedef union CP_SC_PSINVOC_COUNT1_HI                  regCP_SC_PSINVOC_COUNT1_HI;
typedef union CP_SC_PSINVOC_COUNT1_LO                  regCP_SC_PSINVOC_COUNT1_LO;
typedef union CP_SD_CNTL__GFX09                        regCP_SD_CNTL__GFX09;
typedef union CP_SEM_WAIT_TIMER                        regCP_SEM_WAIT_TIMER;
typedef union CP_SIG_SEM_ADDR_HI                       regCP_SIG_SEM_ADDR_HI;
typedef union CP_SIG_SEM_ADDR_LO                       regCP_SIG_SEM_ADDR_LO;
typedef union CP_SOFT_RESET_CNTL                       regCP_SOFT_RESET_CNTL;
typedef union CP_STALLED_STAT1                         regCP_STALLED_STAT1;
typedef union CP_STALLED_STAT2                         regCP_STALLED_STAT2;
typedef union CP_STALLED_STAT3                         regCP_STALLED_STAT3;
typedef union CP_STAT                                  regCP_STAT;
typedef union CP_STQ_AVAIL                             regCP_STQ_AVAIL;
typedef union CP_STQ_STAT                              regCP_STQ_STAT;
typedef union CP_STQ_THRESHOLDS                        regCP_STQ_THRESHOLDS;
typedef union CP_STQ_WR_STAT                           regCP_STQ_WR_STAT;
typedef union CP_STREAM_OUT_ADDR_HI                    regCP_STREAM_OUT_ADDR_HI;
typedef union CP_STREAM_OUT_ADDR_LO                    regCP_STREAM_OUT_ADDR_LO;
typedef union CP_STREAM_OUT_CONTROL                    regCP_STREAM_OUT_CONTROL;
typedef union CP_STRMOUT_CNTL                          regCP_STRMOUT_CNTL;
typedef union CP_ST_BASE_HI                            regCP_ST_BASE_HI;
typedef union CP_ST_BASE_LO                            regCP_ST_BASE_LO;
typedef union CP_ST_BUFSZ                              regCP_ST_BUFSZ;
typedef union CP_ST_CMD_BUFSZ                          regCP_ST_CMD_BUFSZ;
typedef union CP_VGT_CSINVOC_COUNT_HI                  regCP_VGT_CSINVOC_COUNT_HI;
typedef union CP_VGT_CSINVOC_COUNT_LO                  regCP_VGT_CSINVOC_COUNT_LO;
typedef union CP_VGT_DSINVOC_COUNT_HI                  regCP_VGT_DSINVOC_COUNT_HI;
typedef union CP_VGT_DSINVOC_COUNT_LO                  regCP_VGT_DSINVOC_COUNT_LO;
typedef union CP_VGT_GSINVOC_COUNT_HI                  regCP_VGT_GSINVOC_COUNT_HI;
typedef union CP_VGT_GSINVOC_COUNT_LO                  regCP_VGT_GSINVOC_COUNT_LO;
typedef union CP_VGT_GSPRIM_COUNT_HI                   regCP_VGT_GSPRIM_COUNT_HI;
typedef union CP_VGT_GSPRIM_COUNT_LO                   regCP_VGT_GSPRIM_COUNT_LO;
typedef union CP_VGT_HSINVOC_COUNT_HI                  regCP_VGT_HSINVOC_COUNT_HI;
typedef union CP_VGT_HSINVOC_COUNT_LO                  regCP_VGT_HSINVOC_COUNT_LO;
typedef union CP_VGT_IAPRIM_COUNT_HI                   regCP_VGT_IAPRIM_COUNT_HI;
typedef union CP_VGT_IAPRIM_COUNT_LO                   regCP_VGT_IAPRIM_COUNT_LO;
typedef union CP_VGT_IAVERT_COUNT_HI                   regCP_VGT_IAVERT_COUNT_HI;
typedef union CP_VGT_IAVERT_COUNT_LO                   regCP_VGT_IAVERT_COUNT_LO;
typedef union CP_VGT_VSINVOC_COUNT_HI                  regCP_VGT_VSINVOC_COUNT_HI;
typedef union CP_VGT_VSINVOC_COUNT_LO                  regCP_VGT_VSINVOC_COUNT_LO;
typedef union CP_VIRT_STATUS                           regCP_VIRT_STATUS;
typedef union CP_VMID                                  regCP_VMID;
typedef union CP_VMID_PREEMPT                          regCP_VMID_PREEMPT;
typedef union CP_VMID_RESET                            regCP_VMID_RESET;
typedef union CP_VMID_STATUS                           regCP_VMID_STATUS;
typedef union CP_WAIT_REG_MEM_TIMEOUT                  regCP_WAIT_REG_MEM_TIMEOUT;
typedef union CP_WAIT_SEM_ADDR_HI                      regCP_WAIT_SEM_ADDR_HI;
typedef union CP_WAIT_SEM_ADDR_LO                      regCP_WAIT_SEM_ADDR_LO;
typedef union CSPRIV_CONNECT                           regCSPRIV_CONNECT;
typedef union CS_COPY_STATE                            regCS_COPY_STATE;
typedef union DB_ALPHA_TO_MASK                         regDB_ALPHA_TO_MASK;
typedef union DB_CGTT_CLK_CTRL_0                       regDB_CGTT_CLK_CTRL_0;
typedef union DB_COUNT_CONTROL                         regDB_COUNT_CONTROL;
typedef union DB_CREDIT_LIMIT                          regDB_CREDIT_LIMIT;
typedef union DB_DEBUG                                 regDB_DEBUG;
typedef union DB_DEBUG2__GFX09                         regDB_DEBUG2__GFX09;
typedef union DB_DEBUG3__GFX09                         regDB_DEBUG3__GFX09;
typedef union DB_DEBUG4__GFX09                         regDB_DEBUG4__GFX09;
typedef union DB_DEPTH_BOUNDS_MAX                      regDB_DEPTH_BOUNDS_MAX;
typedef union DB_DEPTH_BOUNDS_MIN                      regDB_DEPTH_BOUNDS_MIN;
typedef union DB_DEPTH_CLEAR                           regDB_DEPTH_CLEAR;
typedef union DB_DEPTH_CONTROL                         regDB_DEPTH_CONTROL;
typedef union DB_DEPTH_SIZE__GFX09                     regDB_DEPTH_SIZE__GFX09;
typedef union DB_DEPTH_VIEW                            regDB_DEPTH_VIEW;
typedef union DB_DFSM_CONFIG                           regDB_DFSM_CONFIG;
typedef union DB_DFSM_CONTROL                          regDB_DFSM_CONTROL;
typedef union DB_DFSM_FLUSH_AUX_EVENT                  regDB_DFSM_FLUSH_AUX_EVENT;
typedef union DB_DFSM_FLUSH_ENABLE                     regDB_DFSM_FLUSH_ENABLE;
typedef union DB_DFSM_PRIMS_IN_FLIGHT                  regDB_DFSM_PRIMS_IN_FLIGHT;
typedef union DB_DFSM_TILES_IN_FLIGHT                  regDB_DFSM_TILES_IN_FLIGHT;
typedef union DB_DFSM_WATCHDOG                         regDB_DFSM_WATCHDOG;
typedef union DB_DFSM_WATERMARK__GFX09                 regDB_DFSM_WATERMARK__GFX09;
typedef union DB_EQAA                                  regDB_EQAA;
typedef union DB_EXCEPTION_CONTROL                     regDB_EXCEPTION_CONTROL;
typedef union DB_FIFO_DEPTH1__GFX09                    regDB_FIFO_DEPTH1__GFX09;
typedef union DB_FIFO_DEPTH2__GFX09                    regDB_FIFO_DEPTH2__GFX09;
typedef union DB_FREE_CACHELINES__GFX09                regDB_FREE_CACHELINES__GFX09;
typedef union DB_HTILE_DATA_BASE                       regDB_HTILE_DATA_BASE;
typedef union DB_HTILE_DATA_BASE_HI                    regDB_HTILE_DATA_BASE_HI;
typedef union DB_HTILE_SURFACE                         regDB_HTILE_SURFACE;
typedef union DB_MEM_ARB_WATERMARKS                    regDB_MEM_ARB_WATERMARKS;
typedef union DB_OCCLUSION_COUNT0_HI                   regDB_OCCLUSION_COUNT0_HI;
typedef union DB_OCCLUSION_COUNT0_LOW                  regDB_OCCLUSION_COUNT0_LOW;
typedef union DB_OCCLUSION_COUNT1_HI                   regDB_OCCLUSION_COUNT1_HI;
typedef union DB_OCCLUSION_COUNT1_LOW                  regDB_OCCLUSION_COUNT1_LOW;
typedef union DB_OCCLUSION_COUNT2_HI                   regDB_OCCLUSION_COUNT2_HI;
typedef union DB_OCCLUSION_COUNT2_LOW                  regDB_OCCLUSION_COUNT2_LOW;
typedef union DB_OCCLUSION_COUNT3_HI                   regDB_OCCLUSION_COUNT3_HI;
typedef union DB_OCCLUSION_COUNT3_LOW                  regDB_OCCLUSION_COUNT3_LOW;
typedef union DB_PERFCOUNTER0_HI                       regDB_PERFCOUNTER0_HI;
typedef union DB_PERFCOUNTER0_LO                       regDB_PERFCOUNTER0_LO;
typedef union DB_PERFCOUNTER0_SELECT                   regDB_PERFCOUNTER0_SELECT;
typedef union DB_PERFCOUNTER0_SELECT1                  regDB_PERFCOUNTER0_SELECT1;
typedef union DB_PERFCOUNTER1_HI                       regDB_PERFCOUNTER1_HI;
typedef union DB_PERFCOUNTER1_LO                       regDB_PERFCOUNTER1_LO;
typedef union DB_PERFCOUNTER1_SELECT                   regDB_PERFCOUNTER1_SELECT;
typedef union DB_PERFCOUNTER1_SELECT1                  regDB_PERFCOUNTER1_SELECT1;
typedef union DB_PERFCOUNTER2_HI                       regDB_PERFCOUNTER2_HI;
typedef union DB_PERFCOUNTER2_LO                       regDB_PERFCOUNTER2_LO;
typedef union DB_PERFCOUNTER2_SELECT                   regDB_PERFCOUNTER2_SELECT;
typedef union DB_PERFCOUNTER3_HI                       regDB_PERFCOUNTER3_HI;
typedef union DB_PERFCOUNTER3_LO                       regDB_PERFCOUNTER3_LO;
typedef union DB_PERFCOUNTER3_SELECT                   regDB_PERFCOUNTER3_SELECT;
typedef union DB_PRELOAD_CONTROL                       regDB_PRELOAD_CONTROL;
typedef union DB_READ_DEBUG_3                          regDB_READ_DEBUG_3;
typedef union DB_READ_DEBUG_4                          regDB_READ_DEBUG_4;
typedef union DB_READ_DEBUG_5                          regDB_READ_DEBUG_5;
typedef union DB_READ_DEBUG_6                          regDB_READ_DEBUG_6;
typedef union DB_READ_DEBUG_7                          regDB_READ_DEBUG_7;
typedef union DB_READ_DEBUG_8                          regDB_READ_DEBUG_8;
typedef union DB_READ_DEBUG_9                          regDB_READ_DEBUG_9;
typedef union DB_READ_DEBUG_A                          regDB_READ_DEBUG_A;
typedef union DB_READ_DEBUG_B                          regDB_READ_DEBUG_B;
typedef union DB_READ_DEBUG_C                          regDB_READ_DEBUG_C;
typedef union DB_READ_DEBUG_D                          regDB_READ_DEBUG_D;
typedef union DB_READ_DEBUG_E                          regDB_READ_DEBUG_E;
typedef union DB_READ_DEBUG_F                          regDB_READ_DEBUG_F;
typedef union DB_RENDER_CONTROL                        regDB_RENDER_CONTROL;
typedef union DB_RENDER_OVERRIDE                       regDB_RENDER_OVERRIDE;
typedef union DB_RENDER_OVERRIDE2                      regDB_RENDER_OVERRIDE2;
typedef union DB_RING_CONTROL                          regDB_RING_CONTROL;
typedef union DB_RMI_CACHE_POLICY__GFX09               regDB_RMI_CACHE_POLICY__GFX09;
typedef union DB_SHADER_CONTROL                        regDB_SHADER_CONTROL;
typedef union DB_SRESULTS_COMPARE_STATE0               regDB_SRESULTS_COMPARE_STATE0;
typedef union DB_SRESULTS_COMPARE_STATE1               regDB_SRESULTS_COMPARE_STATE1;
typedef union DB_STENCILREFMASK                        regDB_STENCILREFMASK;
typedef union DB_STENCILREFMASK_BF                     regDB_STENCILREFMASK_BF;
typedef union DB_STENCIL_CLEAR                         regDB_STENCIL_CLEAR;
typedef union DB_STENCIL_CONTROL                       regDB_STENCIL_CONTROL;
typedef union DB_STENCIL_INFO__GFX09                   regDB_STENCIL_INFO__GFX09;
typedef union DB_STENCIL_INFO2__GFX09                  regDB_STENCIL_INFO2__GFX09;
typedef union DB_STENCIL_READ_BASE                     regDB_STENCIL_READ_BASE;
typedef union DB_STENCIL_READ_BASE_HI                  regDB_STENCIL_READ_BASE_HI;
typedef union DB_STENCIL_WRITE_BASE                    regDB_STENCIL_WRITE_BASE;
typedef union DB_STENCIL_WRITE_BASE_HI                 regDB_STENCIL_WRITE_BASE_HI;
typedef union DB_SUBTILE_CONTROL                       regDB_SUBTILE_CONTROL;
typedef union DB_WATERMARKS__GFX09                     regDB_WATERMARKS__GFX09;
typedef union DB_ZPASS_COUNT_HI                        regDB_ZPASS_COUNT_HI;
typedef union DB_ZPASS_COUNT_LOW                       regDB_ZPASS_COUNT_LOW;
typedef union DB_Z_INFO__GFX09                         regDB_Z_INFO__GFX09;
typedef union DB_Z_INFO2__GFX09                        regDB_Z_INFO2__GFX09;
typedef union DB_Z_READ_BASE                           regDB_Z_READ_BASE;
typedef union DB_Z_READ_BASE_HI                        regDB_Z_READ_BASE_HI;
typedef union DB_Z_WRITE_BASE                          regDB_Z_WRITE_BASE;
typedef union DB_Z_WRITE_BASE_HI                       regDB_Z_WRITE_BASE_HI;
typedef union DEBUG_DATA                               regDEBUG_DATA;
typedef union DEBUG_INDEX                              regDEBUG_INDEX;
typedef union DIDT_DBR_CTRL0__GFX09                    regDIDT_DBR_CTRL0__GFX09;
typedef union DIDT_DBR_CTRL1__GFX09                    regDIDT_DBR_CTRL1__GFX09;
typedef union DIDT_DBR_CTRL2__GFX09                    regDIDT_DBR_CTRL2__GFX09;
typedef union DIDT_DBR_CTRL3__GFX09                    regDIDT_DBR_CTRL3__GFX09;
typedef union DIDT_DBR_EDC_CTRL__GFX09                 regDIDT_DBR_EDC_CTRL__GFX09;
typedef union DIDT_DBR_EDC_OVERFLOW__GFX09             regDIDT_DBR_EDC_OVERFLOW__GFX09;
typedef union DIDT_DBR_EDC_ROLLING_POWER_DELTA__GFX09  regDIDT_DBR_EDC_ROLLING_POWER_DELTA__GFX09;
typedef union DIDT_DBR_EDC_STALL_DELAY_1__GFX09        regDIDT_DBR_EDC_STALL_DELAY_1__GFX09;
typedef union DIDT_DBR_EDC_STALL_PATTERN_1_2__GFX09    regDIDT_DBR_EDC_STALL_PATTERN_1_2__GFX09;
typedef union DIDT_DBR_EDC_STALL_PATTERN_3_4__GFX09    regDIDT_DBR_EDC_STALL_PATTERN_3_4__GFX09;
typedef union DIDT_DBR_EDC_STALL_PATTERN_5_6__GFX09    regDIDT_DBR_EDC_STALL_PATTERN_5_6__GFX09;
typedef union DIDT_DBR_EDC_STALL_PATTERN_7__GFX09      regDIDT_DBR_EDC_STALL_PATTERN_7__GFX09;
typedef union DIDT_DBR_EDC_STATUS__GFX09               regDIDT_DBR_EDC_STATUS__GFX09;
typedef union DIDT_DBR_EDC_THRESHOLD__GFX09            regDIDT_DBR_EDC_THRESHOLD__GFX09;
typedef union DIDT_DBR_STALL_AUTO_RELEASE_CTRL__GFX09  regDIDT_DBR_STALL_AUTO_RELEASE_CTRL__GFX09;
typedef union DIDT_DBR_STALL_CTRL__GFX09               regDIDT_DBR_STALL_CTRL__GFX09;
typedef union DIDT_DBR_STALL_EVENT_COUNTER__GFX09      regDIDT_DBR_STALL_EVENT_COUNTER__GFX09;
typedef union DIDT_DBR_STALL_PATTERN_1_2__GFX09        regDIDT_DBR_STALL_PATTERN_1_2__GFX09;
typedef union DIDT_DBR_STALL_PATTERN_3_4__GFX09        regDIDT_DBR_STALL_PATTERN_3_4__GFX09;
typedef union DIDT_DBR_STALL_PATTERN_5_6__GFX09        regDIDT_DBR_STALL_PATTERN_5_6__GFX09;
typedef union DIDT_DBR_STALL_PATTERN_7__GFX09          regDIDT_DBR_STALL_PATTERN_7__GFX09;
typedef union DIDT_DBR_TUNING_CTRL__GFX09              regDIDT_DBR_TUNING_CTRL__GFX09;
typedef union DIDT_DBR_WEIGHT0_3__GFX09                regDIDT_DBR_WEIGHT0_3__GFX09;
typedef union DIDT_DBR_WEIGHT4_7__GFX09                regDIDT_DBR_WEIGHT4_7__GFX09;
typedef union DIDT_DBR_WEIGHT8_11__GFX09               regDIDT_DBR_WEIGHT8_11__GFX09;
typedef union DIDT_DB_CTRL0                            regDIDT_DB_CTRL0;
typedef union DIDT_DB_CTRL1                            regDIDT_DB_CTRL1;
typedef union DIDT_DB_CTRL2                            regDIDT_DB_CTRL2;
typedef union DIDT_DB_CTRL3                            regDIDT_DB_CTRL3;
typedef union DIDT_DB_EDC_CTRL                         regDIDT_DB_EDC_CTRL;
typedef union DIDT_DB_EDC_OVERFLOW                     regDIDT_DB_EDC_OVERFLOW;
typedef union DIDT_DB_EDC_ROLLING_POWER_DELTA          regDIDT_DB_EDC_ROLLING_POWER_DELTA;
typedef union DIDT_DB_EDC_STALL_DELAY_1__GFX09         regDIDT_DB_EDC_STALL_DELAY_1__GFX09;
typedef union DIDT_DB_EDC_STALL_PATTERN_1_2            regDIDT_DB_EDC_STALL_PATTERN_1_2;
typedef union DIDT_DB_EDC_STALL_PATTERN_3_4            regDIDT_DB_EDC_STALL_PATTERN_3_4;
typedef union DIDT_DB_EDC_STALL_PATTERN_5_6            regDIDT_DB_EDC_STALL_PATTERN_5_6;
typedef union DIDT_DB_EDC_STALL_PATTERN_7              regDIDT_DB_EDC_STALL_PATTERN_7;
typedef union DIDT_DB_EDC_STATUS                       regDIDT_DB_EDC_STATUS;
typedef union DIDT_DB_EDC_THRESHOLD                    regDIDT_DB_EDC_THRESHOLD;
typedef union DIDT_DB_STALL_AUTO_RELEASE_CTRL          regDIDT_DB_STALL_AUTO_RELEASE_CTRL;
typedef union DIDT_DB_STALL_CTRL                       regDIDT_DB_STALL_CTRL;
typedef union DIDT_DB_STALL_EVENT_COUNTER              regDIDT_DB_STALL_EVENT_COUNTER;
typedef union DIDT_DB_STALL_PATTERN_1_2                regDIDT_DB_STALL_PATTERN_1_2;
typedef union DIDT_DB_STALL_PATTERN_3_4                regDIDT_DB_STALL_PATTERN_3_4;
typedef union DIDT_DB_STALL_PATTERN_5_6                regDIDT_DB_STALL_PATTERN_5_6;
typedef union DIDT_DB_STALL_PATTERN_7                  regDIDT_DB_STALL_PATTERN_7;
typedef union DIDT_DB_TUNING_CTRL                      regDIDT_DB_TUNING_CTRL;
typedef union DIDT_DB_WEIGHT0_3                        regDIDT_DB_WEIGHT0_3;
typedef union DIDT_DB_WEIGHT4_7                        regDIDT_DB_WEIGHT4_7;
typedef union DIDT_DB_WEIGHT8_11                       regDIDT_DB_WEIGHT8_11;
typedef union DIDT_IND_DATA                            regDIDT_IND_DATA;
typedef union DIDT_IND_INDEX                           regDIDT_IND_INDEX;
typedef union DIDT_SQ_CTRL0                            regDIDT_SQ_CTRL0;
typedef union DIDT_SQ_CTRL1                            regDIDT_SQ_CTRL1;
typedef union DIDT_SQ_CTRL2                            regDIDT_SQ_CTRL2;
typedef union DIDT_SQ_CTRL3                            regDIDT_SQ_CTRL3;
typedef union DIDT_SQ_EDC_CTRL                         regDIDT_SQ_EDC_CTRL;
typedef union DIDT_SQ_EDC_OVERFLOW                     regDIDT_SQ_EDC_OVERFLOW;
typedef union DIDT_SQ_EDC_ROLLING_POWER_DELTA          regDIDT_SQ_EDC_ROLLING_POWER_DELTA;
typedef union DIDT_SQ_EDC_STALL_DELAY_1__GFX09         regDIDT_SQ_EDC_STALL_DELAY_1__GFX09;
typedef union DIDT_SQ_EDC_STALL_DELAY_2__GFX09         regDIDT_SQ_EDC_STALL_DELAY_2__GFX09;
typedef union DIDT_SQ_EDC_STALL_DELAY_3__GFX09         regDIDT_SQ_EDC_STALL_DELAY_3__GFX09;
typedef union DIDT_SQ_EDC_STALL_DELAY_4__GFX09         regDIDT_SQ_EDC_STALL_DELAY_4__GFX09;
typedef union DIDT_SQ_EDC_STALL_PATTERN_1_2            regDIDT_SQ_EDC_STALL_PATTERN_1_2;
typedef union DIDT_SQ_EDC_STALL_PATTERN_3_4            regDIDT_SQ_EDC_STALL_PATTERN_3_4;
typedef union DIDT_SQ_EDC_STALL_PATTERN_5_6            regDIDT_SQ_EDC_STALL_PATTERN_5_6;
typedef union DIDT_SQ_EDC_STALL_PATTERN_7              regDIDT_SQ_EDC_STALL_PATTERN_7;
typedef union DIDT_SQ_EDC_STATUS                       regDIDT_SQ_EDC_STATUS;
typedef union DIDT_SQ_EDC_THRESHOLD                    regDIDT_SQ_EDC_THRESHOLD;
typedef union DIDT_SQ_STALL_AUTO_RELEASE_CTRL          regDIDT_SQ_STALL_AUTO_RELEASE_CTRL;
typedef union DIDT_SQ_STALL_CTRL                       regDIDT_SQ_STALL_CTRL;
typedef union DIDT_SQ_STALL_EVENT_COUNTER              regDIDT_SQ_STALL_EVENT_COUNTER;
typedef union DIDT_SQ_STALL_PATTERN_1_2                regDIDT_SQ_STALL_PATTERN_1_2;
typedef union DIDT_SQ_STALL_PATTERN_3_4                regDIDT_SQ_STALL_PATTERN_3_4;
typedef union DIDT_SQ_STALL_PATTERN_5_6                regDIDT_SQ_STALL_PATTERN_5_6;
typedef union DIDT_SQ_STALL_PATTERN_7                  regDIDT_SQ_STALL_PATTERN_7;
typedef union DIDT_SQ_TUNING_CTRL                      regDIDT_SQ_TUNING_CTRL;
typedef union DIDT_SQ_WEIGHT0_3                        regDIDT_SQ_WEIGHT0_3;
typedef union DIDT_SQ_WEIGHT4_7                        regDIDT_SQ_WEIGHT4_7;
typedef union DIDT_SQ_WEIGHT8_11                       regDIDT_SQ_WEIGHT8_11;
typedef union DIDT_TCP_CTRL0                           regDIDT_TCP_CTRL0;
typedef union DIDT_TCP_CTRL1                           regDIDT_TCP_CTRL1;
typedef union DIDT_TCP_CTRL2                           regDIDT_TCP_CTRL2;
typedef union DIDT_TCP_CTRL3                           regDIDT_TCP_CTRL3;
typedef union DIDT_TCP_EDC_CTRL                        regDIDT_TCP_EDC_CTRL;
typedef union DIDT_TCP_EDC_OVERFLOW                    regDIDT_TCP_EDC_OVERFLOW;
typedef union DIDT_TCP_EDC_ROLLING_POWER_DELTA         regDIDT_TCP_EDC_ROLLING_POWER_DELTA;
typedef union DIDT_TCP_EDC_STALL_DELAY_1__GFX09        regDIDT_TCP_EDC_STALL_DELAY_1__GFX09;
typedef union DIDT_TCP_EDC_STALL_DELAY_2__GFX09        regDIDT_TCP_EDC_STALL_DELAY_2__GFX09;
typedef union DIDT_TCP_EDC_STALL_DELAY_3__GFX09        regDIDT_TCP_EDC_STALL_DELAY_3__GFX09;
typedef union DIDT_TCP_EDC_STALL_DELAY_4__GFX09        regDIDT_TCP_EDC_STALL_DELAY_4__GFX09;
typedef union DIDT_TCP_EDC_STALL_PATTERN_1_2           regDIDT_TCP_EDC_STALL_PATTERN_1_2;
typedef union DIDT_TCP_EDC_STALL_PATTERN_3_4           regDIDT_TCP_EDC_STALL_PATTERN_3_4;
typedef union DIDT_TCP_EDC_STALL_PATTERN_5_6           regDIDT_TCP_EDC_STALL_PATTERN_5_6;
typedef union DIDT_TCP_EDC_STALL_PATTERN_7             regDIDT_TCP_EDC_STALL_PATTERN_7;
typedef union DIDT_TCP_EDC_STATUS                      regDIDT_TCP_EDC_STATUS;
typedef union DIDT_TCP_EDC_THRESHOLD                   regDIDT_TCP_EDC_THRESHOLD;
typedef union DIDT_TCP_STALL_AUTO_RELEASE_CTRL         regDIDT_TCP_STALL_AUTO_RELEASE_CTRL;
typedef union DIDT_TCP_STALL_CTRL                      regDIDT_TCP_STALL_CTRL;
typedef union DIDT_TCP_STALL_EVENT_COUNTER             regDIDT_TCP_STALL_EVENT_COUNTER;
typedef union DIDT_TCP_STALL_PATTERN_1_2               regDIDT_TCP_STALL_PATTERN_1_2;
typedef union DIDT_TCP_STALL_PATTERN_3_4               regDIDT_TCP_STALL_PATTERN_3_4;
typedef union DIDT_TCP_STALL_PATTERN_5_6               regDIDT_TCP_STALL_PATTERN_5_6;
typedef union DIDT_TCP_STALL_PATTERN_7                 regDIDT_TCP_STALL_PATTERN_7;
typedef union DIDT_TCP_TUNING_CTRL                     regDIDT_TCP_TUNING_CTRL;
typedef union DIDT_TCP_WEIGHT0_3                       regDIDT_TCP_WEIGHT0_3;
typedef union DIDT_TCP_WEIGHT4_7                       regDIDT_TCP_WEIGHT4_7;
typedef union DIDT_TCP_WEIGHT8_11                      regDIDT_TCP_WEIGHT8_11;
typedef union DIDT_TD_CTRL0                            regDIDT_TD_CTRL0;
typedef union DIDT_TD_CTRL1                            regDIDT_TD_CTRL1;
typedef union DIDT_TD_CTRL2                            regDIDT_TD_CTRL2;
typedef union DIDT_TD_CTRL3                            regDIDT_TD_CTRL3;
typedef union DIDT_TD_EDC_CTRL                         regDIDT_TD_EDC_CTRL;
typedef union DIDT_TD_EDC_OVERFLOW                     regDIDT_TD_EDC_OVERFLOW;
typedef union DIDT_TD_EDC_ROLLING_POWER_DELTA          regDIDT_TD_EDC_ROLLING_POWER_DELTA;
typedef union DIDT_TD_EDC_STALL_DELAY_1__GFX09         regDIDT_TD_EDC_STALL_DELAY_1__GFX09;
typedef union DIDT_TD_EDC_STALL_DELAY_2__GFX09         regDIDT_TD_EDC_STALL_DELAY_2__GFX09;
typedef union DIDT_TD_EDC_STALL_DELAY_3__GFX09         regDIDT_TD_EDC_STALL_DELAY_3__GFX09;
typedef union DIDT_TD_EDC_STALL_DELAY_4__GFX09         regDIDT_TD_EDC_STALL_DELAY_4__GFX09;
typedef union DIDT_TD_EDC_STALL_PATTERN_1_2            regDIDT_TD_EDC_STALL_PATTERN_1_2;
typedef union DIDT_TD_EDC_STALL_PATTERN_3_4            regDIDT_TD_EDC_STALL_PATTERN_3_4;
typedef union DIDT_TD_EDC_STALL_PATTERN_5_6            regDIDT_TD_EDC_STALL_PATTERN_5_6;
typedef union DIDT_TD_EDC_STALL_PATTERN_7              regDIDT_TD_EDC_STALL_PATTERN_7;
typedef union DIDT_TD_EDC_STATUS                       regDIDT_TD_EDC_STATUS;
typedef union DIDT_TD_EDC_THRESHOLD                    regDIDT_TD_EDC_THRESHOLD;
typedef union DIDT_TD_STALL_AUTO_RELEASE_CTRL          regDIDT_TD_STALL_AUTO_RELEASE_CTRL;
typedef union DIDT_TD_STALL_CTRL                       regDIDT_TD_STALL_CTRL;
typedef union DIDT_TD_STALL_EVENT_COUNTER              regDIDT_TD_STALL_EVENT_COUNTER;
typedef union DIDT_TD_STALL_PATTERN_1_2                regDIDT_TD_STALL_PATTERN_1_2;
typedef union DIDT_TD_STALL_PATTERN_3_4                regDIDT_TD_STALL_PATTERN_3_4;
typedef union DIDT_TD_STALL_PATTERN_5_6                regDIDT_TD_STALL_PATTERN_5_6;
typedef union DIDT_TD_STALL_PATTERN_7                  regDIDT_TD_STALL_PATTERN_7;
typedef union DIDT_TD_TUNING_CTRL                      regDIDT_TD_TUNING_CTRL;
typedef union DIDT_TD_WEIGHT0_3                        regDIDT_TD_WEIGHT0_3;
typedef union DIDT_TD_WEIGHT4_7                        regDIDT_TD_WEIGHT4_7;
typedef union DIDT_TD_WEIGHT8_11                       regDIDT_TD_WEIGHT8_11;
typedef union GB_ADDR_CONFIG                           regGB_ADDR_CONFIG;
typedef union GB_ADDR_CONFIG_READ                      regGB_ADDR_CONFIG_READ;
typedef union GB_BACKEND_MAP                           regGB_BACKEND_MAP;
typedef union GB_EDC_MODE                              regGB_EDC_MODE;
typedef union GB_GPU_ID                                regGB_GPU_ID;
typedef union GB_MACROTILE_MODE0                       regGB_MACROTILE_MODE0;
typedef union GB_MACROTILE_MODE1                       regGB_MACROTILE_MODE1;
typedef union GB_MACROTILE_MODE10                      regGB_MACROTILE_MODE10;
typedef union GB_MACROTILE_MODE11                      regGB_MACROTILE_MODE11;
typedef union GB_MACROTILE_MODE12                      regGB_MACROTILE_MODE12;
typedef union GB_MACROTILE_MODE13                      regGB_MACROTILE_MODE13;
typedef union GB_MACROTILE_MODE14                      regGB_MACROTILE_MODE14;
typedef union GB_MACROTILE_MODE15                      regGB_MACROTILE_MODE15;
typedef union GB_MACROTILE_MODE2                       regGB_MACROTILE_MODE2;
typedef union GB_MACROTILE_MODE3                       regGB_MACROTILE_MODE3;
typedef union GB_MACROTILE_MODE4                       regGB_MACROTILE_MODE4;
typedef union GB_MACROTILE_MODE5                       regGB_MACROTILE_MODE5;
typedef union GB_MACROTILE_MODE6                       regGB_MACROTILE_MODE6;
typedef union GB_MACROTILE_MODE7                       regGB_MACROTILE_MODE7;
typedef union GB_MACROTILE_MODE8                       regGB_MACROTILE_MODE8;
typedef union GB_MACROTILE_MODE9                       regGB_MACROTILE_MODE9;
typedef union GB_TILE_MODE0                            regGB_TILE_MODE0;
typedef union GB_TILE_MODE1                            regGB_TILE_MODE1;
typedef union GB_TILE_MODE10                           regGB_TILE_MODE10;
typedef union GB_TILE_MODE11                           regGB_TILE_MODE11;
typedef union GB_TILE_MODE12                           regGB_TILE_MODE12;
typedef union GB_TILE_MODE13                           regGB_TILE_MODE13;
typedef union GB_TILE_MODE14                           regGB_TILE_MODE14;
typedef union GB_TILE_MODE15                           regGB_TILE_MODE15;
typedef union GB_TILE_MODE16                           regGB_TILE_MODE16;
typedef union GB_TILE_MODE17                           regGB_TILE_MODE17;
typedef union GB_TILE_MODE18                           regGB_TILE_MODE18;
typedef union GB_TILE_MODE19                           regGB_TILE_MODE19;
typedef union GB_TILE_MODE2                            regGB_TILE_MODE2;
typedef union GB_TILE_MODE20                           regGB_TILE_MODE20;
typedef union GB_TILE_MODE21                           regGB_TILE_MODE21;
typedef union GB_TILE_MODE22                           regGB_TILE_MODE22;
typedef union GB_TILE_MODE23                           regGB_TILE_MODE23;
typedef union GB_TILE_MODE24                           regGB_TILE_MODE24;
typedef union GB_TILE_MODE25                           regGB_TILE_MODE25;
typedef union GB_TILE_MODE26                           regGB_TILE_MODE26;
typedef union GB_TILE_MODE27                           regGB_TILE_MODE27;
typedef union GB_TILE_MODE28                           regGB_TILE_MODE28;
typedef union GB_TILE_MODE29                           regGB_TILE_MODE29;
typedef union GB_TILE_MODE3                            regGB_TILE_MODE3;
typedef union GB_TILE_MODE30                           regGB_TILE_MODE30;
typedef union GB_TILE_MODE31                           regGB_TILE_MODE31;
typedef union GB_TILE_MODE4                            regGB_TILE_MODE4;
typedef union GB_TILE_MODE5                            regGB_TILE_MODE5;
typedef union GB_TILE_MODE6                            regGB_TILE_MODE6;
typedef union GB_TILE_MODE7                            regGB_TILE_MODE7;
typedef union GB_TILE_MODE8                            regGB_TILE_MODE8;
typedef union GB_TILE_MODE9                            regGB_TILE_MODE9;
typedef union GCEA_CGTT_CLK_CTRL__GFX09                regGCEA_CGTT_CLK_CTRL__GFX09;
typedef union GCEA_PERFCOUNTER0_CFG                    regGCEA_PERFCOUNTER0_CFG;
typedef union GCEA_PERFCOUNTER1_CFG                    regGCEA_PERFCOUNTER1_CFG;
typedef union GCEA_PERFCOUNTER_HI                      regGCEA_PERFCOUNTER_HI;
typedef union GCEA_PERFCOUNTER_LO                      regGCEA_PERFCOUNTER_LO;
typedef union GCEA_PERFCOUNTER_RSLT_CNTL               regGCEA_PERFCOUNTER_RSLT_CNTL;
typedef union GC_CAC_ACC_BCI0                          regGC_CAC_ACC_BCI0;
typedef union GC_CAC_ACC_BCI1                          regGC_CAC_ACC_BCI1;
typedef union GC_CAC_ACC_CB0                           regGC_CAC_ACC_CB0;
typedef union GC_CAC_ACC_CB1                           regGC_CAC_ACC_CB1;
typedef union GC_CAC_ACC_CB2                           regGC_CAC_ACC_CB2;
typedef union GC_CAC_ACC_CB3                           regGC_CAC_ACC_CB3;
typedef union GC_CAC_ACC_CBR0                          regGC_CAC_ACC_CBR0;
typedef union GC_CAC_ACC_CBR1                          regGC_CAC_ACC_CBR1;
typedef union GC_CAC_ACC_CBR2                          regGC_CAC_ACC_CBR2;
typedef union GC_CAC_ACC_CBR3                          regGC_CAC_ACC_CBR3;
typedef union GC_CAC_ACC_CP0                           regGC_CAC_ACC_CP0;
typedef union GC_CAC_ACC_CP1                           regGC_CAC_ACC_CP1;
typedef union GC_CAC_ACC_CP2                           regGC_CAC_ACC_CP2;
typedef union GC_CAC_ACC_CU0                           regGC_CAC_ACC_CU0;
typedef union GC_CAC_ACC_CU1__GFX09                    regGC_CAC_ACC_CU1__GFX09;
typedef union GC_CAC_ACC_CU10__GFX09                   regGC_CAC_ACC_CU10__GFX09;
typedef union GC_CAC_ACC_CU11__GFX09                   regGC_CAC_ACC_CU11__GFX09;
typedef union GC_CAC_ACC_CU12__GFX09                   regGC_CAC_ACC_CU12__GFX09;
typedef union GC_CAC_ACC_CU13__GFX09                   regGC_CAC_ACC_CU13__GFX09;
typedef union GC_CAC_ACC_CU14__GFX09                   regGC_CAC_ACC_CU14__GFX09;
typedef union GC_CAC_ACC_CU15__GFX09                   regGC_CAC_ACC_CU15__GFX09;
typedef union GC_CAC_ACC_CU2__GFX09                    regGC_CAC_ACC_CU2__GFX09;
typedef union GC_CAC_ACC_CU3__GFX09                    regGC_CAC_ACC_CU3__GFX09;
typedef union GC_CAC_ACC_CU4__GFX09                    regGC_CAC_ACC_CU4__GFX09;
typedef union GC_CAC_ACC_CU5__GFX09                    regGC_CAC_ACC_CU5__GFX09;
typedef union GC_CAC_ACC_CU6__GFX09                    regGC_CAC_ACC_CU6__GFX09;
typedef union GC_CAC_ACC_CU7__GFX09                    regGC_CAC_ACC_CU7__GFX09;
typedef union GC_CAC_ACC_CU8__GFX09                    regGC_CAC_ACC_CU8__GFX09;
typedef union GC_CAC_ACC_CU9__GFX09                    regGC_CAC_ACC_CU9__GFX09;
typedef union GC_CAC_ACC_DB0                           regGC_CAC_ACC_DB0;
typedef union GC_CAC_ACC_DB1                           regGC_CAC_ACC_DB1;
typedef union GC_CAC_ACC_DB2                           regGC_CAC_ACC_DB2;
typedef union GC_CAC_ACC_DB3                           regGC_CAC_ACC_DB3;
typedef union GC_CAC_ACC_DBR0                          regGC_CAC_ACC_DBR0;
typedef union GC_CAC_ACC_DBR1                          regGC_CAC_ACC_DBR1;
typedef union GC_CAC_ACC_DBR2                          regGC_CAC_ACC_DBR2;
typedef union GC_CAC_ACC_DBR3                          regGC_CAC_ACC_DBR3;
typedef union GC_CAC_ACC_EA0                           regGC_CAC_ACC_EA0;
typedef union GC_CAC_ACC_EA1                           regGC_CAC_ACC_EA1;
typedef union GC_CAC_ACC_EA2                           regGC_CAC_ACC_EA2;
typedef union GC_CAC_ACC_EA3                           regGC_CAC_ACC_EA3;
typedef union GC_CAC_ACC_EA4                           regGC_CAC_ACC_EA4;
typedef union GC_CAC_ACC_EA5                           regGC_CAC_ACC_EA5;
typedef union GC_CAC_ACC_GDS0                          regGC_CAC_ACC_GDS0;
typedef union GC_CAC_ACC_GDS1                          regGC_CAC_ACC_GDS1;
typedef union GC_CAC_ACC_GDS2                          regGC_CAC_ACC_GDS2;
typedef union GC_CAC_ACC_GDS3                          regGC_CAC_ACC_GDS3;
typedef union GC_CAC_ACC_IA0__GFX09                    regGC_CAC_ACC_IA0__GFX09;
typedef union GC_CAC_ACC_LDS0                          regGC_CAC_ACC_LDS0;
typedef union GC_CAC_ACC_LDS1                          regGC_CAC_ACC_LDS1;
typedef union GC_CAC_ACC_LDS2                          regGC_CAC_ACC_LDS2;
typedef union GC_CAC_ACC_LDS3                          regGC_CAC_ACC_LDS3;
typedef union GC_CAC_ACC_PA0                           regGC_CAC_ACC_PA0;
typedef union GC_CAC_ACC_PA1                           regGC_CAC_ACC_PA1;
typedef union GC_CAC_ACC_PC0                           regGC_CAC_ACC_PC0;
typedef union GC_CAC_ACC_RMI0                          regGC_CAC_ACC_RMI0;
typedef union GC_CAC_ACC_SC0                           regGC_CAC_ACC_SC0;
typedef union GC_CAC_ACC_SPI0                          regGC_CAC_ACC_SPI0;
typedef union GC_CAC_ACC_SPI1                          regGC_CAC_ACC_SPI1;
typedef union GC_CAC_ACC_SPI2                          regGC_CAC_ACC_SPI2;
typedef union GC_CAC_ACC_SPI3                          regGC_CAC_ACC_SPI3;
typedef union GC_CAC_ACC_SPI4                          regGC_CAC_ACC_SPI4;
typedef union GC_CAC_ACC_SPI5                          regGC_CAC_ACC_SPI5;
typedef union GC_CAC_ACC_SQ0_LOWER                     regGC_CAC_ACC_SQ0_LOWER;
typedef union GC_CAC_ACC_SQ0_UPPER                     regGC_CAC_ACC_SQ0_UPPER;
typedef union GC_CAC_ACC_SQ1_LOWER                     regGC_CAC_ACC_SQ1_LOWER;
typedef union GC_CAC_ACC_SQ1_UPPER                     regGC_CAC_ACC_SQ1_UPPER;
typedef union GC_CAC_ACC_SQ2_LOWER                     regGC_CAC_ACC_SQ2_LOWER;
typedef union GC_CAC_ACC_SQ2_UPPER                     regGC_CAC_ACC_SQ2_UPPER;
typedef union GC_CAC_ACC_SQ3_LOWER                     regGC_CAC_ACC_SQ3_LOWER;
typedef union GC_CAC_ACC_SQ3_UPPER                     regGC_CAC_ACC_SQ3_UPPER;
typedef union GC_CAC_ACC_SQ4_LOWER                     regGC_CAC_ACC_SQ4_LOWER;
typedef union GC_CAC_ACC_SQ4_UPPER                     regGC_CAC_ACC_SQ4_UPPER;
typedef union GC_CAC_ACC_SQ5_LOWER                     regGC_CAC_ACC_SQ5_LOWER;
typedef union GC_CAC_ACC_SQ5_UPPER                     regGC_CAC_ACC_SQ5_UPPER;
typedef union GC_CAC_ACC_SQ6_LOWER                     regGC_CAC_ACC_SQ6_LOWER;
typedef union GC_CAC_ACC_SQ6_UPPER                     regGC_CAC_ACC_SQ6_UPPER;
typedef union GC_CAC_ACC_SQ7_LOWER                     regGC_CAC_ACC_SQ7_LOWER;
typedef union GC_CAC_ACC_SQ7_UPPER                     regGC_CAC_ACC_SQ7_UPPER;
typedef union GC_CAC_ACC_SQ8_LOWER                     regGC_CAC_ACC_SQ8_LOWER;
typedef union GC_CAC_ACC_SQ8_UPPER                     regGC_CAC_ACC_SQ8_UPPER;
typedef union GC_CAC_ACC_SX0                           regGC_CAC_ACC_SX0;
typedef union GC_CAC_ACC_SXRB0                         regGC_CAC_ACC_SXRB0;
typedef union GC_CAC_ACC_SXRB1__GFX09                  regGC_CAC_ACC_SXRB1__GFX09;
typedef union GC_CAC_ACC_TA0                           regGC_CAC_ACC_TA0;
typedef union GC_CAC_ACC_TCC0__GFX09                   regGC_CAC_ACC_TCC0__GFX09;
typedef union GC_CAC_ACC_TCC1__GFX09                   regGC_CAC_ACC_TCC1__GFX09;
typedef union GC_CAC_ACC_TCC2__GFX09                   regGC_CAC_ACC_TCC2__GFX09;
typedef union GC_CAC_ACC_TCC3__GFX09                   regGC_CAC_ACC_TCC3__GFX09;
typedef union GC_CAC_ACC_TCC4__GFX09                   regGC_CAC_ACC_TCC4__GFX09;
typedef union GC_CAC_ACC_TCP0                          regGC_CAC_ACC_TCP0;
typedef union GC_CAC_ACC_TCP1                          regGC_CAC_ACC_TCP1;
typedef union GC_CAC_ACC_TCP2                          regGC_CAC_ACC_TCP2;
typedef union GC_CAC_ACC_TCP3                          regGC_CAC_ACC_TCP3;
typedef union GC_CAC_ACC_TCP4                          regGC_CAC_ACC_TCP4;
typedef union GC_CAC_ACC_TD0                           regGC_CAC_ACC_TD0;
typedef union GC_CAC_ACC_TD1                           regGC_CAC_ACC_TD1;
typedef union GC_CAC_ACC_TD2                           regGC_CAC_ACC_TD2;
typedef union GC_CAC_ACC_TD3                           regGC_CAC_ACC_TD3;
typedef union GC_CAC_ACC_TD4                           regGC_CAC_ACC_TD4;
typedef union GC_CAC_ACC_TD5                           regGC_CAC_ACC_TD5;
typedef union GC_CAC_ACC_UTCL2_ATCL20                  regGC_CAC_ACC_UTCL2_ATCL20;
typedef union GC_CAC_ACC_UTCL2_ATCL21                  regGC_CAC_ACC_UTCL2_ATCL21;
typedef union GC_CAC_ACC_UTCL2_ATCL22                  regGC_CAC_ACC_UTCL2_ATCL22;
typedef union GC_CAC_ACC_UTCL2_ATCL23                  regGC_CAC_ACC_UTCL2_ATCL23;
typedef union GC_CAC_ACC_UTCL2_ATCL24                  regGC_CAC_ACC_UTCL2_ATCL24;
typedef union GC_CAC_ACC_UTCL2_ROUTER0                 regGC_CAC_ACC_UTCL2_ROUTER0;
typedef union GC_CAC_ACC_UTCL2_ROUTER1                 regGC_CAC_ACC_UTCL2_ROUTER1;
typedef union GC_CAC_ACC_UTCL2_ROUTER2                 regGC_CAC_ACC_UTCL2_ROUTER2;
typedef union GC_CAC_ACC_UTCL2_ROUTER3                 regGC_CAC_ACC_UTCL2_ROUTER3;
typedef union GC_CAC_ACC_UTCL2_ROUTER4                 regGC_CAC_ACC_UTCL2_ROUTER4;
typedef union GC_CAC_ACC_UTCL2_ROUTER5                 regGC_CAC_ACC_UTCL2_ROUTER5;
typedef union GC_CAC_ACC_UTCL2_ROUTER6                 regGC_CAC_ACC_UTCL2_ROUTER6;
typedef union GC_CAC_ACC_UTCL2_ROUTER7                 regGC_CAC_ACC_UTCL2_ROUTER7;
typedef union GC_CAC_ACC_UTCL2_ROUTER8                 regGC_CAC_ACC_UTCL2_ROUTER8;
typedef union GC_CAC_ACC_UTCL2_ROUTER9                 regGC_CAC_ACC_UTCL2_ROUTER9;
typedef union GC_CAC_ACC_UTCL2_VML20                   regGC_CAC_ACC_UTCL2_VML20;
typedef union GC_CAC_ACC_UTCL2_VML21                   regGC_CAC_ACC_UTCL2_VML21;
typedef union GC_CAC_ACC_UTCL2_VML22                   regGC_CAC_ACC_UTCL2_VML22;
typedef union GC_CAC_ACC_UTCL2_VML23                   regGC_CAC_ACC_UTCL2_VML23;
typedef union GC_CAC_ACC_UTCL2_VML24                   regGC_CAC_ACC_UTCL2_VML24;
typedef union GC_CAC_ACC_UTCL2_WALKER0                 regGC_CAC_ACC_UTCL2_WALKER0;
typedef union GC_CAC_ACC_UTCL2_WALKER1                 regGC_CAC_ACC_UTCL2_WALKER1;
typedef union GC_CAC_ACC_UTCL2_WALKER2                 regGC_CAC_ACC_UTCL2_WALKER2;
typedef union GC_CAC_ACC_UTCL2_WALKER3                 regGC_CAC_ACC_UTCL2_WALKER3;
typedef union GC_CAC_ACC_UTCL2_WALKER4                 regGC_CAC_ACC_UTCL2_WALKER4;
typedef union GC_CAC_ACC_VGT0__GFX09                   regGC_CAC_ACC_VGT0__GFX09;
typedef union GC_CAC_ACC_VGT1__GFX09                   regGC_CAC_ACC_VGT1__GFX09;
typedef union GC_CAC_ACC_VGT2__GFX09                   regGC_CAC_ACC_VGT2__GFX09;
typedef union GC_CAC_ACC_WD0__GFX09                    regGC_CAC_ACC_WD0__GFX09;
typedef union GC_CAC_AGGR_LOWER                        regGC_CAC_AGGR_LOWER;
typedef union GC_CAC_AGGR_UPPER                        regGC_CAC_AGGR_UPPER;
typedef union GC_CAC_CGTT_CLK_CTRL                     regGC_CAC_CGTT_CLK_CTRL;
typedef union GC_CAC_CNTL__GFX09                       regGC_CAC_CNTL__GFX09;
typedef union GC_CAC_CTRL_1                            regGC_CAC_CTRL_1;
typedef union GC_CAC_CTRL_2                            regGC_CAC_CTRL_2;
typedef union GC_CAC_IND_DATA                          regGC_CAC_IND_DATA;
typedef union GC_CAC_IND_INDEX                         regGC_CAC_IND_INDEX;
typedef union GC_CAC_OVRD_BCI                          regGC_CAC_OVRD_BCI;
typedef union GC_CAC_OVRD_CB                           regGC_CAC_OVRD_CB;
typedef union GC_CAC_OVRD_CBR                          regGC_CAC_OVRD_CBR;
typedef union GC_CAC_OVRD_CP                           regGC_CAC_OVRD_CP;
typedef union GC_CAC_OVRD_CU                           regGC_CAC_OVRD_CU;
typedef union GC_CAC_OVRD_DB                           regGC_CAC_OVRD_DB;
typedef union GC_CAC_OVRD_DBR                          regGC_CAC_OVRD_DBR;
typedef union GC_CAC_OVRD_EA                           regGC_CAC_OVRD_EA;
typedef union GC_CAC_OVRD_GDS                          regGC_CAC_OVRD_GDS;
typedef union GC_CAC_OVRD_IA__GFX09                    regGC_CAC_OVRD_IA__GFX09;
typedef union GC_CAC_OVRD_LDS                          regGC_CAC_OVRD_LDS;
typedef union GC_CAC_OVRD_PA                           regGC_CAC_OVRD_PA;
typedef union GC_CAC_OVRD_PC                           regGC_CAC_OVRD_PC;
typedef union GC_CAC_OVRD_RMI                          regGC_CAC_OVRD_RMI;
typedef union GC_CAC_OVRD_SC                           regGC_CAC_OVRD_SC;
typedef union GC_CAC_OVRD_SPI                          regGC_CAC_OVRD_SPI;
typedef union GC_CAC_OVRD_SQ__GFX09                    regGC_CAC_OVRD_SQ__GFX09;
typedef union GC_CAC_OVRD_SX                           regGC_CAC_OVRD_SX;
typedef union GC_CAC_OVRD_SXRB                         regGC_CAC_OVRD_SXRB;
typedef union GC_CAC_OVRD_TA                           regGC_CAC_OVRD_TA;
typedef union GC_CAC_OVRD_TCC__GFX09                   regGC_CAC_OVRD_TCC__GFX09;
typedef union GC_CAC_OVRD_TCP                          regGC_CAC_OVRD_TCP;
typedef union GC_CAC_OVRD_TD__GFX09                    regGC_CAC_OVRD_TD__GFX09;
typedef union GC_CAC_OVRD_UTCL2_ATCL2                  regGC_CAC_OVRD_UTCL2_ATCL2;
typedef union GC_CAC_OVRD_UTCL2_ROUTER                 regGC_CAC_OVRD_UTCL2_ROUTER;
typedef union GC_CAC_OVRD_UTCL2_VML2                   regGC_CAC_OVRD_UTCL2_VML2;
typedef union GC_CAC_OVRD_UTCL2_WALKER                 regGC_CAC_OVRD_UTCL2_WALKER;
typedef union GC_CAC_OVRD_VGT__GFX09                   regGC_CAC_OVRD_VGT__GFX09;
typedef union GC_CAC_OVRD_WD__GFX09                    regGC_CAC_OVRD_WD__GFX09;
typedef union GC_CAC_OVR_SEL                           regGC_CAC_OVR_SEL;
typedef union GC_CAC_OVR_VAL                           regGC_CAC_OVR_VAL;
typedef union GC_CAC_SOFT_CTRL                         regGC_CAC_SOFT_CTRL;
typedef union GC_CAC_WEIGHT_BCI_0                      regGC_CAC_WEIGHT_BCI_0;
typedef union GC_CAC_WEIGHT_CBR_0                      regGC_CAC_WEIGHT_CBR_0;
typedef union GC_CAC_WEIGHT_CBR_1                      regGC_CAC_WEIGHT_CBR_1;
typedef union GC_CAC_WEIGHT_CB_0                       regGC_CAC_WEIGHT_CB_0;
typedef union GC_CAC_WEIGHT_CB_1                       regGC_CAC_WEIGHT_CB_1;
typedef union GC_CAC_WEIGHT_CP_0                       regGC_CAC_WEIGHT_CP_0;
typedef union GC_CAC_WEIGHT_CP_1                       regGC_CAC_WEIGHT_CP_1;
typedef union GC_CAC_WEIGHT_CU_0                       regGC_CAC_WEIGHT_CU_0;
typedef union GC_CAC_WEIGHT_CU_1__GFX09                regGC_CAC_WEIGHT_CU_1__GFX09;
typedef union GC_CAC_WEIGHT_CU_2__GFX09                regGC_CAC_WEIGHT_CU_2__GFX09;
typedef union GC_CAC_WEIGHT_CU_3__GFX09                regGC_CAC_WEIGHT_CU_3__GFX09;
typedef union GC_CAC_WEIGHT_CU_4__GFX09                regGC_CAC_WEIGHT_CU_4__GFX09;
typedef union GC_CAC_WEIGHT_CU_5__GFX09                regGC_CAC_WEIGHT_CU_5__GFX09;
typedef union GC_CAC_WEIGHT_CU_6__GFX09                regGC_CAC_WEIGHT_CU_6__GFX09;
typedef union GC_CAC_WEIGHT_CU_7__GFX09                regGC_CAC_WEIGHT_CU_7__GFX09;
typedef union GC_CAC_WEIGHT_DBR_0                      regGC_CAC_WEIGHT_DBR_0;
typedef union GC_CAC_WEIGHT_DBR_1                      regGC_CAC_WEIGHT_DBR_1;
typedef union GC_CAC_WEIGHT_DB_0                       regGC_CAC_WEIGHT_DB_0;
typedef union GC_CAC_WEIGHT_DB_1                       regGC_CAC_WEIGHT_DB_1;
typedef union GC_CAC_WEIGHT_EA_0                       regGC_CAC_WEIGHT_EA_0;
typedef union GC_CAC_WEIGHT_EA_1                       regGC_CAC_WEIGHT_EA_1;
typedef union GC_CAC_WEIGHT_EA_2                       regGC_CAC_WEIGHT_EA_2;
typedef union GC_CAC_WEIGHT_GDS_0                      regGC_CAC_WEIGHT_GDS_0;
typedef union GC_CAC_WEIGHT_GDS_1                      regGC_CAC_WEIGHT_GDS_1;
typedef union GC_CAC_WEIGHT_IA_0__GFX09                regGC_CAC_WEIGHT_IA_0__GFX09;
typedef union GC_CAC_WEIGHT_LDS_0                      regGC_CAC_WEIGHT_LDS_0;
typedef union GC_CAC_WEIGHT_LDS_1                      regGC_CAC_WEIGHT_LDS_1;
typedef union GC_CAC_WEIGHT_PA_0                       regGC_CAC_WEIGHT_PA_0;
typedef union GC_CAC_WEIGHT_PC_0                       regGC_CAC_WEIGHT_PC_0;
typedef union GC_CAC_WEIGHT_RMI_0                      regGC_CAC_WEIGHT_RMI_0;
typedef union GC_CAC_WEIGHT_SC_0                       regGC_CAC_WEIGHT_SC_0;
typedef union GC_CAC_WEIGHT_SPI_0                      regGC_CAC_WEIGHT_SPI_0;
typedef union GC_CAC_WEIGHT_SPI_1                      regGC_CAC_WEIGHT_SPI_1;
typedef union GC_CAC_WEIGHT_SPI_2                      regGC_CAC_WEIGHT_SPI_2;
typedef union GC_CAC_WEIGHT_SQ_0                       regGC_CAC_WEIGHT_SQ_0;
typedef union GC_CAC_WEIGHT_SQ_1                       regGC_CAC_WEIGHT_SQ_1;
typedef union GC_CAC_WEIGHT_SQ_2                       regGC_CAC_WEIGHT_SQ_2;
typedef union GC_CAC_WEIGHT_SQ_3__GFX09                regGC_CAC_WEIGHT_SQ_3__GFX09;
typedef union GC_CAC_WEIGHT_SQ_4__GFX09                regGC_CAC_WEIGHT_SQ_4__GFX09;
typedef union GC_CAC_WEIGHT_SXRB_0                     regGC_CAC_WEIGHT_SXRB_0;
typedef union GC_CAC_WEIGHT_SX_0                       regGC_CAC_WEIGHT_SX_0;
typedef union GC_CAC_WEIGHT_TA_0                       regGC_CAC_WEIGHT_TA_0;
typedef union GC_CAC_WEIGHT_TCC_0__GFX09               regGC_CAC_WEIGHT_TCC_0__GFX09;
typedef union GC_CAC_WEIGHT_TCC_1__GFX09               regGC_CAC_WEIGHT_TCC_1__GFX09;
typedef union GC_CAC_WEIGHT_TCC_2__GFX09               regGC_CAC_WEIGHT_TCC_2__GFX09;
typedef union GC_CAC_WEIGHT_TCP_0                      regGC_CAC_WEIGHT_TCP_0;
typedef union GC_CAC_WEIGHT_TCP_1                      regGC_CAC_WEIGHT_TCP_1;
typedef union GC_CAC_WEIGHT_TCP_2                      regGC_CAC_WEIGHT_TCP_2;
typedef union GC_CAC_WEIGHT_TD_0                       regGC_CAC_WEIGHT_TD_0;
typedef union GC_CAC_WEIGHT_TD_1                       regGC_CAC_WEIGHT_TD_1;
typedef union GC_CAC_WEIGHT_TD_2                       regGC_CAC_WEIGHT_TD_2;
typedef union GC_CAC_WEIGHT_UTCL2_ATCL2_0              regGC_CAC_WEIGHT_UTCL2_ATCL2_0;
typedef union GC_CAC_WEIGHT_UTCL2_ATCL2_1              regGC_CAC_WEIGHT_UTCL2_ATCL2_1;
typedef union GC_CAC_WEIGHT_UTCL2_ATCL2_2              regGC_CAC_WEIGHT_UTCL2_ATCL2_2;
typedef union GC_CAC_WEIGHT_UTCL2_ROUTER_0             regGC_CAC_WEIGHT_UTCL2_ROUTER_0;
typedef union GC_CAC_WEIGHT_UTCL2_ROUTER_1             regGC_CAC_WEIGHT_UTCL2_ROUTER_1;
typedef union GC_CAC_WEIGHT_UTCL2_ROUTER_2             regGC_CAC_WEIGHT_UTCL2_ROUTER_2;
typedef union GC_CAC_WEIGHT_UTCL2_ROUTER_3             regGC_CAC_WEIGHT_UTCL2_ROUTER_3;
typedef union GC_CAC_WEIGHT_UTCL2_ROUTER_4             regGC_CAC_WEIGHT_UTCL2_ROUTER_4;
typedef union GC_CAC_WEIGHT_UTCL2_VML2_0               regGC_CAC_WEIGHT_UTCL2_VML2_0;
typedef union GC_CAC_WEIGHT_UTCL2_VML2_1               regGC_CAC_WEIGHT_UTCL2_VML2_1;
typedef union GC_CAC_WEIGHT_UTCL2_VML2_2               regGC_CAC_WEIGHT_UTCL2_VML2_2;
typedef union GC_CAC_WEIGHT_UTCL2_WALKER_0             regGC_CAC_WEIGHT_UTCL2_WALKER_0;
typedef union GC_CAC_WEIGHT_UTCL2_WALKER_1             regGC_CAC_WEIGHT_UTCL2_WALKER_1;
typedef union GC_CAC_WEIGHT_UTCL2_WALKER_2             regGC_CAC_WEIGHT_UTCL2_WALKER_2;
typedef union GC_CAC_WEIGHT_VGT_0__GFX09               regGC_CAC_WEIGHT_VGT_0__GFX09;
typedef union GC_CAC_WEIGHT_VGT_1__GFX09               regGC_CAC_WEIGHT_VGT_1__GFX09;
typedef union GC_CAC_WEIGHT_WD_0__GFX09                regGC_CAC_WEIGHT_WD_0__GFX09;
typedef union GC_DIDT_CTRL0                            regGC_DIDT_CTRL0;
typedef union GC_DIDT_CTRL1                            regGC_DIDT_CTRL1;
typedef union GC_DIDT_CTRL2                            regGC_DIDT_CTRL2;
typedef union GC_DIDT_DROOP_CTRL__GFX09                regGC_DIDT_DROOP_CTRL__GFX09;
typedef union GC_DIDT_WEIGHT                           regGC_DIDT_WEIGHT;
typedef union GC_DIDT_WEIGHT_1__GFX09                  regGC_DIDT_WEIGHT_1__GFX09;
typedef union GC_EDC_CTRL                              regGC_EDC_CTRL;
typedef union GC_EDC_DROOP_CTRL__GFX09                 regGC_EDC_DROOP_CTRL__GFX09;
typedef union GC_EDC_OVERFLOW                          regGC_EDC_OVERFLOW;
typedef union GC_EDC_ROLLING_POWER_DELTA               regGC_EDC_ROLLING_POWER_DELTA;
typedef union GC_EDC_STATUS                            regGC_EDC_STATUS;
typedef union GC_EDC_THRESHOLD                         regGC_EDC_THRESHOLD;
typedef union GC_USER_PRIM_CONFIG                      regGC_USER_PRIM_CONFIG;
typedef union GC_USER_RB_BACKEND_DISABLE               regGC_USER_RB_BACKEND_DISABLE;
typedef union GC_USER_RB_REDUNDANCY                    regGC_USER_RB_REDUNDANCY;
typedef union GC_USER_SHADER_ARRAY_CONFIG__GFX09       regGC_USER_SHADER_ARRAY_CONFIG__GFX09;
typedef union GC_USER_SHADER_RATE_CONFIG               regGC_USER_SHADER_RATE_CONFIG;
typedef union GDS_ATOM_BASE                            regGDS_ATOM_BASE;
typedef union GDS_ATOM_CNTL                            regGDS_ATOM_CNTL;
typedef union GDS_ATOM_COMPLETE                        regGDS_ATOM_COMPLETE;
typedef union GDS_ATOM_DST                             regGDS_ATOM_DST;
typedef union GDS_ATOM_OFFSET0                         regGDS_ATOM_OFFSET0;
typedef union GDS_ATOM_OFFSET1                         regGDS_ATOM_OFFSET1;
typedef union GDS_ATOM_OP                              regGDS_ATOM_OP;
typedef union GDS_ATOM_READ0                           regGDS_ATOM_READ0;
typedef union GDS_ATOM_READ0_U                         regGDS_ATOM_READ0_U;
typedef union GDS_ATOM_READ1                           regGDS_ATOM_READ1;
typedef union GDS_ATOM_READ1_U                         regGDS_ATOM_READ1_U;
typedef union GDS_ATOM_SIZE                            regGDS_ATOM_SIZE;
typedef union GDS_ATOM_SRC0                            regGDS_ATOM_SRC0;
typedef union GDS_ATOM_SRC0_U                          regGDS_ATOM_SRC0_U;
typedef union GDS_ATOM_SRC1                            regGDS_ATOM_SRC1;
typedef union GDS_ATOM_SRC1_U                          regGDS_ATOM_SRC1_U;
typedef union GDS_CNTL_STATUS                          regGDS_CNTL_STATUS;
typedef union GDS_COMPUTE_MAX_WAVE_ID                  regGDS_COMPUTE_MAX_WAVE_ID;
typedef union GDS_CONFIG                               regGDS_CONFIG;
typedef union GDS_CS_CTXSW_CNT0                        regGDS_CS_CTXSW_CNT0;
typedef union GDS_CS_CTXSW_CNT1                        regGDS_CS_CTXSW_CNT1;
typedef union GDS_CS_CTXSW_CNT2                        regGDS_CS_CTXSW_CNT2;
typedef union GDS_CS_CTXSW_CNT3                        regGDS_CS_CTXSW_CNT3;
typedef union GDS_CS_CTXSW_STATUS                      regGDS_CS_CTXSW_STATUS;
typedef union GDS_DEBUG_CNTL                           regGDS_DEBUG_CNTL;
typedef union GDS_DEBUG_DATA                           regGDS_DEBUG_DATA;
typedef union GDS_DEBUG_REG0                           regGDS_DEBUG_REG0;
typedef union GDS_DEBUG_REG1                           regGDS_DEBUG_REG1;
typedef union GDS_DEBUG_REG2                           regGDS_DEBUG_REG2;
typedef union GDS_DEBUG_REG3                           regGDS_DEBUG_REG3;
typedef union GDS_DEBUG_REG4                           regGDS_DEBUG_REG4;
typedef union GDS_DEBUG_REG5                           regGDS_DEBUG_REG5;
typedef union GDS_DEBUG_REG6                           regGDS_DEBUG_REG6;
typedef union GDS_DSM_CNTL                             regGDS_DSM_CNTL;
typedef union GDS_DSM_CNTL2                            regGDS_DSM_CNTL2;
typedef union GDS_EDC_CNT                              regGDS_EDC_CNT;
typedef union GDS_EDC_GRBM_CNT                         regGDS_EDC_GRBM_CNT;
typedef union GDS_EDC_OA_DED                           regGDS_EDC_OA_DED;
typedef union GDS_EDC_OA_PHY_CNT                       regGDS_EDC_OA_PHY_CNT;
typedef union GDS_EDC_OA_PIPE_CNT                      regGDS_EDC_OA_PIPE_CNT;
typedef union GDS_ENHANCE                              regGDS_ENHANCE;
typedef union GDS_ENHANCE2                             regGDS_ENHANCE2;
typedef union GDS_GFX_CTXSW_STATUS                     regGDS_GFX_CTXSW_STATUS;
typedef union GDS_GS_CTXSW_CNT0                        regGDS_GS_CTXSW_CNT0;
typedef union GDS_GS_CTXSW_CNT1                        regGDS_GS_CTXSW_CNT1;
typedef union GDS_GS_CTXSW_CNT2                        regGDS_GS_CTXSW_CNT2;
typedef union GDS_GS_CTXSW_CNT3                        regGDS_GS_CTXSW_CNT3;
typedef union GDS_GWS_RESET0                           regGDS_GWS_RESET0;
typedef union GDS_GWS_RESET1                           regGDS_GWS_RESET1;
typedef union GDS_GWS_RESOURCE__GFX09                  regGDS_GWS_RESOURCE__GFX09;
typedef union GDS_GWS_RESOURCE_CNT                     regGDS_GWS_RESOURCE_CNT;
typedef union GDS_GWS_RESOURCE_CNTL                    regGDS_GWS_RESOURCE_CNTL;
typedef union GDS_GWS_RESOURCE_RESET                   regGDS_GWS_RESOURCE_RESET;
typedef union GDS_GWS_VMID0                            regGDS_GWS_VMID0;
typedef union GDS_GWS_VMID1                            regGDS_GWS_VMID1;
typedef union GDS_GWS_VMID10                           regGDS_GWS_VMID10;
typedef union GDS_GWS_VMID11                           regGDS_GWS_VMID11;
typedef union GDS_GWS_VMID12                           regGDS_GWS_VMID12;
typedef union GDS_GWS_VMID13                           regGDS_GWS_VMID13;
typedef union GDS_GWS_VMID14                           regGDS_GWS_VMID14;
typedef union GDS_GWS_VMID15                           regGDS_GWS_VMID15;
typedef union GDS_GWS_VMID2                            regGDS_GWS_VMID2;
typedef union GDS_GWS_VMID3                            regGDS_GWS_VMID3;
typedef union GDS_GWS_VMID4                            regGDS_GWS_VMID4;
typedef union GDS_GWS_VMID5                            regGDS_GWS_VMID5;
typedef union GDS_GWS_VMID6                            regGDS_GWS_VMID6;
typedef union GDS_GWS_VMID7                            regGDS_GWS_VMID7;
typedef union GDS_GWS_VMID8                            regGDS_GWS_VMID8;
typedef union GDS_GWS_VMID9                            regGDS_GWS_VMID9;
typedef union GDS_OA_ADDRESS__GFX09                    regGDS_OA_ADDRESS__GFX09;
typedef union GDS_OA_CGPG_RESTORE                      regGDS_OA_CGPG_RESTORE;
typedef union GDS_OA_CNTL                              regGDS_OA_CNTL;
typedef union GDS_OA_COUNTER                           regGDS_OA_COUNTER;
typedef union GDS_OA_INCDEC                            regGDS_OA_INCDEC;
typedef union GDS_OA_RESET                             regGDS_OA_RESET;
typedef union GDS_OA_RESET_MASK                        regGDS_OA_RESET_MASK;
typedef union GDS_OA_RING_SIZE                         regGDS_OA_RING_SIZE;
typedef union GDS_OA_VMID0                             regGDS_OA_VMID0;
typedef union GDS_OA_VMID1                             regGDS_OA_VMID1;
typedef union GDS_OA_VMID10                            regGDS_OA_VMID10;
typedef union GDS_OA_VMID11                            regGDS_OA_VMID11;
typedef union GDS_OA_VMID12                            regGDS_OA_VMID12;
typedef union GDS_OA_VMID13                            regGDS_OA_VMID13;
typedef union GDS_OA_VMID14                            regGDS_OA_VMID14;
typedef union GDS_OA_VMID15                            regGDS_OA_VMID15;
typedef union GDS_OA_VMID2                             regGDS_OA_VMID2;
typedef union GDS_OA_VMID3                             regGDS_OA_VMID3;
typedef union GDS_OA_VMID4                             regGDS_OA_VMID4;
typedef union GDS_OA_VMID5                             regGDS_OA_VMID5;
typedef union GDS_OA_VMID6                             regGDS_OA_VMID6;
typedef union GDS_OA_VMID7                             regGDS_OA_VMID7;
typedef union GDS_OA_VMID8                             regGDS_OA_VMID8;
typedef union GDS_OA_VMID9                             regGDS_OA_VMID9;
typedef union GDS_PERFCOUNTER0_HI                      regGDS_PERFCOUNTER0_HI;
typedef union GDS_PERFCOUNTER0_LO                      regGDS_PERFCOUNTER0_LO;
typedef union GDS_PERFCOUNTER0_SELECT__GFX09           regGDS_PERFCOUNTER0_SELECT__GFX09;
typedef union GDS_PERFCOUNTER0_SELECT1__GFX09          regGDS_PERFCOUNTER0_SELECT1__GFX09;
typedef union GDS_PERFCOUNTER1_HI                      regGDS_PERFCOUNTER1_HI;
typedef union GDS_PERFCOUNTER1_LO                      regGDS_PERFCOUNTER1_LO;
typedef union GDS_PERFCOUNTER1_SELECT__GFX09           regGDS_PERFCOUNTER1_SELECT__GFX09;
typedef union GDS_PERFCOUNTER2_HI                      regGDS_PERFCOUNTER2_HI;
typedef union GDS_PERFCOUNTER2_LO                      regGDS_PERFCOUNTER2_LO;
typedef union GDS_PERFCOUNTER2_SELECT__GFX09           regGDS_PERFCOUNTER2_SELECT__GFX09;
typedef union GDS_PERFCOUNTER3_HI                      regGDS_PERFCOUNTER3_HI;
typedef union GDS_PERFCOUNTER3_LO                      regGDS_PERFCOUNTER3_LO;
typedef union GDS_PERFCOUNTER3_SELECT__GFX09           regGDS_PERFCOUNTER3_SELECT__GFX09;
typedef union GDS_PROTECTION_FAULT                     regGDS_PROTECTION_FAULT;
typedef union GDS_PS0_CTXSW_CNT0__GFX09                regGDS_PS0_CTXSW_CNT0__GFX09;
typedef union GDS_PS0_CTXSW_CNT1__GFX09                regGDS_PS0_CTXSW_CNT1__GFX09;
typedef union GDS_PS0_CTXSW_CNT2__GFX09                regGDS_PS0_CTXSW_CNT2__GFX09;
typedef union GDS_PS0_CTXSW_CNT3__GFX09                regGDS_PS0_CTXSW_CNT3__GFX09;
typedef union GDS_PS1_CTXSW_CNT0__GFX09                regGDS_PS1_CTXSW_CNT0__GFX09;
typedef union GDS_PS1_CTXSW_CNT1__GFX09                regGDS_PS1_CTXSW_CNT1__GFX09;
typedef union GDS_PS1_CTXSW_CNT2__GFX09                regGDS_PS1_CTXSW_CNT2__GFX09;
typedef union GDS_PS1_CTXSW_CNT3__GFX09                regGDS_PS1_CTXSW_CNT3__GFX09;
typedef union GDS_PS2_CTXSW_CNT0__GFX09                regGDS_PS2_CTXSW_CNT0__GFX09;
typedef union GDS_PS2_CTXSW_CNT1__GFX09                regGDS_PS2_CTXSW_CNT1__GFX09;
typedef union GDS_PS2_CTXSW_CNT2__GFX09                regGDS_PS2_CTXSW_CNT2__GFX09;
typedef union GDS_PS2_CTXSW_CNT3__GFX09                regGDS_PS2_CTXSW_CNT3__GFX09;
typedef union GDS_PS3_CTXSW_CNT0__GFX09                regGDS_PS3_CTXSW_CNT0__GFX09;
typedef union GDS_PS3_CTXSW_CNT1__GFX09                regGDS_PS3_CTXSW_CNT1__GFX09;
typedef union GDS_PS3_CTXSW_CNT2__GFX09                regGDS_PS3_CTXSW_CNT2__GFX09;
typedef union GDS_PS3_CTXSW_CNT3__GFX09                regGDS_PS3_CTXSW_CNT3__GFX09;
typedef union GDS_PS4_CTXSW_CNT0__GFX09                regGDS_PS4_CTXSW_CNT0__GFX09;
typedef union GDS_PS4_CTXSW_CNT1__GFX09                regGDS_PS4_CTXSW_CNT1__GFX09;
typedef union GDS_PS4_CTXSW_CNT2__GFX09                regGDS_PS4_CTXSW_CNT2__GFX09;
typedef union GDS_PS4_CTXSW_CNT3__GFX09                regGDS_PS4_CTXSW_CNT3__GFX09;
typedef union GDS_PS5_CTXSW_CNT0__GFX09                regGDS_PS5_CTXSW_CNT0__GFX09;
typedef union GDS_PS5_CTXSW_CNT1__GFX09                regGDS_PS5_CTXSW_CNT1__GFX09;
typedef union GDS_PS5_CTXSW_CNT2__GFX09                regGDS_PS5_CTXSW_CNT2__GFX09;
typedef union GDS_PS5_CTXSW_CNT3__GFX09                regGDS_PS5_CTXSW_CNT3__GFX09;
typedef union GDS_PS6_CTXSW_CNT0__GFX09                regGDS_PS6_CTXSW_CNT0__GFX09;
typedef union GDS_PS6_CTXSW_CNT1__GFX09                regGDS_PS6_CTXSW_CNT1__GFX09;
typedef union GDS_PS6_CTXSW_CNT2__GFX09                regGDS_PS6_CTXSW_CNT2__GFX09;
typedef union GDS_PS6_CTXSW_CNT3__GFX09                regGDS_PS6_CTXSW_CNT3__GFX09;
typedef union GDS_PS7_CTXSW_CNT0__GFX09                regGDS_PS7_CTXSW_CNT0__GFX09;
typedef union GDS_PS7_CTXSW_CNT1__GFX09                regGDS_PS7_CTXSW_CNT1__GFX09;
typedef union GDS_PS7_CTXSW_CNT2__GFX09                regGDS_PS7_CTXSW_CNT2__GFX09;
typedef union GDS_PS7_CTXSW_CNT3__GFX09                regGDS_PS7_CTXSW_CNT3__GFX09;
typedef union GDS_RD_ADDR                              regGDS_RD_ADDR;
typedef union GDS_RD_BURST_ADDR                        regGDS_RD_BURST_ADDR;
typedef union GDS_RD_BURST_COUNT                       regGDS_RD_BURST_COUNT;
typedef union GDS_RD_BURST_DATA                        regGDS_RD_BURST_DATA;
typedef union GDS_RD_DATA                              regGDS_RD_DATA;
typedef union GDS_VMID0_BASE                           regGDS_VMID0_BASE;
typedef union GDS_VMID0_SIZE                           regGDS_VMID0_SIZE;
typedef union GDS_VMID10_BASE                          regGDS_VMID10_BASE;
typedef union GDS_VMID10_SIZE                          regGDS_VMID10_SIZE;
typedef union GDS_VMID11_BASE                          regGDS_VMID11_BASE;
typedef union GDS_VMID11_SIZE                          regGDS_VMID11_SIZE;
typedef union GDS_VMID12_BASE                          regGDS_VMID12_BASE;
typedef union GDS_VMID12_SIZE                          regGDS_VMID12_SIZE;
typedef union GDS_VMID13_BASE                          regGDS_VMID13_BASE;
typedef union GDS_VMID13_SIZE                          regGDS_VMID13_SIZE;
typedef union GDS_VMID14_BASE                          regGDS_VMID14_BASE;
typedef union GDS_VMID14_SIZE                          regGDS_VMID14_SIZE;
typedef union GDS_VMID15_BASE                          regGDS_VMID15_BASE;
typedef union GDS_VMID15_SIZE                          regGDS_VMID15_SIZE;
typedef union GDS_VMID1_BASE                           regGDS_VMID1_BASE;
typedef union GDS_VMID1_SIZE                           regGDS_VMID1_SIZE;
typedef union GDS_VMID2_BASE                           regGDS_VMID2_BASE;
typedef union GDS_VMID2_SIZE                           regGDS_VMID2_SIZE;
typedef union GDS_VMID3_BASE                           regGDS_VMID3_BASE;
typedef union GDS_VMID3_SIZE                           regGDS_VMID3_SIZE;
typedef union GDS_VMID4_BASE                           regGDS_VMID4_BASE;
typedef union GDS_VMID4_SIZE                           regGDS_VMID4_SIZE;
typedef union GDS_VMID5_BASE                           regGDS_VMID5_BASE;
typedef union GDS_VMID5_SIZE                           regGDS_VMID5_SIZE;
typedef union GDS_VMID6_BASE                           regGDS_VMID6_BASE;
typedef union GDS_VMID6_SIZE                           regGDS_VMID6_SIZE;
typedef union GDS_VMID7_BASE                           regGDS_VMID7_BASE;
typedef union GDS_VMID7_SIZE                           regGDS_VMID7_SIZE;
typedef union GDS_VMID8_BASE                           regGDS_VMID8_BASE;
typedef union GDS_VMID8_SIZE                           regGDS_VMID8_SIZE;
typedef union GDS_VMID9_BASE                           regGDS_VMID9_BASE;
typedef union GDS_VMID9_SIZE                           regGDS_VMID9_SIZE;
typedef union GDS_VM_PROTECTION_FAULT                  regGDS_VM_PROTECTION_FAULT;
typedef union GDS_VS_CTXSW_CNT0                        regGDS_VS_CTXSW_CNT0;
typedef union GDS_VS_CTXSW_CNT1                        regGDS_VS_CTXSW_CNT1;
typedef union GDS_VS_CTXSW_CNT2                        regGDS_VS_CTXSW_CNT2;
typedef union GDS_VS_CTXSW_CNT3                        regGDS_VS_CTXSW_CNT3;
typedef union GDS_WD_GDS_CSB                           regGDS_WD_GDS_CSB;
typedef union GDS_WRITE_COMPLETE                       regGDS_WRITE_COMPLETE;
typedef union GDS_WR_ADDR                              regGDS_WR_ADDR;
typedef union GDS_WR_BURST_ADDR                        regGDS_WR_BURST_ADDR;
typedef union GDS_WR_BURST_DATA                        regGDS_WR_BURST_DATA;
typedef union GDS_WR_DATA                              regGDS_WR_DATA;
typedef union GFX_COPY_STATE                           regGFX_COPY_STATE;
typedef union GFX_PIPE_CONTROL                         regGFX_PIPE_CONTROL;
typedef union GRBM_CAM_DATA                            regGRBM_CAM_DATA;
typedef union GRBM_CAM_INDEX                           regGRBM_CAM_INDEX;
typedef union GRBM_CGTT_CLK_CNTL                       regGRBM_CGTT_CLK_CNTL;
typedef union GRBM_CHICKEN_BITS                        regGRBM_CHICKEN_BITS;
typedef union GRBM_CHIP_REVISION                       regGRBM_CHIP_REVISION;
typedef union GRBM_CNTL                                regGRBM_CNTL;
typedef union GRBM_DEBUG_DATA                          regGRBM_DEBUG_DATA;
typedef union GRBM_DSM_BYPASS                          regGRBM_DSM_BYPASS;
typedef union GRBM_GFX_CLKEN_CNTL                      regGRBM_GFX_CLKEN_CNTL;
typedef union GRBM_GFX_CNTL                            regGRBM_GFX_CNTL;
typedef union GRBM_GFX_CNTL_SR_DATA                    regGRBM_GFX_CNTL_SR_DATA;
typedef union GRBM_GFX_CNTL_SR_SELECT                  regGRBM_GFX_CNTL_SR_SELECT;
typedef union GRBM_GFX_INDEX__GFX09                    regGRBM_GFX_INDEX__GFX09;
typedef union GRBM_GFX_INDEX_SR_DATA__GFX09            regGRBM_GFX_INDEX_SR_DATA__GFX09;
typedef union GRBM_GFX_INDEX_SR_SELECT                 regGRBM_GFX_INDEX_SR_SELECT;
typedef union GRBM_HYP_CAM_DATA                        regGRBM_HYP_CAM_DATA;
typedef union GRBM_HYP_CAM_INDEX                       regGRBM_HYP_CAM_INDEX;
typedef union GRBM_IH_CREDIT                           regGRBM_IH_CREDIT;
typedef union GRBM_INT_CNTL                            regGRBM_INT_CNTL;
typedef union GRBM_IOV_ERROR                           regGRBM_IOV_ERROR;
typedef union GRBM_NOWHERE                             regGRBM_NOWHERE;
typedef union GRBM_PERFCOUNTER0_HI                     regGRBM_PERFCOUNTER0_HI;
typedef union GRBM_PERFCOUNTER0_LO                     regGRBM_PERFCOUNTER0_LO;
typedef union GRBM_PERFCOUNTER0_SELECT__GFX09          regGRBM_PERFCOUNTER0_SELECT__GFX09;
typedef union GRBM_PERFCOUNTER1_HI                     regGRBM_PERFCOUNTER1_HI;
typedef union GRBM_PERFCOUNTER1_LO                     regGRBM_PERFCOUNTER1_LO;
typedef union GRBM_PERFCOUNTER1_SELECT__GFX09          regGRBM_PERFCOUNTER1_SELECT__GFX09;
typedef union GRBM_PWR_CNTL                            regGRBM_PWR_CNTL;
typedef union GRBM_PWR_CNTL2                           regGRBM_PWR_CNTL2;
typedef union GRBM_READ_ERROR                          regGRBM_READ_ERROR;
typedef union GRBM_READ_ERROR2                         regGRBM_READ_ERROR2;
typedef union GRBM_RSMU_CFG                            regGRBM_RSMU_CFG;
typedef union GRBM_RSMU_READ_ERROR                     regGRBM_RSMU_READ_ERROR;
typedef union GRBM_SCRATCH_REG0                        regGRBM_SCRATCH_REG0;
typedef union GRBM_SCRATCH_REG1                        regGRBM_SCRATCH_REG1;
typedef union GRBM_SCRATCH_REG2                        regGRBM_SCRATCH_REG2;
typedef union GRBM_SCRATCH_REG3                        regGRBM_SCRATCH_REG3;
typedef union GRBM_SCRATCH_REG4                        regGRBM_SCRATCH_REG4;
typedef union GRBM_SCRATCH_REG5                        regGRBM_SCRATCH_REG5;
typedef union GRBM_SCRATCH_REG6                        regGRBM_SCRATCH_REG6;
typedef union GRBM_SCRATCH_REG7                        regGRBM_SCRATCH_REG7;
typedef union GRBM_SE0_PERFCOUNTER_HI                  regGRBM_SE0_PERFCOUNTER_HI;
typedef union GRBM_SE0_PERFCOUNTER_LO                  regGRBM_SE0_PERFCOUNTER_LO;
typedef union GRBM_SE0_PERFCOUNTER_SELECT              regGRBM_SE0_PERFCOUNTER_SELECT;
typedef union GRBM_SE1_PERFCOUNTER_HI                  regGRBM_SE1_PERFCOUNTER_HI;
typedef union GRBM_SE1_PERFCOUNTER_LO                  regGRBM_SE1_PERFCOUNTER_LO;
typedef union GRBM_SE1_PERFCOUNTER_SELECT              regGRBM_SE1_PERFCOUNTER_SELECT;
typedef union GRBM_SE2_PERFCOUNTER_HI                  regGRBM_SE2_PERFCOUNTER_HI;
typedef union GRBM_SE2_PERFCOUNTER_LO                  regGRBM_SE2_PERFCOUNTER_LO;
typedef union GRBM_SE2_PERFCOUNTER_SELECT              regGRBM_SE2_PERFCOUNTER_SELECT;
typedef union GRBM_SE3_PERFCOUNTER_HI                  regGRBM_SE3_PERFCOUNTER_HI;
typedef union GRBM_SE3_PERFCOUNTER_LO                  regGRBM_SE3_PERFCOUNTER_LO;
typedef union GRBM_SE3_PERFCOUNTER_SELECT              regGRBM_SE3_PERFCOUNTER_SELECT;
typedef union GRBM_SKEW_CNTL                           regGRBM_SKEW_CNTL;
typedef union GRBM_SOFT_RESET                          regGRBM_SOFT_RESET;
typedef union GRBM_STATUS__GFX09                       regGRBM_STATUS__GFX09;
typedef union GRBM_STATUS2__GFX09                      regGRBM_STATUS2__GFX09;
typedef union GRBM_STATUS_SE0                          regGRBM_STATUS_SE0;
typedef union GRBM_STATUS_SE1                          regGRBM_STATUS_SE1;
typedef union GRBM_STATUS_SE2                          regGRBM_STATUS_SE2;
typedef union GRBM_STATUS_SE3                          regGRBM_STATUS_SE3;
typedef union GRBM_TRAP_ADDR                           regGRBM_TRAP_ADDR;
typedef union GRBM_TRAP_ADDR_MSK                       regGRBM_TRAP_ADDR_MSK;
typedef union GRBM_TRAP_OP                             regGRBM_TRAP_OP;
typedef union GRBM_TRAP_WD                             regGRBM_TRAP_WD;
typedef union GRBM_TRAP_WD_MSK                         regGRBM_TRAP_WD_MSK;
typedef union GRBM_UTCL2_INVAL_RANGE_END               regGRBM_UTCL2_INVAL_RANGE_END;
typedef union GRBM_UTCL2_INVAL_RANGE_START             regGRBM_UTCL2_INVAL_RANGE_START;
typedef union GRBM_WAIT_IDLE_CLOCKS                    regGRBM_WAIT_IDLE_CLOCKS;
typedef union GRBM_WRITE_ERROR                         regGRBM_WRITE_ERROR;
typedef union IA_CNTL_STATUS__GFX09                    regIA_CNTL_STATUS__GFX09;
typedef union IA_DEBUG_DATA__GFX09                     regIA_DEBUG_DATA__GFX09;
typedef union IA_DEBUG_REG0__GFX09                     regIA_DEBUG_REG0__GFX09;
typedef union IA_DEBUG_REG1__GFX09                     regIA_DEBUG_REG1__GFX09;
typedef union IA_DEBUG_REG9__GFX09                     regIA_DEBUG_REG9__GFX09;
typedef union IA_ENHANCE                               regIA_ENHANCE;
typedef union IA_MULTI_VGT_PARAM                       regIA_MULTI_VGT_PARAM;
typedef union IA_PERFCOUNTER0_HI__GFX09                regIA_PERFCOUNTER0_HI__GFX09;
typedef union IA_PERFCOUNTER0_LO__GFX09                regIA_PERFCOUNTER0_LO__GFX09;
typedef union IA_PERFCOUNTER0_SELECT__GFX09            regIA_PERFCOUNTER0_SELECT__GFX09;
typedef union IA_PERFCOUNTER0_SELECT1__GFX09           regIA_PERFCOUNTER0_SELECT1__GFX09;
typedef union IA_PERFCOUNTER1_HI__GFX09                regIA_PERFCOUNTER1_HI__GFX09;
typedef union IA_PERFCOUNTER1_LO__GFX09                regIA_PERFCOUNTER1_LO__GFX09;
typedef union IA_PERFCOUNTER1_SELECT__GFX09            regIA_PERFCOUNTER1_SELECT__GFX09;
typedef union IA_PERFCOUNTER2_HI__GFX09                regIA_PERFCOUNTER2_HI__GFX09;
typedef union IA_PERFCOUNTER2_LO__GFX09                regIA_PERFCOUNTER2_LO__GFX09;
typedef union IA_PERFCOUNTER2_SELECT__GFX09            regIA_PERFCOUNTER2_SELECT__GFX09;
typedef union IA_PERFCOUNTER3_HI__GFX09                regIA_PERFCOUNTER3_HI__GFX09;
typedef union IA_PERFCOUNTER3_LO__GFX09                regIA_PERFCOUNTER3_LO__GFX09;
typedef union IA_PERFCOUNTER3_SELECT__GFX09            regIA_PERFCOUNTER3_SELECT__GFX09;
typedef union IA_UTCL1_CNTL__GFX09                     regIA_UTCL1_CNTL__GFX09;
typedef union IA_UTCL1_STATUS                          regIA_UTCL1_STATUS;
typedef union IH_ACTIVE_FCN_ID                         regIH_ACTIVE_FCN_ID;
typedef union IH_CHICKEN                               regIH_CHICKEN;
typedef union IH_CID_REMAP_DATA__GFX09                 regIH_CID_REMAP_DATA__GFX09;
typedef union IH_CID_REMAP_INDEX                       regIH_CID_REMAP_INDEX;
typedef union IH_CLIENT_CFG                            regIH_CLIENT_CFG;
typedef union IH_CLIENT_CFG_DATA                       regIH_CLIENT_CFG_DATA;
typedef union IH_CLIENT_CFG_INDEX                      regIH_CLIENT_CFG_INDEX;
typedef union IH_CLIENT_CREDIT_ERROR                   regIH_CLIENT_CREDIT_ERROR;
typedef union IH_CLK_CTRL                              regIH_CLK_CTRL;
typedef union IH_CNTL                                  regIH_CNTL;
typedef union IH_CNTL2                                 regIH_CNTL2;
typedef union IH_COOKIE_0                              regIH_COOKIE_0;
typedef union IH_COOKIE_1                              regIH_COOKIE_1;
typedef union IH_COOKIE_2                              regIH_COOKIE_2;
typedef union IH_COOKIE_3                              regIH_COOKIE_3;
typedef union IH_COOKIE_4                              regIH_COOKIE_4;
typedef union IH_COOKIE_5                              regIH_COOKIE_5;
typedef union IH_COOKIE_6                              regIH_COOKIE_6;
typedef union IH_COOKIE_7                              regIH_COOKIE_7;
typedef union IH_COOKIE_REC_VIOLATION_LOG__GFX09       regIH_COOKIE_REC_VIOLATION_LOG__GFX09;
typedef union IH_CREDIT_STATUS                         regIH_CREDIT_STATUS;
typedef union IH_DOORBELL_RPTR                         regIH_DOORBELL_RPTR;
typedef union IH_DOORBELL_RPTR_RING1                   regIH_DOORBELL_RPTR_RING1;
typedef union IH_DOORBELL_RPTR_RING2                   regIH_DOORBELL_RPTR_RING2;
typedef union IH_DSM_MATCH_DATA_CONTROL                regIH_DSM_MATCH_DATA_CONTROL;
typedef union IH_DSM_MATCH_FCN_ID__GFX09               regIH_DSM_MATCH_FCN_ID__GFX09;
typedef union IH_DSM_MATCH_FIELD_CONTROL               regIH_DSM_MATCH_FIELD_CONTROL;
typedef union IH_DSM_MATCH_VALUE_BIT_31_0              regIH_DSM_MATCH_VALUE_BIT_31_0;
typedef union IH_DSM_MATCH_VALUE_BIT_63_32             regIH_DSM_MATCH_VALUE_BIT_63_32;
typedef union IH_DSM_MATCH_VALUE_BIT_95_64             regIH_DSM_MATCH_VALUE_BIT_95_64;
typedef union IH_GPU_IOV_VIOLATION_LOG__GFX09          regIH_GPU_IOV_VIOLATION_LOG__GFX09;
typedef union IH_INT_FLAGS                             regIH_INT_FLAGS;
typedef union IH_INT_FLOOD_CNTL                        regIH_INT_FLOOD_CNTL;
typedef union IH_INT_FLOOD_STATUS__GFX09               regIH_INT_FLOOD_STATUS__GFX09;
typedef union IH_LAST_INT_INFO0                        regIH_LAST_INT_INFO0;
typedef union IH_LAST_INT_INFO1                        regIH_LAST_INT_INFO1;
typedef union IH_LAST_INT_INFO2__GFX09                 regIH_LAST_INT_INFO2__GFX09;
typedef union IH_LIMIT_INT_RATE_CNTL                   regIH_LIMIT_INT_RATE_CNTL;
typedef union IH_MMHUB_CNTL                            regIH_MMHUB_CNTL;
typedef union IH_MMHUB_ERROR                           regIH_MMHUB_ERROR;
typedef union IH_PERFCOUNTER0_RESULT                   regIH_PERFCOUNTER0_RESULT;
typedef union IH_PERFCOUNTER1_RESULT                   regIH_PERFCOUNTER1_RESULT;
typedef union IH_PERFMON_CNTL                          regIH_PERFMON_CNTL;
typedef union IH_RB0_INT_FLOOD_STATUS                  regIH_RB0_INT_FLOOD_STATUS;
typedef union IH_RB1_INT_FLOOD_STATUS                  regIH_RB1_INT_FLOOD_STATUS;
typedef union IH_RB2_INT_FLOOD_STATUS                  regIH_RB2_INT_FLOOD_STATUS;
typedef union IH_RB_BASE                               regIH_RB_BASE;
typedef union IH_RB_BASE_HI                            regIH_RB_BASE_HI;
typedef union IH_RB_BASE_HI_RING1                      regIH_RB_BASE_HI_RING1;
typedef union IH_RB_BASE_HI_RING2                      regIH_RB_BASE_HI_RING2;
typedef union IH_RB_BASE_RING1                         regIH_RB_BASE_RING1;
typedef union IH_RB_BASE_RING2                         regIH_RB_BASE_RING2;
typedef union IH_RB_CNTL                               regIH_RB_CNTL;
typedef union IH_RB_CNTL_RING1                         regIH_RB_CNTL_RING1;
typedef union IH_RB_CNTL_RING2                         regIH_RB_CNTL_RING2;
typedef union IH_RB_RPTR                               regIH_RB_RPTR;
typedef union IH_RB_RPTR_RING1                         regIH_RB_RPTR_RING1;
typedef union IH_RB_RPTR_RING2                         regIH_RB_RPTR_RING2;
typedef union IH_RB_WPTR                               regIH_RB_WPTR;
typedef union IH_RB_WPTR_ADDR_HI                       regIH_RB_WPTR_ADDR_HI;
typedef union IH_RB_WPTR_ADDR_LO                       regIH_RB_WPTR_ADDR_LO;
typedef union IH_RB_WPTR_RING1                         regIH_RB_WPTR_RING1;
typedef union IH_RB_WPTR_RING2                         regIH_RB_WPTR_RING2;
typedef union IH_REGISTER_LAST_PART0                   regIH_REGISTER_LAST_PART0;
typedef union IH_REGISTER_LAST_PART1                   regIH_REGISTER_LAST_PART1;
typedef union IH_REGISTER_LAST_PART2                   regIH_REGISTER_LAST_PART2;
typedef union IH_SCRATCH                               regIH_SCRATCH;
typedef union IH_STATUS                                regIH_STATUS;
typedef union IH_STORM_CLIENT_LIST_CNTL                regIH_STORM_CLIENT_LIST_CNTL;
typedef union IH_VERSION                               regIH_VERSION;
typedef union IH_VF_RB1_STATUS__GFX09                  regIH_VF_RB1_STATUS__GFX09;
typedef union IH_VF_RB1_STATUS2                        regIH_VF_RB1_STATUS2;
typedef union IH_VF_RB2_STATUS__GFX09                  regIH_VF_RB2_STATUS__GFX09;
typedef union IH_VF_RB2_STATUS2                        regIH_VF_RB2_STATUS2;
typedef union IH_VF_RB_STATUS__GFX09                   regIH_VF_RB_STATUS__GFX09;
typedef union IH_VF_RB_STATUS2__GFX09                  regIH_VF_RB_STATUS2__GFX09;
typedef union IH_VIRT_RESET_REQ                        regIH_VIRT_RESET_REQ;
typedef union IH_VMID_0_LUT                            regIH_VMID_0_LUT;
typedef union IH_VMID_0_LUT_MM                         regIH_VMID_0_LUT_MM;
typedef union IH_VMID_10_LUT                           regIH_VMID_10_LUT;
typedef union IH_VMID_10_LUT_MM                        regIH_VMID_10_LUT_MM;
typedef union IH_VMID_11_LUT                           regIH_VMID_11_LUT;
typedef union IH_VMID_11_LUT_MM                        regIH_VMID_11_LUT_MM;
typedef union IH_VMID_12_LUT                           regIH_VMID_12_LUT;
typedef union IH_VMID_12_LUT_MM                        regIH_VMID_12_LUT_MM;
typedef union IH_VMID_13_LUT                           regIH_VMID_13_LUT;
typedef union IH_VMID_13_LUT_MM                        regIH_VMID_13_LUT_MM;
typedef union IH_VMID_14_LUT                           regIH_VMID_14_LUT;
typedef union IH_VMID_14_LUT_MM                        regIH_VMID_14_LUT_MM;
typedef union IH_VMID_15_LUT                           regIH_VMID_15_LUT;
typedef union IH_VMID_15_LUT_MM                        regIH_VMID_15_LUT_MM;
typedef union IH_VMID_1_LUT                            regIH_VMID_1_LUT;
typedef union IH_VMID_1_LUT_MM                         regIH_VMID_1_LUT_MM;
typedef union IH_VMID_2_LUT                            regIH_VMID_2_LUT;
typedef union IH_VMID_2_LUT_MM                         regIH_VMID_2_LUT_MM;
typedef union IH_VMID_3_LUT                            regIH_VMID_3_LUT;
typedef union IH_VMID_3_LUT_MM                         regIH_VMID_3_LUT_MM;
typedef union IH_VMID_4_LUT                            regIH_VMID_4_LUT;
typedef union IH_VMID_4_LUT_MM                         regIH_VMID_4_LUT_MM;
typedef union IH_VMID_5_LUT                            regIH_VMID_5_LUT;
typedef union IH_VMID_5_LUT_MM                         regIH_VMID_5_LUT_MM;
typedef union IH_VMID_6_LUT                            regIH_VMID_6_LUT;
typedef union IH_VMID_6_LUT_MM                         regIH_VMID_6_LUT_MM;
typedef union IH_VMID_7_LUT                            regIH_VMID_7_LUT;
typedef union IH_VMID_7_LUT_MM                         regIH_VMID_7_LUT_MM;
typedef union IH_VMID_8_LUT                            regIH_VMID_8_LUT;
typedef union IH_VMID_8_LUT_MM                         regIH_VMID_8_LUT_MM;
typedef union IH_VMID_9_LUT                            regIH_VMID_9_LUT;
typedef union IH_VMID_9_LUT_MM                         regIH_VMID_9_LUT_MM;
typedef union LDS_CONFIG                               regLDS_CONFIG;
typedef union MC_MEM_POWER_LS__GFX09                   regMC_MEM_POWER_LS__GFX09;
typedef union MC_SHARED_VIRT_RESET_REQ__GFX09          regMC_SHARED_VIRT_RESET_REQ__GFX09;
typedef union MC_VM_AGP_BASE__GFX09                    regMC_VM_AGP_BASE__GFX09;
typedef union MC_VM_AGP_BOT__GFX09                     regMC_VM_AGP_BOT__GFX09;
typedef union MC_VM_AGP_TOP__GFX09                     regMC_VM_AGP_TOP__GFX09;
typedef union MC_VM_APT_CNTL__GFX09                    regMC_VM_APT_CNTL__GFX09;
typedef union MC_VM_CACHEABLE_DRAM_ADDRESS_END__GFX09  regMC_VM_CACHEABLE_DRAM_ADDRESS_END__GFX09;
typedef union MC_VM_CACHEABLE_DRAM_ADDRESS_START__GFX09 regMC_VM_CACHEABLE_DRAM_ADDRESS_START__GFX09;
typedef union MC_VM_FB_LOCATION_BASE__GFX09            regMC_VM_FB_LOCATION_BASE__GFX09;
typedef union MC_VM_FB_LOCATION_TOP__GFX09             regMC_VM_FB_LOCATION_TOP__GFX09;
typedef union MC_VM_FB_OFFSET__GFX09                   regMC_VM_FB_OFFSET__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF0__GFX09          regMC_VM_FB_SIZE_OFFSET_VF0__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF1__GFX09          regMC_VM_FB_SIZE_OFFSET_VF1__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF10__GFX09         regMC_VM_FB_SIZE_OFFSET_VF10__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF11__GFX09         regMC_VM_FB_SIZE_OFFSET_VF11__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF12__GFX09         regMC_VM_FB_SIZE_OFFSET_VF12__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF13__GFX09         regMC_VM_FB_SIZE_OFFSET_VF13__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF14__GFX09         regMC_VM_FB_SIZE_OFFSET_VF14__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF15__GFX09         regMC_VM_FB_SIZE_OFFSET_VF15__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF2__GFX09          regMC_VM_FB_SIZE_OFFSET_VF2__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF3__GFX09          regMC_VM_FB_SIZE_OFFSET_VF3__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF4__GFX09          regMC_VM_FB_SIZE_OFFSET_VF4__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF5__GFX09          regMC_VM_FB_SIZE_OFFSET_VF5__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF6__GFX09          regMC_VM_FB_SIZE_OFFSET_VF6__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF7__GFX09          regMC_VM_FB_SIZE_OFFSET_VF7__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF8__GFX09          regMC_VM_FB_SIZE_OFFSET_VF8__GFX09;
typedef union MC_VM_FB_SIZE_OFFSET_VF9__GFX09          regMC_VM_FB_SIZE_OFFSET_VF9__GFX09;
typedef union MC_VM_L2_PERFCOUNTER0_CFG__GFX09         regMC_VM_L2_PERFCOUNTER0_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER1_CFG__GFX09         regMC_VM_L2_PERFCOUNTER1_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER2_CFG__GFX09         regMC_VM_L2_PERFCOUNTER2_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER3_CFG__GFX09         regMC_VM_L2_PERFCOUNTER3_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER4_CFG__GFX09         regMC_VM_L2_PERFCOUNTER4_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER5_CFG__GFX09         regMC_VM_L2_PERFCOUNTER5_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER6_CFG__GFX09         regMC_VM_L2_PERFCOUNTER6_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER7_CFG__GFX09         regMC_VM_L2_PERFCOUNTER7_CFG__GFX09;
typedef union MC_VM_L2_PERFCOUNTER_HI__GFX09           regMC_VM_L2_PERFCOUNTER_HI__GFX09;
typedef union MC_VM_L2_PERFCOUNTER_LO__GFX09           regMC_VM_L2_PERFCOUNTER_LO__GFX09;
typedef union MC_VM_L2_PERFCOUNTER_RSLT_CNTL__GFX09    regMC_VM_L2_PERFCOUNTER_RSLT_CNTL__GFX09;
typedef union MC_VM_LOCAL_HBM_ADDRESS_END__GFX09       regMC_VM_LOCAL_HBM_ADDRESS_END__GFX09;
typedef union MC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL__GFX09 regMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL__GFX09;
typedef union MC_VM_LOCAL_HBM_ADDRESS_START__GFX09     regMC_VM_LOCAL_HBM_ADDRESS_START__GFX09;
typedef union MC_VM_MARC_BASE_HI_0__GFX09              regMC_VM_MARC_BASE_HI_0__GFX09;
typedef union MC_VM_MARC_BASE_HI_1__GFX09              regMC_VM_MARC_BASE_HI_1__GFX09;
typedef union MC_VM_MARC_BASE_HI_2__GFX09              regMC_VM_MARC_BASE_HI_2__GFX09;
typedef union MC_VM_MARC_BASE_HI_3__GFX09              regMC_VM_MARC_BASE_HI_3__GFX09;
typedef union MC_VM_MARC_BASE_LO_0__GFX09              regMC_VM_MARC_BASE_LO_0__GFX09;
typedef union MC_VM_MARC_BASE_LO_1__GFX09              regMC_VM_MARC_BASE_LO_1__GFX09;
typedef union MC_VM_MARC_BASE_LO_2__GFX09              regMC_VM_MARC_BASE_LO_2__GFX09;
typedef union MC_VM_MARC_BASE_LO_3__GFX09              regMC_VM_MARC_BASE_LO_3__GFX09;
typedef union MC_VM_MARC_LEN_HI_0__GFX09               regMC_VM_MARC_LEN_HI_0__GFX09;
typedef union MC_VM_MARC_LEN_HI_1__GFX09               regMC_VM_MARC_LEN_HI_1__GFX09;
typedef union MC_VM_MARC_LEN_HI_2__GFX09               regMC_VM_MARC_LEN_HI_2__GFX09;
typedef union MC_VM_MARC_LEN_HI_3__GFX09               regMC_VM_MARC_LEN_HI_3__GFX09;
typedef union MC_VM_MARC_LEN_LO_0__GFX09               regMC_VM_MARC_LEN_LO_0__GFX09;
typedef union MC_VM_MARC_LEN_LO_1__GFX09               regMC_VM_MARC_LEN_LO_1__GFX09;
typedef union MC_VM_MARC_LEN_LO_2__GFX09               regMC_VM_MARC_LEN_LO_2__GFX09;
typedef union MC_VM_MARC_LEN_LO_3__GFX09               regMC_VM_MARC_LEN_LO_3__GFX09;
typedef union MC_VM_MARC_RELOC_HI_0__GFX09             regMC_VM_MARC_RELOC_HI_0__GFX09;
typedef union MC_VM_MARC_RELOC_HI_1__GFX09             regMC_VM_MARC_RELOC_HI_1__GFX09;
typedef union MC_VM_MARC_RELOC_HI_2__GFX09             regMC_VM_MARC_RELOC_HI_2__GFX09;
typedef union MC_VM_MARC_RELOC_HI_3__GFX09             regMC_VM_MARC_RELOC_HI_3__GFX09;
typedef union MC_VM_MARC_RELOC_LO_0__GFX09             regMC_VM_MARC_RELOC_LO_0__GFX09;
typedef union MC_VM_MARC_RELOC_LO_1__GFX09             regMC_VM_MARC_RELOC_LO_1__GFX09;
typedef union MC_VM_MARC_RELOC_LO_2__GFX09             regMC_VM_MARC_RELOC_LO_2__GFX09;
typedef union MC_VM_MARC_RELOC_LO_3__GFX09             regMC_VM_MARC_RELOC_LO_3__GFX09;
typedef union MC_VM_MX_L1_TLB_CNTL__GFX09              regMC_VM_MX_L1_TLB_CNTL__GFX09;
typedef union MC_VM_NB_LOWER_TOP_OF_DRAM2__GFX09       regMC_VM_NB_LOWER_TOP_OF_DRAM2__GFX09;
typedef union MC_VM_NB_MMIOBASE__GFX09                 regMC_VM_NB_MMIOBASE__GFX09;
typedef union MC_VM_NB_MMIOLIMIT__GFX09                regMC_VM_NB_MMIOLIMIT__GFX09;
typedef union MC_VM_NB_PCI_ARB__GFX09                  regMC_VM_NB_PCI_ARB__GFX09;
typedef union MC_VM_NB_PCI_CTRL__GFX09                 regMC_VM_NB_PCI_CTRL__GFX09;
typedef union MC_VM_NB_TOP_OF_DRAM_SLOT1__GFX09        regMC_VM_NB_TOP_OF_DRAM_SLOT1__GFX09;
typedef union MC_VM_NB_UPPER_TOP_OF_DRAM2__GFX09       regMC_VM_NB_UPPER_TOP_OF_DRAM2__GFX09;
typedef union MC_VM_STEERING__GFX09                    regMC_VM_STEERING__GFX09;
typedef union MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB__GFX09 regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB__GFX09;
typedef union MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB__GFX09 regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB__GFX09;
typedef union MC_VM_SYSTEM_APERTURE_HIGH_ADDR__GFX09   regMC_VM_SYSTEM_APERTURE_HIGH_ADDR__GFX09;
typedef union MC_VM_SYSTEM_APERTURE_LOW_ADDR__GFX09    regMC_VM_SYSTEM_APERTURE_LOW_ADDR__GFX09;
typedef union MP0_ACTIVE_FCN_ID__GFX09                 regMP0_ACTIVE_FCN_ID__GFX09;
typedef union MP0_C2PMSG_0                             regMP0_C2PMSG_0;
typedef union MP0_C2PMSG_1                             regMP0_C2PMSG_1;
typedef union MP0_C2PMSG_10                            regMP0_C2PMSG_10;
typedef union MP0_C2PMSG_100__GFX09                    regMP0_C2PMSG_100__GFX09;
typedef union MP0_C2PMSG_101__GFX09                    regMP0_C2PMSG_101__GFX09;
typedef union MP0_C2PMSG_102__GFX09                    regMP0_C2PMSG_102__GFX09;
typedef union MP0_C2PMSG_103__GFX09                    regMP0_C2PMSG_103__GFX09;
typedef union MP0_C2PMSG_11                            regMP0_C2PMSG_11;
typedef union MP0_C2PMSG_12                            regMP0_C2PMSG_12;
typedef union MP0_C2PMSG_13                            regMP0_C2PMSG_13;
typedef union MP0_C2PMSG_14                            regMP0_C2PMSG_14;
typedef union MP0_C2PMSG_15                            regMP0_C2PMSG_15;
typedef union MP0_C2PMSG_16                            regMP0_C2PMSG_16;
typedef union MP0_C2PMSG_17                            regMP0_C2PMSG_17;
typedef union MP0_C2PMSG_18                            regMP0_C2PMSG_18;
typedef union MP0_C2PMSG_19                            regMP0_C2PMSG_19;
typedef union MP0_C2PMSG_2                             regMP0_C2PMSG_2;
typedef union MP0_C2PMSG_20                            regMP0_C2PMSG_20;
typedef union MP0_C2PMSG_21                            regMP0_C2PMSG_21;
typedef union MP0_C2PMSG_22                            regMP0_C2PMSG_22;
typedef union MP0_C2PMSG_23                            regMP0_C2PMSG_23;
typedef union MP0_C2PMSG_24                            regMP0_C2PMSG_24;
typedef union MP0_C2PMSG_25                            regMP0_C2PMSG_25;
typedef union MP0_C2PMSG_26                            regMP0_C2PMSG_26;
typedef union MP0_C2PMSG_27                            regMP0_C2PMSG_27;
typedef union MP0_C2PMSG_28                            regMP0_C2PMSG_28;
typedef union MP0_C2PMSG_29                            regMP0_C2PMSG_29;
typedef union MP0_C2PMSG_3                             regMP0_C2PMSG_3;
typedef union MP0_C2PMSG_30                            regMP0_C2PMSG_30;
typedef union MP0_C2PMSG_31                            regMP0_C2PMSG_31;
typedef union MP0_C2PMSG_32                            regMP0_C2PMSG_32;
typedef union MP0_C2PMSG_33                            regMP0_C2PMSG_33;
typedef union MP0_C2PMSG_34                            regMP0_C2PMSG_34;
typedef union MP0_C2PMSG_35                            regMP0_C2PMSG_35;
typedef union MP0_C2PMSG_36                            regMP0_C2PMSG_36;
typedef union MP0_C2PMSG_37                            regMP0_C2PMSG_37;
typedef union MP0_C2PMSG_38                            regMP0_C2PMSG_38;
typedef union MP0_C2PMSG_39                            regMP0_C2PMSG_39;
typedef union MP0_C2PMSG_4                             regMP0_C2PMSG_4;
typedef union MP0_C2PMSG_40                            regMP0_C2PMSG_40;
typedef union MP0_C2PMSG_41                            regMP0_C2PMSG_41;
typedef union MP0_C2PMSG_42                            regMP0_C2PMSG_42;
typedef union MP0_C2PMSG_43                            regMP0_C2PMSG_43;
typedef union MP0_C2PMSG_44                            regMP0_C2PMSG_44;
typedef union MP0_C2PMSG_45                            regMP0_C2PMSG_45;
typedef union MP0_C2PMSG_46                            regMP0_C2PMSG_46;
typedef union MP0_C2PMSG_47                            regMP0_C2PMSG_47;
typedef union MP0_C2PMSG_48                            regMP0_C2PMSG_48;
typedef union MP0_C2PMSG_49                            regMP0_C2PMSG_49;
typedef union MP0_C2PMSG_5                             regMP0_C2PMSG_5;
typedef union MP0_C2PMSG_50                            regMP0_C2PMSG_50;
typedef union MP0_C2PMSG_51                            regMP0_C2PMSG_51;
typedef union MP0_C2PMSG_52                            regMP0_C2PMSG_52;
typedef union MP0_C2PMSG_53                            regMP0_C2PMSG_53;
typedef union MP0_C2PMSG_54                            regMP0_C2PMSG_54;
typedef union MP0_C2PMSG_55                            regMP0_C2PMSG_55;
typedef union MP0_C2PMSG_56                            regMP0_C2PMSG_56;
typedef union MP0_C2PMSG_57                            regMP0_C2PMSG_57;
typedef union MP0_C2PMSG_58                            regMP0_C2PMSG_58;
typedef union MP0_C2PMSG_59                            regMP0_C2PMSG_59;
typedef union MP0_C2PMSG_6                             regMP0_C2PMSG_6;
typedef union MP0_C2PMSG_60                            regMP0_C2PMSG_60;
typedef union MP0_C2PMSG_61                            regMP0_C2PMSG_61;
typedef union MP0_C2PMSG_62                            regMP0_C2PMSG_62;
typedef union MP0_C2PMSG_63                            regMP0_C2PMSG_63;
typedef union MP0_C2PMSG_64                            regMP0_C2PMSG_64;
typedef union MP0_C2PMSG_65                            regMP0_C2PMSG_65;
typedef union MP0_C2PMSG_66                            regMP0_C2PMSG_66;
typedef union MP0_C2PMSG_67                            regMP0_C2PMSG_67;
typedef union MP0_C2PMSG_68                            regMP0_C2PMSG_68;
typedef union MP0_C2PMSG_69                            regMP0_C2PMSG_69;
typedef union MP0_C2PMSG_7                             regMP0_C2PMSG_7;
typedef union MP0_C2PMSG_70                            regMP0_C2PMSG_70;
typedef union MP0_C2PMSG_71                            regMP0_C2PMSG_71;
typedef union MP0_C2PMSG_72                            regMP0_C2PMSG_72;
typedef union MP0_C2PMSG_73                            regMP0_C2PMSG_73;
typedef union MP0_C2PMSG_74                            regMP0_C2PMSG_74;
typedef union MP0_C2PMSG_75                            regMP0_C2PMSG_75;
typedef union MP0_C2PMSG_76                            regMP0_C2PMSG_76;
typedef union MP0_C2PMSG_77                            regMP0_C2PMSG_77;
typedef union MP0_C2PMSG_78                            regMP0_C2PMSG_78;
typedef union MP0_C2PMSG_79                            regMP0_C2PMSG_79;
typedef union MP0_C2PMSG_8                             regMP0_C2PMSG_8;
typedef union MP0_C2PMSG_80                            regMP0_C2PMSG_80;
typedef union MP0_C2PMSG_81                            regMP0_C2PMSG_81;
typedef union MP0_C2PMSG_82                            regMP0_C2PMSG_82;
typedef union MP0_C2PMSG_83                            regMP0_C2PMSG_83;
typedef union MP0_C2PMSG_84                            regMP0_C2PMSG_84;
typedef union MP0_C2PMSG_85                            regMP0_C2PMSG_85;
typedef union MP0_C2PMSG_86                            regMP0_C2PMSG_86;
typedef union MP0_C2PMSG_87                            regMP0_C2PMSG_87;
typedef union MP0_C2PMSG_88                            regMP0_C2PMSG_88;
typedef union MP0_C2PMSG_89                            regMP0_C2PMSG_89;
typedef union MP0_C2PMSG_9                             regMP0_C2PMSG_9;
typedef union MP0_C2PMSG_90                            regMP0_C2PMSG_90;
typedef union MP0_C2PMSG_91                            regMP0_C2PMSG_91;
typedef union MP0_C2PMSG_92                            regMP0_C2PMSG_92;
typedef union MP0_C2PMSG_93                            regMP0_C2PMSG_93;
typedef union MP0_C2PMSG_94                            regMP0_C2PMSG_94;
typedef union MP0_C2PMSG_95                            regMP0_C2PMSG_95;
typedef union MP0_C2PMSG_96__GFX09                     regMP0_C2PMSG_96__GFX09;
typedef union MP0_C2PMSG_97__GFX09                     regMP0_C2PMSG_97__GFX09;
typedef union MP0_C2PMSG_98__GFX09                     regMP0_C2PMSG_98__GFX09;
typedef union MP0_C2PMSG_99__GFX09                     regMP0_C2PMSG_99__GFX09;
typedef union MP0_C2PMSG_ATTR_0                        regMP0_C2PMSG_ATTR_0;
typedef union MP0_C2PMSG_ATTR_1                        regMP0_C2PMSG_ATTR_1;
typedef union MP0_C2PMSG_ATTR_2                        regMP0_C2PMSG_ATTR_2;
typedef union MP0_C2PMSG_ATTR_3                        regMP0_C2PMSG_ATTR_3;
typedef union MP0_C2PMSG_ATTR_4                        regMP0_C2PMSG_ATTR_4;
typedef union MP0_C2PMSG_ATTR_5                        regMP0_C2PMSG_ATTR_5;
typedef union MP0_C2PMSG_ATTR_6__GFX09                 regMP0_C2PMSG_ATTR_6__GFX09;
typedef union MP0_FW_INTF                              regMP0_FW_INTF;
typedef union MP0_IH_CREDIT__GFX09                     regMP0_IH_CREDIT__GFX09;
typedef union MP0_IH_SW_INT__GFX09                     regMP0_IH_SW_INT__GFX09;
typedef union MP0_IH_SW_INT_CTRL__GFX09                regMP0_IH_SW_INT_CTRL__GFX09;
typedef union MP0_P2CMSG_0                             regMP0_P2CMSG_0;
typedef union MP0_P2CMSG_1                             regMP0_P2CMSG_1;
typedef union MP0_P2CMSG_2                             regMP0_P2CMSG_2;
typedef union MP0_P2CMSG_3                             regMP0_P2CMSG_3;
typedef union MP0_P2CMSG_ATTR                          regMP0_P2CMSG_ATTR;
typedef union MP0_P2CMSG_INTEN                         regMP0_P2CMSG_INTEN;
typedef union MP0_P2CMSG_INTSTS                        regMP0_P2CMSG_INTSTS;
typedef union MP0_P2SMSG_0                             regMP0_P2SMSG_0;
typedef union MP0_P2SMSG_1                             regMP0_P2SMSG_1;
typedef union MP0_P2SMSG_2                             regMP0_P2SMSG_2;
typedef union MP0_P2SMSG_3                             regMP0_P2SMSG_3;
typedef union MP0_P2SMSG_ATTR                          regMP0_P2SMSG_ATTR;
typedef union MP0_P2SMSG_INTSTS                        regMP0_P2SMSG_INTSTS;
typedef union MP0_PUB_SCRATCH0                         regMP0_PUB_SCRATCH0;
typedef union MP0_PUB_SCRATCH1                         regMP0_PUB_SCRATCH1;
typedef union MP0_PUB_SCRATCH2                         regMP0_PUB_SCRATCH2;
typedef union MP0_PUB_SCRATCH3                         regMP0_PUB_SCRATCH3;
typedef union MP0_S2PMSG_0                             regMP0_S2PMSG_0;
typedef union MP0_S2PMSG_ATTR                          regMP0_S2PMSG_ATTR;
typedef union MP0_SMN_ACTIVE_FCN_ID__GFX09             regMP0_SMN_ACTIVE_FCN_ID__GFX09;
typedef union MP0_SMN_C2PMSG_100__GFX09                regMP0_SMN_C2PMSG_100__GFX09;
typedef union MP0_SMN_C2PMSG_101__GFX09                regMP0_SMN_C2PMSG_101__GFX09;
typedef union MP0_SMN_C2PMSG_102__GFX09                regMP0_SMN_C2PMSG_102__GFX09;
typedef union MP0_SMN_C2PMSG_103__GFX09                regMP0_SMN_C2PMSG_103__GFX09;
typedef union MP0_SMN_C2PMSG_32                        regMP0_SMN_C2PMSG_32;
typedef union MP0_SMN_C2PMSG_33                        regMP0_SMN_C2PMSG_33;
typedef union MP0_SMN_C2PMSG_34                        regMP0_SMN_C2PMSG_34;
typedef union MP0_SMN_C2PMSG_35                        regMP0_SMN_C2PMSG_35;
typedef union MP0_SMN_C2PMSG_36                        regMP0_SMN_C2PMSG_36;
typedef union MP0_SMN_C2PMSG_37                        regMP0_SMN_C2PMSG_37;
typedef union MP0_SMN_C2PMSG_38                        regMP0_SMN_C2PMSG_38;
typedef union MP0_SMN_C2PMSG_39                        regMP0_SMN_C2PMSG_39;
typedef union MP0_SMN_C2PMSG_40                        regMP0_SMN_C2PMSG_40;
typedef union MP0_SMN_C2PMSG_41                        regMP0_SMN_C2PMSG_41;
typedef union MP0_SMN_C2PMSG_42                        regMP0_SMN_C2PMSG_42;
typedef union MP0_SMN_C2PMSG_43                        regMP0_SMN_C2PMSG_43;
typedef union MP0_SMN_C2PMSG_44                        regMP0_SMN_C2PMSG_44;
typedef union MP0_SMN_C2PMSG_45                        regMP0_SMN_C2PMSG_45;
typedef union MP0_SMN_C2PMSG_46                        regMP0_SMN_C2PMSG_46;
typedef union MP0_SMN_C2PMSG_47                        regMP0_SMN_C2PMSG_47;
typedef union MP0_SMN_C2PMSG_48                        regMP0_SMN_C2PMSG_48;
typedef union MP0_SMN_C2PMSG_49                        regMP0_SMN_C2PMSG_49;
typedef union MP0_SMN_C2PMSG_50                        regMP0_SMN_C2PMSG_50;
typedef union MP0_SMN_C2PMSG_51                        regMP0_SMN_C2PMSG_51;
typedef union MP0_SMN_C2PMSG_52                        regMP0_SMN_C2PMSG_52;
typedef union MP0_SMN_C2PMSG_53                        regMP0_SMN_C2PMSG_53;
typedef union MP0_SMN_C2PMSG_54                        regMP0_SMN_C2PMSG_54;
typedef union MP0_SMN_C2PMSG_55                        regMP0_SMN_C2PMSG_55;
typedef union MP0_SMN_C2PMSG_56                        regMP0_SMN_C2PMSG_56;
typedef union MP0_SMN_C2PMSG_57                        regMP0_SMN_C2PMSG_57;
typedef union MP0_SMN_C2PMSG_58                        regMP0_SMN_C2PMSG_58;
typedef union MP0_SMN_C2PMSG_59                        regMP0_SMN_C2PMSG_59;
typedef union MP0_SMN_C2PMSG_60                        regMP0_SMN_C2PMSG_60;
typedef union MP0_SMN_C2PMSG_61                        regMP0_SMN_C2PMSG_61;
typedef union MP0_SMN_C2PMSG_62                        regMP0_SMN_C2PMSG_62;
typedef union MP0_SMN_C2PMSG_63                        regMP0_SMN_C2PMSG_63;
typedef union MP0_SMN_C2PMSG_64                        regMP0_SMN_C2PMSG_64;
typedef union MP0_SMN_C2PMSG_65                        regMP0_SMN_C2PMSG_65;
typedef union MP0_SMN_C2PMSG_66                        regMP0_SMN_C2PMSG_66;
typedef union MP0_SMN_C2PMSG_67                        regMP0_SMN_C2PMSG_67;
typedef union MP0_SMN_C2PMSG_68                        regMP0_SMN_C2PMSG_68;
typedef union MP0_SMN_C2PMSG_69                        regMP0_SMN_C2PMSG_69;
typedef union MP0_SMN_C2PMSG_70                        regMP0_SMN_C2PMSG_70;
typedef union MP0_SMN_C2PMSG_71                        regMP0_SMN_C2PMSG_71;
typedef union MP0_SMN_C2PMSG_72                        regMP0_SMN_C2PMSG_72;
typedef union MP0_SMN_C2PMSG_73                        regMP0_SMN_C2PMSG_73;
typedef union MP0_SMN_C2PMSG_74                        regMP0_SMN_C2PMSG_74;
typedef union MP0_SMN_C2PMSG_75                        regMP0_SMN_C2PMSG_75;
typedef union MP0_SMN_C2PMSG_76                        regMP0_SMN_C2PMSG_76;
typedef union MP0_SMN_C2PMSG_77                        regMP0_SMN_C2PMSG_77;
typedef union MP0_SMN_C2PMSG_78                        regMP0_SMN_C2PMSG_78;
typedef union MP0_SMN_C2PMSG_79                        regMP0_SMN_C2PMSG_79;
typedef union MP0_SMN_C2PMSG_80                        regMP0_SMN_C2PMSG_80;
typedef union MP0_SMN_C2PMSG_81                        regMP0_SMN_C2PMSG_81;
typedef union MP0_SMN_C2PMSG_82                        regMP0_SMN_C2PMSG_82;
typedef union MP0_SMN_C2PMSG_83                        regMP0_SMN_C2PMSG_83;
typedef union MP0_SMN_C2PMSG_84                        regMP0_SMN_C2PMSG_84;
typedef union MP0_SMN_C2PMSG_85                        regMP0_SMN_C2PMSG_85;
typedef union MP0_SMN_C2PMSG_86                        regMP0_SMN_C2PMSG_86;
typedef union MP0_SMN_C2PMSG_87                        regMP0_SMN_C2PMSG_87;
typedef union MP0_SMN_C2PMSG_88                        regMP0_SMN_C2PMSG_88;
typedef union MP0_SMN_C2PMSG_89                        regMP0_SMN_C2PMSG_89;
typedef union MP0_SMN_C2PMSG_90                        regMP0_SMN_C2PMSG_90;
typedef union MP0_SMN_C2PMSG_91                        regMP0_SMN_C2PMSG_91;
typedef union MP0_SMN_C2PMSG_92                        regMP0_SMN_C2PMSG_92;
typedef union MP0_SMN_C2PMSG_93                        regMP0_SMN_C2PMSG_93;
typedef union MP0_SMN_C2PMSG_94                        regMP0_SMN_C2PMSG_94;
typedef union MP0_SMN_C2PMSG_95                        regMP0_SMN_C2PMSG_95;
typedef union MP0_SMN_C2PMSG_96__GFX09                 regMP0_SMN_C2PMSG_96__GFX09;
typedef union MP0_SMN_C2PMSG_97__GFX09                 regMP0_SMN_C2PMSG_97__GFX09;
typedef union MP0_SMN_C2PMSG_98__GFX09                 regMP0_SMN_C2PMSG_98__GFX09;
typedef union MP0_SMN_C2PMSG_99__GFX09                 regMP0_SMN_C2PMSG_99__GFX09;
typedef union MP0_SMN_IH_CREDIT__GFX09                 regMP0_SMN_IH_CREDIT__GFX09;
typedef union MP0_SMN_IH_SW_INT__GFX09                 regMP0_SMN_IH_SW_INT__GFX09;
typedef union MP0_SMN_IH_SW_INT_CTRL__GFX09            regMP0_SMN_IH_SW_INT_CTRL__GFX09;
typedef union MP0_SOC_INFO                             regMP0_SOC_INFO;
typedef union MP1_ACP2MP_RESP                          regMP1_ACP2MP_RESP;
typedef union MP1_ACTIVE_FCN_ID__GFX09                 regMP1_ACTIVE_FCN_ID__GFX09;
typedef union MP1_C2PMSG_0                             regMP1_C2PMSG_0;
typedef union MP1_C2PMSG_1                             regMP1_C2PMSG_1;
typedef union MP1_C2PMSG_10                            regMP1_C2PMSG_10;
typedef union MP1_C2PMSG_100__GFX09                    regMP1_C2PMSG_100__GFX09;
typedef union MP1_C2PMSG_101__GFX09                    regMP1_C2PMSG_101__GFX09;
typedef union MP1_C2PMSG_102__GFX09                    regMP1_C2PMSG_102__GFX09;
typedef union MP1_C2PMSG_103__GFX09                    regMP1_C2PMSG_103__GFX09;
typedef union MP1_C2PMSG_11                            regMP1_C2PMSG_11;
typedef union MP1_C2PMSG_12                            regMP1_C2PMSG_12;
typedef union MP1_C2PMSG_13                            regMP1_C2PMSG_13;
typedef union MP1_C2PMSG_14                            regMP1_C2PMSG_14;
typedef union MP1_C2PMSG_15                            regMP1_C2PMSG_15;
typedef union MP1_C2PMSG_16                            regMP1_C2PMSG_16;
typedef union MP1_C2PMSG_17                            regMP1_C2PMSG_17;
typedef union MP1_C2PMSG_18                            regMP1_C2PMSG_18;
typedef union MP1_C2PMSG_19                            regMP1_C2PMSG_19;
typedef union MP1_C2PMSG_2                             regMP1_C2PMSG_2;
typedef union MP1_C2PMSG_20                            regMP1_C2PMSG_20;
typedef union MP1_C2PMSG_21                            regMP1_C2PMSG_21;
typedef union MP1_C2PMSG_22                            regMP1_C2PMSG_22;
typedef union MP1_C2PMSG_23                            regMP1_C2PMSG_23;
typedef union MP1_C2PMSG_24                            regMP1_C2PMSG_24;
typedef union MP1_C2PMSG_25                            regMP1_C2PMSG_25;
typedef union MP1_C2PMSG_26                            regMP1_C2PMSG_26;
typedef union MP1_C2PMSG_27                            regMP1_C2PMSG_27;
typedef union MP1_C2PMSG_28                            regMP1_C2PMSG_28;
typedef union MP1_C2PMSG_29                            regMP1_C2PMSG_29;
typedef union MP1_C2PMSG_3                             regMP1_C2PMSG_3;
typedef union MP1_C2PMSG_30                            regMP1_C2PMSG_30;
typedef union MP1_C2PMSG_31                            regMP1_C2PMSG_31;
typedef union MP1_C2PMSG_32                            regMP1_C2PMSG_32;
typedef union MP1_C2PMSG_33                            regMP1_C2PMSG_33;
typedef union MP1_C2PMSG_34                            regMP1_C2PMSG_34;
typedef union MP1_C2PMSG_35                            regMP1_C2PMSG_35;
typedef union MP1_C2PMSG_36                            regMP1_C2PMSG_36;
typedef union MP1_C2PMSG_37                            regMP1_C2PMSG_37;
typedef union MP1_C2PMSG_38                            regMP1_C2PMSG_38;
typedef union MP1_C2PMSG_39                            regMP1_C2PMSG_39;
typedef union MP1_C2PMSG_4                             regMP1_C2PMSG_4;
typedef union MP1_C2PMSG_40                            regMP1_C2PMSG_40;
typedef union MP1_C2PMSG_41                            regMP1_C2PMSG_41;
typedef union MP1_C2PMSG_42                            regMP1_C2PMSG_42;
typedef union MP1_C2PMSG_43                            regMP1_C2PMSG_43;
typedef union MP1_C2PMSG_44                            regMP1_C2PMSG_44;
typedef union MP1_C2PMSG_45                            regMP1_C2PMSG_45;
typedef union MP1_C2PMSG_46                            regMP1_C2PMSG_46;
typedef union MP1_C2PMSG_47                            regMP1_C2PMSG_47;
typedef union MP1_C2PMSG_48                            regMP1_C2PMSG_48;
typedef union MP1_C2PMSG_49                            regMP1_C2PMSG_49;
typedef union MP1_C2PMSG_5                             regMP1_C2PMSG_5;
typedef union MP1_C2PMSG_50                            regMP1_C2PMSG_50;
typedef union MP1_C2PMSG_51                            regMP1_C2PMSG_51;
typedef union MP1_C2PMSG_52                            regMP1_C2PMSG_52;
typedef union MP1_C2PMSG_53                            regMP1_C2PMSG_53;
typedef union MP1_C2PMSG_54                            regMP1_C2PMSG_54;
typedef union MP1_C2PMSG_55                            regMP1_C2PMSG_55;
typedef union MP1_C2PMSG_56                            regMP1_C2PMSG_56;
typedef union MP1_C2PMSG_57                            regMP1_C2PMSG_57;
typedef union MP1_C2PMSG_58                            regMP1_C2PMSG_58;
typedef union MP1_C2PMSG_59                            regMP1_C2PMSG_59;
typedef union MP1_C2PMSG_6                             regMP1_C2PMSG_6;
typedef union MP1_C2PMSG_60                            regMP1_C2PMSG_60;
typedef union MP1_C2PMSG_61                            regMP1_C2PMSG_61;
typedef union MP1_C2PMSG_62                            regMP1_C2PMSG_62;
typedef union MP1_C2PMSG_63                            regMP1_C2PMSG_63;
typedef union MP1_C2PMSG_64                            regMP1_C2PMSG_64;
typedef union MP1_C2PMSG_65                            regMP1_C2PMSG_65;
typedef union MP1_C2PMSG_66                            regMP1_C2PMSG_66;
typedef union MP1_C2PMSG_67                            regMP1_C2PMSG_67;
typedef union MP1_C2PMSG_68                            regMP1_C2PMSG_68;
typedef union MP1_C2PMSG_69                            regMP1_C2PMSG_69;
typedef union MP1_C2PMSG_7                             regMP1_C2PMSG_7;
typedef union MP1_C2PMSG_70                            regMP1_C2PMSG_70;
typedef union MP1_C2PMSG_71                            regMP1_C2PMSG_71;
typedef union MP1_C2PMSG_72                            regMP1_C2PMSG_72;
typedef union MP1_C2PMSG_73                            regMP1_C2PMSG_73;
typedef union MP1_C2PMSG_74                            regMP1_C2PMSG_74;
typedef union MP1_C2PMSG_75                            regMP1_C2PMSG_75;
typedef union MP1_C2PMSG_76                            regMP1_C2PMSG_76;
typedef union MP1_C2PMSG_77                            regMP1_C2PMSG_77;
typedef union MP1_C2PMSG_78                            regMP1_C2PMSG_78;
typedef union MP1_C2PMSG_79                            regMP1_C2PMSG_79;
typedef union MP1_C2PMSG_8                             regMP1_C2PMSG_8;
typedef union MP1_C2PMSG_80                            regMP1_C2PMSG_80;
typedef union MP1_C2PMSG_81                            regMP1_C2PMSG_81;
typedef union MP1_C2PMSG_82                            regMP1_C2PMSG_82;
typedef union MP1_C2PMSG_83                            regMP1_C2PMSG_83;
typedef union MP1_C2PMSG_84                            regMP1_C2PMSG_84;
typedef union MP1_C2PMSG_85                            regMP1_C2PMSG_85;
typedef union MP1_C2PMSG_86                            regMP1_C2PMSG_86;
typedef union MP1_C2PMSG_87                            regMP1_C2PMSG_87;
typedef union MP1_C2PMSG_88                            regMP1_C2PMSG_88;
typedef union MP1_C2PMSG_89                            regMP1_C2PMSG_89;
typedef union MP1_C2PMSG_9                             regMP1_C2PMSG_9;
typedef union MP1_C2PMSG_90                            regMP1_C2PMSG_90;
typedef union MP1_C2PMSG_91                            regMP1_C2PMSG_91;
typedef union MP1_C2PMSG_92                            regMP1_C2PMSG_92;
typedef union MP1_C2PMSG_93                            regMP1_C2PMSG_93;
typedef union MP1_C2PMSG_94                            regMP1_C2PMSG_94;
typedef union MP1_C2PMSG_95                            regMP1_C2PMSG_95;
typedef union MP1_C2PMSG_96__GFX09                     regMP1_C2PMSG_96__GFX09;
typedef union MP1_C2PMSG_97__GFX09                     regMP1_C2PMSG_97__GFX09;
typedef union MP1_C2PMSG_98__GFX09                     regMP1_C2PMSG_98__GFX09;
typedef union MP1_C2PMSG_99__GFX09                     regMP1_C2PMSG_99__GFX09;
typedef union MP1_DC2MP_RESP                           regMP1_DC2MP_RESP;
typedef union MP1_EXT_SCRATCH0__GFX09                  regMP1_EXT_SCRATCH0__GFX09;
typedef union MP1_EXT_SCRATCH1__GFX09                  regMP1_EXT_SCRATCH1__GFX09;
typedef union MP1_EXT_SCRATCH2__GFX09                  regMP1_EXT_SCRATCH2__GFX09;
typedef union MP1_EXT_SCRATCH3__GFX09                  regMP1_EXT_SCRATCH3__GFX09;
typedef union MP1_EXT_SCRATCH4__GFX09                  regMP1_EXT_SCRATCH4__GFX09;
typedef union MP1_EXT_SCRATCH5__GFX09                  regMP1_EXT_SCRATCH5__GFX09;
typedef union MP1_EXT_SCRATCH6__GFX09                  regMP1_EXT_SCRATCH6__GFX09;
typedef union MP1_EXT_SCRATCH7__GFX09                  regMP1_EXT_SCRATCH7__GFX09;
typedef union MP1_FIRMWARE_FLAGS                       regMP1_FIRMWARE_FLAGS;
typedef union MP1_FPS_CNT                              regMP1_FPS_CNT;
typedef union MP1_IH_CREDIT__GFX09                     regMP1_IH_CREDIT__GFX09;
typedef union MP1_IH_SW_INT__GFX09                     regMP1_IH_SW_INT__GFX09;
typedef union MP1_IH_SW_INT_CTRL__GFX09                regMP1_IH_SW_INT_CTRL__GFX09;
typedef union MP1_P2CMSG_0                             regMP1_P2CMSG_0;
typedef union MP1_P2CMSG_1                             regMP1_P2CMSG_1;
typedef union MP1_P2CMSG_2                             regMP1_P2CMSG_2;
typedef union MP1_P2CMSG_3                             regMP1_P2CMSG_3;
typedef union MP1_P2CMSG_INTEN                         regMP1_P2CMSG_INTEN;
typedef union MP1_P2CMSG_INTSTS                        regMP1_P2CMSG_INTSTS;
typedef union MP1_P2SMSG_0                             regMP1_P2SMSG_0;
typedef union MP1_P2SMSG_1                             regMP1_P2SMSG_1;
typedef union MP1_P2SMSG_2                             regMP1_P2SMSG_2;
typedef union MP1_P2SMSG_3                             regMP1_P2SMSG_3;
typedef union MP1_P2SMSG_INTSTS                        regMP1_P2SMSG_INTSTS;
typedef union MP1_PUB_SCRATCH0                         regMP1_PUB_SCRATCH0;
typedef union MP1_PUB_SCRATCH1                         regMP1_PUB_SCRATCH1;
typedef union MP1_PUB_SCRATCH2                         regMP1_PUB_SCRATCH2;
typedef union MP1_PUB_SCRATCH3                         regMP1_PUB_SCRATCH3;
typedef union MP1_RLC2MP_RESP                          regMP1_RLC2MP_RESP;
typedef union MP1_S2PMSG_0                             regMP1_S2PMSG_0;
typedef union MP1_SMN_ACP2MP_RESP                      regMP1_SMN_ACP2MP_RESP;
typedef union MP1_SMN_ACTIVE_FCN_ID__GFX09             regMP1_SMN_ACTIVE_FCN_ID__GFX09;
typedef union MP1_SMN_C2PMSG_100__GFX09                regMP1_SMN_C2PMSG_100__GFX09;
typedef union MP1_SMN_C2PMSG_101__GFX09                regMP1_SMN_C2PMSG_101__GFX09;
typedef union MP1_SMN_C2PMSG_102__GFX09                regMP1_SMN_C2PMSG_102__GFX09;
typedef union MP1_SMN_C2PMSG_103__GFX09                regMP1_SMN_C2PMSG_103__GFX09;
typedef union MP1_SMN_C2PMSG_32                        regMP1_SMN_C2PMSG_32;
typedef union MP1_SMN_C2PMSG_33                        regMP1_SMN_C2PMSG_33;
typedef union MP1_SMN_C2PMSG_34                        regMP1_SMN_C2PMSG_34;
typedef union MP1_SMN_C2PMSG_35                        regMP1_SMN_C2PMSG_35;
typedef union MP1_SMN_C2PMSG_36                        regMP1_SMN_C2PMSG_36;
typedef union MP1_SMN_C2PMSG_37                        regMP1_SMN_C2PMSG_37;
typedef union MP1_SMN_C2PMSG_38                        regMP1_SMN_C2PMSG_38;
typedef union MP1_SMN_C2PMSG_39                        regMP1_SMN_C2PMSG_39;
typedef union MP1_SMN_C2PMSG_40                        regMP1_SMN_C2PMSG_40;
typedef union MP1_SMN_C2PMSG_41                        regMP1_SMN_C2PMSG_41;
typedef union MP1_SMN_C2PMSG_42                        regMP1_SMN_C2PMSG_42;
typedef union MP1_SMN_C2PMSG_43                        regMP1_SMN_C2PMSG_43;
typedef union MP1_SMN_C2PMSG_44                        regMP1_SMN_C2PMSG_44;
typedef union MP1_SMN_C2PMSG_45                        regMP1_SMN_C2PMSG_45;
typedef union MP1_SMN_C2PMSG_46                        regMP1_SMN_C2PMSG_46;
typedef union MP1_SMN_C2PMSG_47                        regMP1_SMN_C2PMSG_47;
typedef union MP1_SMN_C2PMSG_48                        regMP1_SMN_C2PMSG_48;
typedef union MP1_SMN_C2PMSG_49                        regMP1_SMN_C2PMSG_49;
typedef union MP1_SMN_C2PMSG_50                        regMP1_SMN_C2PMSG_50;
typedef union MP1_SMN_C2PMSG_51                        regMP1_SMN_C2PMSG_51;
typedef union MP1_SMN_C2PMSG_52                        regMP1_SMN_C2PMSG_52;
typedef union MP1_SMN_C2PMSG_53                        regMP1_SMN_C2PMSG_53;
typedef union MP1_SMN_C2PMSG_54                        regMP1_SMN_C2PMSG_54;
typedef union MP1_SMN_C2PMSG_55                        regMP1_SMN_C2PMSG_55;
typedef union MP1_SMN_C2PMSG_56                        regMP1_SMN_C2PMSG_56;
typedef union MP1_SMN_C2PMSG_57                        regMP1_SMN_C2PMSG_57;
typedef union MP1_SMN_C2PMSG_58                        regMP1_SMN_C2PMSG_58;
typedef union MP1_SMN_C2PMSG_59                        regMP1_SMN_C2PMSG_59;
typedef union MP1_SMN_C2PMSG_60                        regMP1_SMN_C2PMSG_60;
typedef union MP1_SMN_C2PMSG_61                        regMP1_SMN_C2PMSG_61;
typedef union MP1_SMN_C2PMSG_62                        regMP1_SMN_C2PMSG_62;
typedef union MP1_SMN_C2PMSG_63                        regMP1_SMN_C2PMSG_63;
typedef union MP1_SMN_C2PMSG_64                        regMP1_SMN_C2PMSG_64;
typedef union MP1_SMN_C2PMSG_65                        regMP1_SMN_C2PMSG_65;
typedef union MP1_SMN_C2PMSG_66                        regMP1_SMN_C2PMSG_66;
typedef union MP1_SMN_C2PMSG_67                        regMP1_SMN_C2PMSG_67;
typedef union MP1_SMN_C2PMSG_68                        regMP1_SMN_C2PMSG_68;
typedef union MP1_SMN_C2PMSG_69                        regMP1_SMN_C2PMSG_69;
typedef union MP1_SMN_C2PMSG_70                        regMP1_SMN_C2PMSG_70;
typedef union MP1_SMN_C2PMSG_71                        regMP1_SMN_C2PMSG_71;
typedef union MP1_SMN_C2PMSG_72                        regMP1_SMN_C2PMSG_72;
typedef union MP1_SMN_C2PMSG_73                        regMP1_SMN_C2PMSG_73;
typedef union MP1_SMN_C2PMSG_74                        regMP1_SMN_C2PMSG_74;
typedef union MP1_SMN_C2PMSG_75                        regMP1_SMN_C2PMSG_75;
typedef union MP1_SMN_C2PMSG_76                        regMP1_SMN_C2PMSG_76;
typedef union MP1_SMN_C2PMSG_77                        regMP1_SMN_C2PMSG_77;
typedef union MP1_SMN_C2PMSG_78                        regMP1_SMN_C2PMSG_78;
typedef union MP1_SMN_C2PMSG_79                        regMP1_SMN_C2PMSG_79;
typedef union MP1_SMN_C2PMSG_80                        regMP1_SMN_C2PMSG_80;
typedef union MP1_SMN_C2PMSG_81                        regMP1_SMN_C2PMSG_81;
typedef union MP1_SMN_C2PMSG_82                        regMP1_SMN_C2PMSG_82;
typedef union MP1_SMN_C2PMSG_83                        regMP1_SMN_C2PMSG_83;
typedef union MP1_SMN_C2PMSG_84                        regMP1_SMN_C2PMSG_84;
typedef union MP1_SMN_C2PMSG_85                        regMP1_SMN_C2PMSG_85;
typedef union MP1_SMN_C2PMSG_86                        regMP1_SMN_C2PMSG_86;
typedef union MP1_SMN_C2PMSG_87                        regMP1_SMN_C2PMSG_87;
typedef union MP1_SMN_C2PMSG_88                        regMP1_SMN_C2PMSG_88;
typedef union MP1_SMN_C2PMSG_89                        regMP1_SMN_C2PMSG_89;
typedef union MP1_SMN_C2PMSG_90                        regMP1_SMN_C2PMSG_90;
typedef union MP1_SMN_C2PMSG_91                        regMP1_SMN_C2PMSG_91;
typedef union MP1_SMN_C2PMSG_92                        regMP1_SMN_C2PMSG_92;
typedef union MP1_SMN_C2PMSG_93                        regMP1_SMN_C2PMSG_93;
typedef union MP1_SMN_C2PMSG_94                        regMP1_SMN_C2PMSG_94;
typedef union MP1_SMN_C2PMSG_95                        regMP1_SMN_C2PMSG_95;
typedef union MP1_SMN_C2PMSG_96__GFX09                 regMP1_SMN_C2PMSG_96__GFX09;
typedef union MP1_SMN_C2PMSG_97__GFX09                 regMP1_SMN_C2PMSG_97__GFX09;
typedef union MP1_SMN_C2PMSG_98__GFX09                 regMP1_SMN_C2PMSG_98__GFX09;
typedef union MP1_SMN_C2PMSG_99__GFX09                 regMP1_SMN_C2PMSG_99__GFX09;
typedef union MP1_SMN_DC2MP_RESP                       regMP1_SMN_DC2MP_RESP;
typedef union MP1_SMN_EXT_SCRATCH0__GFX09              regMP1_SMN_EXT_SCRATCH0__GFX09;
typedef union MP1_SMN_EXT_SCRATCH1__GFX09              regMP1_SMN_EXT_SCRATCH1__GFX09;
typedef union MP1_SMN_EXT_SCRATCH2__GFX09              regMP1_SMN_EXT_SCRATCH2__GFX09;
typedef union MP1_SMN_EXT_SCRATCH3__GFX09              regMP1_SMN_EXT_SCRATCH3__GFX09;
typedef union MP1_SMN_EXT_SCRATCH4__GFX09              regMP1_SMN_EXT_SCRATCH4__GFX09;
typedef union MP1_SMN_EXT_SCRATCH5__GFX09              regMP1_SMN_EXT_SCRATCH5__GFX09;
typedef union MP1_SMN_EXT_SCRATCH6__GFX09              regMP1_SMN_EXT_SCRATCH6__GFX09;
typedef union MP1_SMN_EXT_SCRATCH7__GFX09              regMP1_SMN_EXT_SCRATCH7__GFX09;
typedef union MP1_SMN_EXT_SCRATCH8__GFX09              regMP1_SMN_EXT_SCRATCH8__GFX09;
typedef union MP1_SMN_FPS_CNT                          regMP1_SMN_FPS_CNT;
typedef union MP1_SMN_IH_CREDIT__GFX09                 regMP1_SMN_IH_CREDIT__GFX09;
typedef union MP1_SMN_IH_SW_INT__GFX09                 regMP1_SMN_IH_SW_INT__GFX09;
typedef union MP1_SMN_IH_SW_INT_CTRL__GFX09            regMP1_SMN_IH_SW_INT_CTRL__GFX09;
typedef union MP1_SMN_RLC2MP_RESP                      regMP1_SMN_RLC2MP_RESP;
typedef union MP1_SMN_UVD2MP_RESP                      regMP1_SMN_UVD2MP_RESP;
typedef union MP1_SMN_VCE2MP_RESP                      regMP1_SMN_VCE2MP_RESP;
typedef union MP1_UVD2MP_RESP                          regMP1_UVD2MP_RESP;
typedef union MP1_VCE2MP_RESP                          regMP1_VCE2MP_RESP;
typedef union PA_CL_CLIP_CNTL                          regPA_CL_CLIP_CNTL;
typedef union PA_CL_CNTL_STATUS                        regPA_CL_CNTL_STATUS;
typedef union PA_CL_ENHANCE__GFX09                     regPA_CL_ENHANCE__GFX09;
typedef union PA_CL_GB_HORZ_CLIP_ADJ                   regPA_CL_GB_HORZ_CLIP_ADJ;
typedef union PA_CL_GB_HORZ_DISC_ADJ                   regPA_CL_GB_HORZ_DISC_ADJ;
typedef union PA_CL_GB_VERT_CLIP_ADJ                   regPA_CL_GB_VERT_CLIP_ADJ;
typedef union PA_CL_GB_VERT_DISC_ADJ                   regPA_CL_GB_VERT_DISC_ADJ;
typedef union PA_CL_NANINF_CNTL                        regPA_CL_NANINF_CNTL;
typedef union PA_CL_NGG_CNTL                           regPA_CL_NGG_CNTL;
typedef union PA_CL_POINT_CULL_RAD                     regPA_CL_POINT_CULL_RAD;
typedef union PA_CL_POINT_SIZE                         regPA_CL_POINT_SIZE;
typedef union PA_CL_POINT_X_RAD                        regPA_CL_POINT_X_RAD;
typedef union PA_CL_POINT_Y_RAD                        regPA_CL_POINT_Y_RAD;
typedef union PA_CL_RESET_DEBUG                        regPA_CL_RESET_DEBUG;
typedef union PA_CL_UCP_0_W                            regPA_CL_UCP_0_W;
typedef union PA_CL_UCP_0_X                            regPA_CL_UCP_0_X;
typedef union PA_CL_UCP_0_Y                            regPA_CL_UCP_0_Y;
typedef union PA_CL_UCP_0_Z                            regPA_CL_UCP_0_Z;
typedef union PA_CL_UCP_1_W                            regPA_CL_UCP_1_W;
typedef union PA_CL_UCP_1_X                            regPA_CL_UCP_1_X;
typedef union PA_CL_UCP_1_Y                            regPA_CL_UCP_1_Y;
typedef union PA_CL_UCP_1_Z                            regPA_CL_UCP_1_Z;
typedef union PA_CL_UCP_2_W                            regPA_CL_UCP_2_W;
typedef union PA_CL_UCP_2_X                            regPA_CL_UCP_2_X;
typedef union PA_CL_UCP_2_Y                            regPA_CL_UCP_2_Y;
typedef union PA_CL_UCP_2_Z                            regPA_CL_UCP_2_Z;
typedef union PA_CL_UCP_3_W                            regPA_CL_UCP_3_W;
typedef union PA_CL_UCP_3_X                            regPA_CL_UCP_3_X;
typedef union PA_CL_UCP_3_Y                            regPA_CL_UCP_3_Y;
typedef union PA_CL_UCP_3_Z                            regPA_CL_UCP_3_Z;
typedef union PA_CL_UCP_4_W                            regPA_CL_UCP_4_W;
typedef union PA_CL_UCP_4_X                            regPA_CL_UCP_4_X;
typedef union PA_CL_UCP_4_Y                            regPA_CL_UCP_4_Y;
typedef union PA_CL_UCP_4_Z                            regPA_CL_UCP_4_Z;
typedef union PA_CL_UCP_5_W                            regPA_CL_UCP_5_W;
typedef union PA_CL_UCP_5_X                            regPA_CL_UCP_5_X;
typedef union PA_CL_UCP_5_Y                            regPA_CL_UCP_5_Y;
typedef union PA_CL_UCP_5_Z                            regPA_CL_UCP_5_Z;
typedef union PA_CL_VPORT_XOFFSET                      regPA_CL_VPORT_XOFFSET;
typedef union PA_CL_VPORT_XOFFSET_1                    regPA_CL_VPORT_XOFFSET_1;
typedef union PA_CL_VPORT_XOFFSET_10                   regPA_CL_VPORT_XOFFSET_10;
typedef union PA_CL_VPORT_XOFFSET_11                   regPA_CL_VPORT_XOFFSET_11;
typedef union PA_CL_VPORT_XOFFSET_12                   regPA_CL_VPORT_XOFFSET_12;
typedef union PA_CL_VPORT_XOFFSET_13                   regPA_CL_VPORT_XOFFSET_13;
typedef union PA_CL_VPORT_XOFFSET_14                   regPA_CL_VPORT_XOFFSET_14;
typedef union PA_CL_VPORT_XOFFSET_15                   regPA_CL_VPORT_XOFFSET_15;
typedef union PA_CL_VPORT_XOFFSET_2                    regPA_CL_VPORT_XOFFSET_2;
typedef union PA_CL_VPORT_XOFFSET_3                    regPA_CL_VPORT_XOFFSET_3;
typedef union PA_CL_VPORT_XOFFSET_4                    regPA_CL_VPORT_XOFFSET_4;
typedef union PA_CL_VPORT_XOFFSET_5                    regPA_CL_VPORT_XOFFSET_5;
typedef union PA_CL_VPORT_XOFFSET_6                    regPA_CL_VPORT_XOFFSET_6;
typedef union PA_CL_VPORT_XOFFSET_7                    regPA_CL_VPORT_XOFFSET_7;
typedef union PA_CL_VPORT_XOFFSET_8                    regPA_CL_VPORT_XOFFSET_8;
typedef union PA_CL_VPORT_XOFFSET_9                    regPA_CL_VPORT_XOFFSET_9;
typedef union PA_CL_VPORT_XSCALE                       regPA_CL_VPORT_XSCALE;
typedef union PA_CL_VPORT_XSCALE_1                     regPA_CL_VPORT_XSCALE_1;
typedef union PA_CL_VPORT_XSCALE_10                    regPA_CL_VPORT_XSCALE_10;
typedef union PA_CL_VPORT_XSCALE_11                    regPA_CL_VPORT_XSCALE_11;
typedef union PA_CL_VPORT_XSCALE_12                    regPA_CL_VPORT_XSCALE_12;
typedef union PA_CL_VPORT_XSCALE_13                    regPA_CL_VPORT_XSCALE_13;
typedef union PA_CL_VPORT_XSCALE_14                    regPA_CL_VPORT_XSCALE_14;
typedef union PA_CL_VPORT_XSCALE_15                    regPA_CL_VPORT_XSCALE_15;
typedef union PA_CL_VPORT_XSCALE_2                     regPA_CL_VPORT_XSCALE_2;
typedef union PA_CL_VPORT_XSCALE_3                     regPA_CL_VPORT_XSCALE_3;
typedef union PA_CL_VPORT_XSCALE_4                     regPA_CL_VPORT_XSCALE_4;
typedef union PA_CL_VPORT_XSCALE_5                     regPA_CL_VPORT_XSCALE_5;
typedef union PA_CL_VPORT_XSCALE_6                     regPA_CL_VPORT_XSCALE_6;
typedef union PA_CL_VPORT_XSCALE_7                     regPA_CL_VPORT_XSCALE_7;
typedef union PA_CL_VPORT_XSCALE_8                     regPA_CL_VPORT_XSCALE_8;
typedef union PA_CL_VPORT_XSCALE_9                     regPA_CL_VPORT_XSCALE_9;
typedef union PA_CL_VPORT_YOFFSET                      regPA_CL_VPORT_YOFFSET;
typedef union PA_CL_VPORT_YOFFSET_1                    regPA_CL_VPORT_YOFFSET_1;
typedef union PA_CL_VPORT_YOFFSET_10                   regPA_CL_VPORT_YOFFSET_10;
typedef union PA_CL_VPORT_YOFFSET_11                   regPA_CL_VPORT_YOFFSET_11;
typedef union PA_CL_VPORT_YOFFSET_12                   regPA_CL_VPORT_YOFFSET_12;
typedef union PA_CL_VPORT_YOFFSET_13                   regPA_CL_VPORT_YOFFSET_13;
typedef union PA_CL_VPORT_YOFFSET_14                   regPA_CL_VPORT_YOFFSET_14;
typedef union PA_CL_VPORT_YOFFSET_15                   regPA_CL_VPORT_YOFFSET_15;
typedef union PA_CL_VPORT_YOFFSET_2                    regPA_CL_VPORT_YOFFSET_2;
typedef union PA_CL_VPORT_YOFFSET_3                    regPA_CL_VPORT_YOFFSET_3;
typedef union PA_CL_VPORT_YOFFSET_4                    regPA_CL_VPORT_YOFFSET_4;
typedef union PA_CL_VPORT_YOFFSET_5                    regPA_CL_VPORT_YOFFSET_5;
typedef union PA_CL_VPORT_YOFFSET_6                    regPA_CL_VPORT_YOFFSET_6;
typedef union PA_CL_VPORT_YOFFSET_7                    regPA_CL_VPORT_YOFFSET_7;
typedef union PA_CL_VPORT_YOFFSET_8                    regPA_CL_VPORT_YOFFSET_8;
typedef union PA_CL_VPORT_YOFFSET_9                    regPA_CL_VPORT_YOFFSET_9;
typedef union PA_CL_VPORT_YSCALE                       regPA_CL_VPORT_YSCALE;
typedef union PA_CL_VPORT_YSCALE_1                     regPA_CL_VPORT_YSCALE_1;
typedef union PA_CL_VPORT_YSCALE_10                    regPA_CL_VPORT_YSCALE_10;
typedef union PA_CL_VPORT_YSCALE_11                    regPA_CL_VPORT_YSCALE_11;
typedef union PA_CL_VPORT_YSCALE_12                    regPA_CL_VPORT_YSCALE_12;
typedef union PA_CL_VPORT_YSCALE_13                    regPA_CL_VPORT_YSCALE_13;
typedef union PA_CL_VPORT_YSCALE_14                    regPA_CL_VPORT_YSCALE_14;
typedef union PA_CL_VPORT_YSCALE_15                    regPA_CL_VPORT_YSCALE_15;
typedef union PA_CL_VPORT_YSCALE_2                     regPA_CL_VPORT_YSCALE_2;
typedef union PA_CL_VPORT_YSCALE_3                     regPA_CL_VPORT_YSCALE_3;
typedef union PA_CL_VPORT_YSCALE_4                     regPA_CL_VPORT_YSCALE_4;
typedef union PA_CL_VPORT_YSCALE_5                     regPA_CL_VPORT_YSCALE_5;
typedef union PA_CL_VPORT_YSCALE_6                     regPA_CL_VPORT_YSCALE_6;
typedef union PA_CL_VPORT_YSCALE_7                     regPA_CL_VPORT_YSCALE_7;
typedef union PA_CL_VPORT_YSCALE_8                     regPA_CL_VPORT_YSCALE_8;
typedef union PA_CL_VPORT_YSCALE_9                     regPA_CL_VPORT_YSCALE_9;
typedef union PA_CL_VPORT_ZOFFSET                      regPA_CL_VPORT_ZOFFSET;
typedef union PA_CL_VPORT_ZOFFSET_1                    regPA_CL_VPORT_ZOFFSET_1;
typedef union PA_CL_VPORT_ZOFFSET_10                   regPA_CL_VPORT_ZOFFSET_10;
typedef union PA_CL_VPORT_ZOFFSET_11                   regPA_CL_VPORT_ZOFFSET_11;
typedef union PA_CL_VPORT_ZOFFSET_12                   regPA_CL_VPORT_ZOFFSET_12;
typedef union PA_CL_VPORT_ZOFFSET_13                   regPA_CL_VPORT_ZOFFSET_13;
typedef union PA_CL_VPORT_ZOFFSET_14                   regPA_CL_VPORT_ZOFFSET_14;
typedef union PA_CL_VPORT_ZOFFSET_15                   regPA_CL_VPORT_ZOFFSET_15;
typedef union PA_CL_VPORT_ZOFFSET_2                    regPA_CL_VPORT_ZOFFSET_2;
typedef union PA_CL_VPORT_ZOFFSET_3                    regPA_CL_VPORT_ZOFFSET_3;
typedef union PA_CL_VPORT_ZOFFSET_4                    regPA_CL_VPORT_ZOFFSET_4;
typedef union PA_CL_VPORT_ZOFFSET_5                    regPA_CL_VPORT_ZOFFSET_5;
typedef union PA_CL_VPORT_ZOFFSET_6                    regPA_CL_VPORT_ZOFFSET_6;
typedef union PA_CL_VPORT_ZOFFSET_7                    regPA_CL_VPORT_ZOFFSET_7;
typedef union PA_CL_VPORT_ZOFFSET_8                    regPA_CL_VPORT_ZOFFSET_8;
typedef union PA_CL_VPORT_ZOFFSET_9                    regPA_CL_VPORT_ZOFFSET_9;
typedef union PA_CL_VPORT_ZSCALE                       regPA_CL_VPORT_ZSCALE;
typedef union PA_CL_VPORT_ZSCALE_1                     regPA_CL_VPORT_ZSCALE_1;
typedef union PA_CL_VPORT_ZSCALE_10                    regPA_CL_VPORT_ZSCALE_10;
typedef union PA_CL_VPORT_ZSCALE_11                    regPA_CL_VPORT_ZSCALE_11;
typedef union PA_CL_VPORT_ZSCALE_12                    regPA_CL_VPORT_ZSCALE_12;
typedef union PA_CL_VPORT_ZSCALE_13                    regPA_CL_VPORT_ZSCALE_13;
typedef union PA_CL_VPORT_ZSCALE_14                    regPA_CL_VPORT_ZSCALE_14;
typedef union PA_CL_VPORT_ZSCALE_15                    regPA_CL_VPORT_ZSCALE_15;
typedef union PA_CL_VPORT_ZSCALE_2                     regPA_CL_VPORT_ZSCALE_2;
typedef union PA_CL_VPORT_ZSCALE_3                     regPA_CL_VPORT_ZSCALE_3;
typedef union PA_CL_VPORT_ZSCALE_4                     regPA_CL_VPORT_ZSCALE_4;
typedef union PA_CL_VPORT_ZSCALE_5                     regPA_CL_VPORT_ZSCALE_5;
typedef union PA_CL_VPORT_ZSCALE_6                     regPA_CL_VPORT_ZSCALE_6;
typedef union PA_CL_VPORT_ZSCALE_7                     regPA_CL_VPORT_ZSCALE_7;
typedef union PA_CL_VPORT_ZSCALE_8                     regPA_CL_VPORT_ZSCALE_8;
typedef union PA_CL_VPORT_ZSCALE_9                     regPA_CL_VPORT_ZSCALE_9;
typedef union PA_CL_VS_OUT_CNTL__GFX09                 regPA_CL_VS_OUT_CNTL__GFX09;
typedef union PA_CL_VTE_CNTL                           regPA_CL_VTE_CNTL;
typedef union PA_SC_AA_CONFIG                          regPA_SC_AA_CONFIG;
typedef union PA_SC_AA_MASK_X0Y0_X1Y0                  regPA_SC_AA_MASK_X0Y0_X1Y0;
typedef union PA_SC_AA_MASK_X0Y1_X1Y1                  regPA_SC_AA_MASK_X0Y1_X1Y1;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2;
typedef union PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3        regPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3;
typedef union PA_SC_BINNER_CNTL_0                      regPA_SC_BINNER_CNTL_0;
typedef union PA_SC_BINNER_CNTL_1                      regPA_SC_BINNER_CNTL_1;
typedef union PA_SC_BINNER_EVENT_CNTL_0                regPA_SC_BINNER_EVENT_CNTL_0;
typedef union PA_SC_BINNER_EVENT_CNTL_1__GFX09         regPA_SC_BINNER_EVENT_CNTL_1__GFX09;
typedef union PA_SC_BINNER_EVENT_CNTL_2                regPA_SC_BINNER_EVENT_CNTL_2;
typedef union PA_SC_BINNER_EVENT_CNTL_3__GFX09         regPA_SC_BINNER_EVENT_CNTL_3__GFX09;
typedef union PA_SC_BINNER_PERF_CNTL_0                 regPA_SC_BINNER_PERF_CNTL_0;
typedef union PA_SC_BINNER_PERF_CNTL_1                 regPA_SC_BINNER_PERF_CNTL_1;
typedef union PA_SC_BINNER_PERF_CNTL_2                 regPA_SC_BINNER_PERF_CNTL_2;
typedef union PA_SC_BINNER_PERF_CNTL_3                 regPA_SC_BINNER_PERF_CNTL_3;
typedef union PA_SC_BINNER_TIMEOUT_COUNTER             regPA_SC_BINNER_TIMEOUT_COUNTER;
typedef union PA_SC_CENTROID_PRIORITY_0                regPA_SC_CENTROID_PRIORITY_0;
typedef union PA_SC_CENTROID_PRIORITY_1                regPA_SC_CENTROID_PRIORITY_1;
typedef union PA_SC_CLIPRECT_0_BR                      regPA_SC_CLIPRECT_0_BR;
typedef union PA_SC_CLIPRECT_0_TL                      regPA_SC_CLIPRECT_0_TL;
typedef union PA_SC_CLIPRECT_1_BR                      regPA_SC_CLIPRECT_1_BR;
typedef union PA_SC_CLIPRECT_1_TL                      regPA_SC_CLIPRECT_1_TL;
typedef union PA_SC_CLIPRECT_2_BR                      regPA_SC_CLIPRECT_2_BR;
typedef union PA_SC_CLIPRECT_2_TL                      regPA_SC_CLIPRECT_2_TL;
typedef union PA_SC_CLIPRECT_3_BR                      regPA_SC_CLIPRECT_3_BR;
typedef union PA_SC_CLIPRECT_3_TL                      regPA_SC_CLIPRECT_3_TL;
typedef union PA_SC_CLIPRECT_RULE                      regPA_SC_CLIPRECT_RULE;
typedef union PA_SC_CONSERVATIVE_RASTERIZATION_CNTL    regPA_SC_CONSERVATIVE_RASTERIZATION_CNTL;
typedef union PA_SC_DEBUG_DATA                         regPA_SC_DEBUG_DATA;
typedef union PA_SC_DSM_CNTL                           regPA_SC_DSM_CNTL;
typedef union PA_SC_EDGERULE                           regPA_SC_EDGERULE;
typedef union PA_SC_ENHANCE                            regPA_SC_ENHANCE;
typedef union PA_SC_ENHANCE_1__GFX09                   regPA_SC_ENHANCE_1__GFX09;
typedef union PA_SC_FIFO_DEPTH_CNTL                    regPA_SC_FIFO_DEPTH_CNTL;
typedef union PA_SC_FIFO_SIZE                          regPA_SC_FIFO_SIZE;
typedef union PA_SC_FORCE_EOV_MAX_CNTS                 regPA_SC_FORCE_EOV_MAX_CNTS;
typedef union PA_SC_GENERIC_SCISSOR_BR                 regPA_SC_GENERIC_SCISSOR_BR;
typedef union PA_SC_GENERIC_SCISSOR_TL                 regPA_SC_GENERIC_SCISSOR_TL;
typedef union PA_SC_HORIZ_GRID                         regPA_SC_HORIZ_GRID;
typedef union PA_SC_HP3D_TRAP_SCREEN_COUNT             regPA_SC_HP3D_TRAP_SCREEN_COUNT;
typedef union PA_SC_HP3D_TRAP_SCREEN_H                 regPA_SC_HP3D_TRAP_SCREEN_H;
typedef union PA_SC_HP3D_TRAP_SCREEN_HV_EN             regPA_SC_HP3D_TRAP_SCREEN_HV_EN;
typedef union PA_SC_HP3D_TRAP_SCREEN_HV_LOCK           regPA_SC_HP3D_TRAP_SCREEN_HV_LOCK;
typedef union PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE        regPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE;
typedef union PA_SC_HP3D_TRAP_SCREEN_V                 regPA_SC_HP3D_TRAP_SCREEN_V;
typedef union PA_SC_IF_FIFO_SIZE                       regPA_SC_IF_FIFO_SIZE;
typedef union PA_SC_LEFT_VERT_GRID                     regPA_SC_LEFT_VERT_GRID;
typedef union PA_SC_LINE_CNTL                          regPA_SC_LINE_CNTL;
typedef union PA_SC_LINE_STIPPLE                       regPA_SC_LINE_STIPPLE;
typedef union PA_SC_LINE_STIPPLE_STATE                 regPA_SC_LINE_STIPPLE_STATE;
typedef union PA_SC_MODE_CNTL_0                        regPA_SC_MODE_CNTL_0;
typedef union PA_SC_MODE_CNTL_1                        regPA_SC_MODE_CNTL_1;
typedef union PA_SC_NGG_MODE_CNTL                      regPA_SC_NGG_MODE_CNTL;
typedef union PA_SC_P3D_TRAP_SCREEN_COUNT              regPA_SC_P3D_TRAP_SCREEN_COUNT;
typedef union PA_SC_P3D_TRAP_SCREEN_H                  regPA_SC_P3D_TRAP_SCREEN_H;
typedef union PA_SC_P3D_TRAP_SCREEN_HV_EN              regPA_SC_P3D_TRAP_SCREEN_HV_EN;
typedef union PA_SC_P3D_TRAP_SCREEN_HV_LOCK            regPA_SC_P3D_TRAP_SCREEN_HV_LOCK;
typedef union PA_SC_P3D_TRAP_SCREEN_OCCURRENCE         regPA_SC_P3D_TRAP_SCREEN_OCCURRENCE;
typedef union PA_SC_P3D_TRAP_SCREEN_V                  regPA_SC_P3D_TRAP_SCREEN_V;
typedef union PA_SC_PERFCOUNTER0_HI                    regPA_SC_PERFCOUNTER0_HI;
typedef union PA_SC_PERFCOUNTER0_LO                    regPA_SC_PERFCOUNTER0_LO;
typedef union PA_SC_PERFCOUNTER0_SELECT                regPA_SC_PERFCOUNTER0_SELECT;
typedef union PA_SC_PERFCOUNTER0_SELECT1               regPA_SC_PERFCOUNTER0_SELECT1;
typedef union PA_SC_PERFCOUNTER1_HI                    regPA_SC_PERFCOUNTER1_HI;
typedef union PA_SC_PERFCOUNTER1_LO                    regPA_SC_PERFCOUNTER1_LO;
typedef union PA_SC_PERFCOUNTER1_SELECT                regPA_SC_PERFCOUNTER1_SELECT;
typedef union PA_SC_PERFCOUNTER2_HI                    regPA_SC_PERFCOUNTER2_HI;
typedef union PA_SC_PERFCOUNTER2_LO                    regPA_SC_PERFCOUNTER2_LO;
typedef union PA_SC_PERFCOUNTER2_SELECT                regPA_SC_PERFCOUNTER2_SELECT;
typedef union PA_SC_PERFCOUNTER3_HI                    regPA_SC_PERFCOUNTER3_HI;
typedef union PA_SC_PERFCOUNTER3_LO                    regPA_SC_PERFCOUNTER3_LO;
typedef union PA_SC_PERFCOUNTER3_SELECT                regPA_SC_PERFCOUNTER3_SELECT;
typedef union PA_SC_PERFCOUNTER4_HI                    regPA_SC_PERFCOUNTER4_HI;
typedef union PA_SC_PERFCOUNTER4_LO                    regPA_SC_PERFCOUNTER4_LO;
typedef union PA_SC_PERFCOUNTER4_SELECT                regPA_SC_PERFCOUNTER4_SELECT;
typedef union PA_SC_PERFCOUNTER5_HI                    regPA_SC_PERFCOUNTER5_HI;
typedef union PA_SC_PERFCOUNTER5_LO                    regPA_SC_PERFCOUNTER5_LO;
typedef union PA_SC_PERFCOUNTER5_SELECT                regPA_SC_PERFCOUNTER5_SELECT;
typedef union PA_SC_PERFCOUNTER6_HI                    regPA_SC_PERFCOUNTER6_HI;
typedef union PA_SC_PERFCOUNTER6_LO                    regPA_SC_PERFCOUNTER6_LO;
typedef union PA_SC_PERFCOUNTER6_SELECT                regPA_SC_PERFCOUNTER6_SELECT;
typedef union PA_SC_PERFCOUNTER7_HI                    regPA_SC_PERFCOUNTER7_HI;
typedef union PA_SC_PERFCOUNTER7_LO                    regPA_SC_PERFCOUNTER7_LO;
typedef union PA_SC_PERFCOUNTER7_SELECT                regPA_SC_PERFCOUNTER7_SELECT;
typedef union PA_SC_PKR_WAVE_TABLE_CNTL                regPA_SC_PKR_WAVE_TABLE_CNTL;
typedef union PA_SC_RASTER_CONFIG__GFX09               regPA_SC_RASTER_CONFIG__GFX09;
typedef union PA_SC_RASTER_CONFIG_1__GFX09             regPA_SC_RASTER_CONFIG_1__GFX09;
typedef union PA_SC_RIGHT_VERT_GRID                    regPA_SC_RIGHT_VERT_GRID;
typedef union PA_SC_SCREEN_EXTENT_CONTROL              regPA_SC_SCREEN_EXTENT_CONTROL;
typedef union PA_SC_SCREEN_EXTENT_MAX_0                regPA_SC_SCREEN_EXTENT_MAX_0;
typedef union PA_SC_SCREEN_EXTENT_MAX_1                regPA_SC_SCREEN_EXTENT_MAX_1;
typedef union PA_SC_SCREEN_EXTENT_MIN_0                regPA_SC_SCREEN_EXTENT_MIN_0;
typedef union PA_SC_SCREEN_EXTENT_MIN_1                regPA_SC_SCREEN_EXTENT_MIN_1;
typedef union PA_SC_SCREEN_SCISSOR_BR                  regPA_SC_SCREEN_SCISSOR_BR;
typedef union PA_SC_SCREEN_SCISSOR_TL                  regPA_SC_SCREEN_SCISSOR_TL;
typedef union PA_SC_SHADER_CONTROL                     regPA_SC_SHADER_CONTROL;
typedef union PA_SC_TILE_STEERING_CREST_OVERRIDE       regPA_SC_TILE_STEERING_CREST_OVERRIDE;
typedef union PA_SC_TILE_STEERING_OVERRIDE             regPA_SC_TILE_STEERING_OVERRIDE;
typedef union PA_SC_TRAP_SCREEN_COUNT                  regPA_SC_TRAP_SCREEN_COUNT;
typedef union PA_SC_TRAP_SCREEN_H                      regPA_SC_TRAP_SCREEN_H;
typedef union PA_SC_TRAP_SCREEN_HV_EN                  regPA_SC_TRAP_SCREEN_HV_EN;
typedef union PA_SC_TRAP_SCREEN_HV_LOCK                regPA_SC_TRAP_SCREEN_HV_LOCK;
typedef union PA_SC_TRAP_SCREEN_OCCURRENCE             regPA_SC_TRAP_SCREEN_OCCURRENCE;
typedef union PA_SC_TRAP_SCREEN_V                      regPA_SC_TRAP_SCREEN_V;
typedef union PA_SC_VPORT_SCISSOR_0_BR                 regPA_SC_VPORT_SCISSOR_0_BR;
typedef union PA_SC_VPORT_SCISSOR_0_TL                 regPA_SC_VPORT_SCISSOR_0_TL;
typedef union PA_SC_VPORT_SCISSOR_10_BR                regPA_SC_VPORT_SCISSOR_10_BR;
typedef union PA_SC_VPORT_SCISSOR_10_TL                regPA_SC_VPORT_SCISSOR_10_TL;
typedef union PA_SC_VPORT_SCISSOR_11_BR                regPA_SC_VPORT_SCISSOR_11_BR;
typedef union PA_SC_VPORT_SCISSOR_11_TL                regPA_SC_VPORT_SCISSOR_11_TL;
typedef union PA_SC_VPORT_SCISSOR_12_BR                regPA_SC_VPORT_SCISSOR_12_BR;
typedef union PA_SC_VPORT_SCISSOR_12_TL                regPA_SC_VPORT_SCISSOR_12_TL;
typedef union PA_SC_VPORT_SCISSOR_13_BR                regPA_SC_VPORT_SCISSOR_13_BR;
typedef union PA_SC_VPORT_SCISSOR_13_TL                regPA_SC_VPORT_SCISSOR_13_TL;
typedef union PA_SC_VPORT_SCISSOR_14_BR                regPA_SC_VPORT_SCISSOR_14_BR;
typedef union PA_SC_VPORT_SCISSOR_14_TL                regPA_SC_VPORT_SCISSOR_14_TL;
typedef union PA_SC_VPORT_SCISSOR_15_BR                regPA_SC_VPORT_SCISSOR_15_BR;
typedef union PA_SC_VPORT_SCISSOR_15_TL                regPA_SC_VPORT_SCISSOR_15_TL;
typedef union PA_SC_VPORT_SCISSOR_1_BR                 regPA_SC_VPORT_SCISSOR_1_BR;
typedef union PA_SC_VPORT_SCISSOR_1_TL                 regPA_SC_VPORT_SCISSOR_1_TL;
typedef union PA_SC_VPORT_SCISSOR_2_BR                 regPA_SC_VPORT_SCISSOR_2_BR;
typedef union PA_SC_VPORT_SCISSOR_2_TL                 regPA_SC_VPORT_SCISSOR_2_TL;
typedef union PA_SC_VPORT_SCISSOR_3_BR                 regPA_SC_VPORT_SCISSOR_3_BR;
typedef union PA_SC_VPORT_SCISSOR_3_TL                 regPA_SC_VPORT_SCISSOR_3_TL;
typedef union PA_SC_VPORT_SCISSOR_4_BR                 regPA_SC_VPORT_SCISSOR_4_BR;
typedef union PA_SC_VPORT_SCISSOR_4_TL                 regPA_SC_VPORT_SCISSOR_4_TL;
typedef union PA_SC_VPORT_SCISSOR_5_BR                 regPA_SC_VPORT_SCISSOR_5_BR;
typedef union PA_SC_VPORT_SCISSOR_5_TL                 regPA_SC_VPORT_SCISSOR_5_TL;
typedef union PA_SC_VPORT_SCISSOR_6_BR                 regPA_SC_VPORT_SCISSOR_6_BR;
typedef union PA_SC_VPORT_SCISSOR_6_TL                 regPA_SC_VPORT_SCISSOR_6_TL;
typedef union PA_SC_VPORT_SCISSOR_7_BR                 regPA_SC_VPORT_SCISSOR_7_BR;
typedef union PA_SC_VPORT_SCISSOR_7_TL                 regPA_SC_VPORT_SCISSOR_7_TL;
typedef union PA_SC_VPORT_SCISSOR_8_BR                 regPA_SC_VPORT_SCISSOR_8_BR;
typedef union PA_SC_VPORT_SCISSOR_8_TL                 regPA_SC_VPORT_SCISSOR_8_TL;
typedef union PA_SC_VPORT_SCISSOR_9_BR                 regPA_SC_VPORT_SCISSOR_9_BR;
typedef union PA_SC_VPORT_SCISSOR_9_TL                 regPA_SC_VPORT_SCISSOR_9_TL;
typedef union PA_SC_VPORT_ZMAX_0                       regPA_SC_VPORT_ZMAX_0;
typedef union PA_SC_VPORT_ZMAX_1                       regPA_SC_VPORT_ZMAX_1;
typedef union PA_SC_VPORT_ZMAX_10                      regPA_SC_VPORT_ZMAX_10;
typedef union PA_SC_VPORT_ZMAX_11                      regPA_SC_VPORT_ZMAX_11;
typedef union PA_SC_VPORT_ZMAX_12                      regPA_SC_VPORT_ZMAX_12;
typedef union PA_SC_VPORT_ZMAX_13                      regPA_SC_VPORT_ZMAX_13;
typedef union PA_SC_VPORT_ZMAX_14                      regPA_SC_VPORT_ZMAX_14;
typedef union PA_SC_VPORT_ZMAX_15                      regPA_SC_VPORT_ZMAX_15;
typedef union PA_SC_VPORT_ZMAX_2                       regPA_SC_VPORT_ZMAX_2;
typedef union PA_SC_VPORT_ZMAX_3                       regPA_SC_VPORT_ZMAX_3;
typedef union PA_SC_VPORT_ZMAX_4                       regPA_SC_VPORT_ZMAX_4;
typedef union PA_SC_VPORT_ZMAX_5                       regPA_SC_VPORT_ZMAX_5;
typedef union PA_SC_VPORT_ZMAX_6                       regPA_SC_VPORT_ZMAX_6;
typedef union PA_SC_VPORT_ZMAX_7                       regPA_SC_VPORT_ZMAX_7;
typedef union PA_SC_VPORT_ZMAX_8                       regPA_SC_VPORT_ZMAX_8;
typedef union PA_SC_VPORT_ZMAX_9                       regPA_SC_VPORT_ZMAX_9;
typedef union PA_SC_VPORT_ZMIN_0                       regPA_SC_VPORT_ZMIN_0;
typedef union PA_SC_VPORT_ZMIN_1                       regPA_SC_VPORT_ZMIN_1;
typedef union PA_SC_VPORT_ZMIN_10                      regPA_SC_VPORT_ZMIN_10;
typedef union PA_SC_VPORT_ZMIN_11                      regPA_SC_VPORT_ZMIN_11;
typedef union PA_SC_VPORT_ZMIN_12                      regPA_SC_VPORT_ZMIN_12;
typedef union PA_SC_VPORT_ZMIN_13                      regPA_SC_VPORT_ZMIN_13;
typedef union PA_SC_VPORT_ZMIN_14                      regPA_SC_VPORT_ZMIN_14;
typedef union PA_SC_VPORT_ZMIN_15                      regPA_SC_VPORT_ZMIN_15;
typedef union PA_SC_VPORT_ZMIN_2                       regPA_SC_VPORT_ZMIN_2;
typedef union PA_SC_VPORT_ZMIN_3                       regPA_SC_VPORT_ZMIN_3;
typedef union PA_SC_VPORT_ZMIN_4                       regPA_SC_VPORT_ZMIN_4;
typedef union PA_SC_VPORT_ZMIN_5                       regPA_SC_VPORT_ZMIN_5;
typedef union PA_SC_VPORT_ZMIN_6                       regPA_SC_VPORT_ZMIN_6;
typedef union PA_SC_VPORT_ZMIN_7                       regPA_SC_VPORT_ZMIN_7;
typedef union PA_SC_VPORT_ZMIN_8                       regPA_SC_VPORT_ZMIN_8;
typedef union PA_SC_VPORT_ZMIN_9                       regPA_SC_VPORT_ZMIN_9;
typedef union PA_SC_WINDOW_OFFSET                      regPA_SC_WINDOW_OFFSET;
typedef union PA_SC_WINDOW_SCISSOR_BR                  regPA_SC_WINDOW_SCISSOR_BR;
typedef union PA_SC_WINDOW_SCISSOR_TL                  regPA_SC_WINDOW_SCISSOR_TL;
typedef union PA_SIDEBAND_REQUEST_DELAYS               regPA_SIDEBAND_REQUEST_DELAYS;
typedef union PA_SU_CNTL_STATUS                        regPA_SU_CNTL_STATUS;
typedef union PA_SU_DEBUG_DATA                         regPA_SU_DEBUG_DATA;
typedef union PA_SU_HARDWARE_SCREEN_OFFSET             regPA_SU_HARDWARE_SCREEN_OFFSET;
typedef union PA_SU_LINE_CNTL                          regPA_SU_LINE_CNTL;
typedef union PA_SU_LINE_STIPPLE_CNTL                  regPA_SU_LINE_STIPPLE_CNTL;
typedef union PA_SU_LINE_STIPPLE_SCALE                 regPA_SU_LINE_STIPPLE_SCALE;
typedef union PA_SU_LINE_STIPPLE_VALUE                 regPA_SU_LINE_STIPPLE_VALUE;
typedef union PA_SU_OVER_RASTERIZATION_CNTL            regPA_SU_OVER_RASTERIZATION_CNTL;
typedef union PA_SU_PERFCOUNTER0_HI                    regPA_SU_PERFCOUNTER0_HI;
typedef union PA_SU_PERFCOUNTER0_LO                    regPA_SU_PERFCOUNTER0_LO;
typedef union PA_SU_PERFCOUNTER0_SELECT                regPA_SU_PERFCOUNTER0_SELECT;
typedef union PA_SU_PERFCOUNTER0_SELECT1               regPA_SU_PERFCOUNTER0_SELECT1;
typedef union PA_SU_PERFCOUNTER1_HI                    regPA_SU_PERFCOUNTER1_HI;
typedef union PA_SU_PERFCOUNTER1_LO                    regPA_SU_PERFCOUNTER1_LO;
typedef union PA_SU_PERFCOUNTER1_SELECT                regPA_SU_PERFCOUNTER1_SELECT;
typedef union PA_SU_PERFCOUNTER1_SELECT1               regPA_SU_PERFCOUNTER1_SELECT1;
typedef union PA_SU_PERFCOUNTER2_HI                    regPA_SU_PERFCOUNTER2_HI;
typedef union PA_SU_PERFCOUNTER2_LO                    regPA_SU_PERFCOUNTER2_LO;
typedef union PA_SU_PERFCOUNTER2_SELECT                regPA_SU_PERFCOUNTER2_SELECT;
typedef union PA_SU_PERFCOUNTER3_HI                    regPA_SU_PERFCOUNTER3_HI;
typedef union PA_SU_PERFCOUNTER3_LO                    regPA_SU_PERFCOUNTER3_LO;
typedef union PA_SU_PERFCOUNTER3_SELECT                regPA_SU_PERFCOUNTER3_SELECT;
typedef union PA_SU_POINT_MINMAX                       regPA_SU_POINT_MINMAX;
typedef union PA_SU_POINT_SIZE                         regPA_SU_POINT_SIZE;
typedef union PA_SU_POLY_OFFSET_BACK_OFFSET            regPA_SU_POLY_OFFSET_BACK_OFFSET;
typedef union PA_SU_POLY_OFFSET_BACK_SCALE             regPA_SU_POLY_OFFSET_BACK_SCALE;
typedef union PA_SU_POLY_OFFSET_CLAMP                  regPA_SU_POLY_OFFSET_CLAMP;
typedef union PA_SU_POLY_OFFSET_DB_FMT_CNTL            regPA_SU_POLY_OFFSET_DB_FMT_CNTL;
typedef union PA_SU_POLY_OFFSET_FRONT_OFFSET           regPA_SU_POLY_OFFSET_FRONT_OFFSET;
typedef union PA_SU_POLY_OFFSET_FRONT_SCALE            regPA_SU_POLY_OFFSET_FRONT_SCALE;
typedef union PA_SU_PRIM_FILTER_CNTL                   regPA_SU_PRIM_FILTER_CNTL;
typedef union PA_SU_SC_MODE_CNTL                       regPA_SU_SC_MODE_CNTL;
typedef union PA_SU_SMALL_PRIM_FILTER_CNTL             regPA_SU_SMALL_PRIM_FILTER_CNTL;
typedef union PA_SU_VTX_CNTL                           regPA_SU_VTX_CNTL;
typedef union PA_UTCL1_CNTL1__GFX09                    regPA_UTCL1_CNTL1__GFX09;
typedef union PA_UTCL1_CNTL2__GFX09                    regPA_UTCL1_CNTL2__GFX09;
typedef union RAS_BCI_SIGNATURE0                       regRAS_BCI_SIGNATURE0;
typedef union RAS_BCI_SIGNATURE1                       regRAS_BCI_SIGNATURE1;
typedef union RAS_CB_SIGNATURE0                        regRAS_CB_SIGNATURE0;
typedef union RAS_DB_SIGNATURE0                        regRAS_DB_SIGNATURE0;
typedef union RAS_IA_SIGNATURE0                        regRAS_IA_SIGNATURE0;
typedef union RAS_IA_SIGNATURE1                        regRAS_IA_SIGNATURE1;
typedef union RAS_PA_SIGNATURE0                        regRAS_PA_SIGNATURE0;
typedef union RAS_SC_SIGNATURE0                        regRAS_SC_SIGNATURE0;
typedef union RAS_SC_SIGNATURE1                        regRAS_SC_SIGNATURE1;
typedef union RAS_SC_SIGNATURE2                        regRAS_SC_SIGNATURE2;
typedef union RAS_SC_SIGNATURE3                        regRAS_SC_SIGNATURE3;
typedef union RAS_SC_SIGNATURE4                        regRAS_SC_SIGNATURE4;
typedef union RAS_SC_SIGNATURE5                        regRAS_SC_SIGNATURE5;
typedef union RAS_SC_SIGNATURE6                        regRAS_SC_SIGNATURE6;
typedef union RAS_SC_SIGNATURE7                        regRAS_SC_SIGNATURE7;
typedef union RAS_SIGNATURE_CONTROL                    regRAS_SIGNATURE_CONTROL;
typedef union RAS_SIGNATURE_MASK                       regRAS_SIGNATURE_MASK;
typedef union RAS_SPI_SIGNATURE0                       regRAS_SPI_SIGNATURE0;
typedef union RAS_SPI_SIGNATURE1                       regRAS_SPI_SIGNATURE1;
typedef union RAS_SQ_SIGNATURE0                        regRAS_SQ_SIGNATURE0;
typedef union RAS_SX_SIGNATURE0                        regRAS_SX_SIGNATURE0;
typedef union RAS_SX_SIGNATURE1                        regRAS_SX_SIGNATURE1;
typedef union RAS_SX_SIGNATURE2                        regRAS_SX_SIGNATURE2;
typedef union RAS_SX_SIGNATURE3                        regRAS_SX_SIGNATURE3;
typedef union RAS_TA_SIGNATURE0                        regRAS_TA_SIGNATURE0;
typedef union RAS_TA_SIGNATURE1                        regRAS_TA_SIGNATURE1;
typedef union RAS_TD_SIGNATURE0                        regRAS_TD_SIGNATURE0;
typedef union RAS_VGT_SIGNATURE0                       regRAS_VGT_SIGNATURE0;
typedef union RLC_AUTO_PG_CTRL                         regRLC_AUTO_PG_CTRL;
typedef union RLC_CAPTURE_GPU_CLOCK_COUNT              regRLC_CAPTURE_GPU_CLOCK_COUNT;
typedef union RLC_CGCG_CGLS_CTRL                       regRLC_CGCG_CGLS_CTRL;
typedef union RLC_CGCG_CGLS_CTRL_3D                    regRLC_CGCG_CGLS_CTRL_3D;
typedef union RLC_CGCG_RAMP_CTRL                       regRLC_CGCG_RAMP_CTRL;
typedef union RLC_CGCG_RAMP_CTRL_3D                    regRLC_CGCG_RAMP_CTRL_3D;
typedef union RLC_CGTT_MGCG_OVERRIDE                   regRLC_CGTT_MGCG_OVERRIDE;
typedef union RLC_CLK_CNTL__GFX09                      regRLC_CLK_CNTL__GFX09;
typedef union RLC_CNTL                                 regRLC_CNTL;
typedef union RLC_CP_EOF_INT                           regRLC_CP_EOF_INT;
typedef union RLC_CP_EOF_INT_CNT                       regRLC_CP_EOF_INT_CNT;
typedef union RLC_CP_SCHEDULERS                        regRLC_CP_SCHEDULERS;
typedef union RLC_CSIB_ADDR_HI                         regRLC_CSIB_ADDR_HI;
typedef union RLC_CSIB_ADDR_LO                         regRLC_CSIB_ADDR_LO;
typedef union RLC_CSIB_LENGTH                          regRLC_CSIB_LENGTH;
typedef union RLC_CU_STATUS__GFX09                     regRLC_CU_STATUS__GFX09;
typedef union RLC_DEBUG                                regRLC_DEBUG;
typedef union RLC_DEBUG_SELECT                         regRLC_DEBUG_SELECT;
typedef union RLC_DSM_TRIG__GFX09                      regRLC_DSM_TRIG__GFX09;
typedef union RLC_DS_CNTL__GFX09                       regRLC_DS_CNTL__GFX09;
typedef union RLC_DYN_PG_REQUEST__GFX09                regRLC_DYN_PG_REQUEST__GFX09;
typedef union RLC_DYN_PG_STATUS__GFX09                 regRLC_DYN_PG_STATUS__GFX09;
typedef union RLC_FIREWALL_VIOLATION                   regRLC_FIREWALL_VIOLATION;
typedef union RLC_GFX_RM_CNTL                          regRLC_GFX_RM_CNTL;
typedef union RLC_GPM_CP_DMA_COMPLETE_T0               regRLC_GPM_CP_DMA_COMPLETE_T0;
typedef union RLC_GPM_CP_DMA_COMPLETE_T1               regRLC_GPM_CP_DMA_COMPLETE_T1;
typedef union RLC_GPM_DEBUG                            regRLC_GPM_DEBUG;
typedef union RLC_GPM_DEBUG_INST_A                     regRLC_GPM_DEBUG_INST_A;
typedef union RLC_GPM_DEBUG_INST_ADDR                  regRLC_GPM_DEBUG_INST_ADDR;
typedef union RLC_GPM_DEBUG_INST_B                     regRLC_GPM_DEBUG_INST_B;
typedef union RLC_GPM_DEBUG_SELECT                     regRLC_GPM_DEBUG_SELECT;
typedef union RLC_GPM_GENERAL_0                        regRLC_GPM_GENERAL_0;
typedef union RLC_GPM_GENERAL_1                        regRLC_GPM_GENERAL_1;
typedef union RLC_GPM_GENERAL_10                       regRLC_GPM_GENERAL_10;
typedef union RLC_GPM_GENERAL_11                       regRLC_GPM_GENERAL_11;
typedef union RLC_GPM_GENERAL_12                       regRLC_GPM_GENERAL_12;
typedef union RLC_GPM_GENERAL_2                        regRLC_GPM_GENERAL_2;
typedef union RLC_GPM_GENERAL_3                        regRLC_GPM_GENERAL_3;
typedef union RLC_GPM_GENERAL_4                        regRLC_GPM_GENERAL_4;
typedef union RLC_GPM_GENERAL_5                        regRLC_GPM_GENERAL_5;
typedef union RLC_GPM_GENERAL_6                        regRLC_GPM_GENERAL_6;
typedef union RLC_GPM_GENERAL_7                        regRLC_GPM_GENERAL_7;
typedef union RLC_GPM_GENERAL_8                        regRLC_GPM_GENERAL_8;
typedef union RLC_GPM_GENERAL_9                        regRLC_GPM_GENERAL_9;
typedef union RLC_GPM_INT_DISABLE_TH0                  regRLC_GPM_INT_DISABLE_TH0;
typedef union RLC_GPM_INT_DISABLE_TH1__GFX09           regRLC_GPM_INT_DISABLE_TH1__GFX09;
typedef union RLC_GPM_INT_FORCE_TH0                    regRLC_GPM_INT_FORCE_TH0;
typedef union RLC_GPM_INT_FORCE_TH1__GFX09             regRLC_GPM_INT_FORCE_TH1__GFX09;
typedef union RLC_GPM_LOG_CONT                         regRLC_GPM_LOG_CONT;
typedef union RLC_GPM_LOG_SIZE                         regRLC_GPM_LOG_SIZE;
typedef union RLC_GPM_PERF_COUNT_0__GFX09              regRLC_GPM_PERF_COUNT_0__GFX09;
typedef union RLC_GPM_PERF_COUNT_1__GFX09              regRLC_GPM_PERF_COUNT_1__GFX09;
typedef union RLC_GPM_SCRATCH_ADDR                     regRLC_GPM_SCRATCH_ADDR;
typedef union RLC_GPM_SCRATCH_DATA                     regRLC_GPM_SCRATCH_DATA;
typedef union RLC_GPM_STAT__GFX09                      regRLC_GPM_STAT__GFX09;
typedef union RLC_GPM_THREAD_ENABLE                    regRLC_GPM_THREAD_ENABLE;
typedef union RLC_GPM_THREAD_PRIORITY                  regRLC_GPM_THREAD_PRIORITY;
typedef union RLC_GPM_THREAD_RESET                     regRLC_GPM_THREAD_RESET;
typedef union RLC_GPM_TIMER_CTRL                       regRLC_GPM_TIMER_CTRL;
typedef union RLC_GPM_TIMER_INT_0                      regRLC_GPM_TIMER_INT_0;
typedef union RLC_GPM_TIMER_INT_1                      regRLC_GPM_TIMER_INT_1;
typedef union RLC_GPM_TIMER_INT_2                      regRLC_GPM_TIMER_INT_2;
typedef union RLC_GPM_TIMER_INT_3                      regRLC_GPM_TIMER_INT_3;
typedef union RLC_GPM_TIMER_STAT                       regRLC_GPM_TIMER_STAT;
typedef union RLC_GPM_UCODE_ADDR                       regRLC_GPM_UCODE_ADDR;
typedef union RLC_GPM_UCODE_DATA                       regRLC_GPM_UCODE_DATA;
typedef union RLC_GPM_UTCL1_CNTL_0                     regRLC_GPM_UTCL1_CNTL_0;
typedef union RLC_GPM_UTCL1_CNTL_1                     regRLC_GPM_UTCL1_CNTL_1;
typedef union RLC_GPM_UTCL1_CNTL_2                     regRLC_GPM_UTCL1_CNTL_2;
typedef union RLC_GPM_UTCL1_TH0_ERROR_1                regRLC_GPM_UTCL1_TH0_ERROR_1;
typedef union RLC_GPM_UTCL1_TH0_ERROR_2                regRLC_GPM_UTCL1_TH0_ERROR_2;
typedef union RLC_GPM_UTCL1_TH1_ERROR_1                regRLC_GPM_UTCL1_TH1_ERROR_1;
typedef union RLC_GPM_UTCL1_TH1_ERROR_2                regRLC_GPM_UTCL1_TH1_ERROR_2;
typedef union RLC_GPM_UTCL1_TH2_ERROR_1                regRLC_GPM_UTCL1_TH2_ERROR_1;
typedef union RLC_GPM_UTCL1_TH2_ERROR_2                regRLC_GPM_UTCL1_TH2_ERROR_2;
typedef union RLC_GPR_REG1                             regRLC_GPR_REG1;
typedef union RLC_GPR_REG2                             regRLC_GPR_REG2;
typedef union RLC_GPU_CLOCK_32                         regRLC_GPU_CLOCK_32;
typedef union RLC_GPU_CLOCK_32_RES_SEL                 regRLC_GPU_CLOCK_32_RES_SEL;
typedef union RLC_GPU_CLOCK_COUNT_LSB                  regRLC_GPU_CLOCK_COUNT_LSB;
typedef union RLC_GPU_CLOCK_COUNT_MSB                  regRLC_GPU_CLOCK_COUNT_MSB;
typedef union RLC_GPU_IOV_ACTIVE_FCN_ID                regRLC_GPU_IOV_ACTIVE_FCN_ID;
typedef union RLC_GPU_IOV_CFG_REG1                     regRLC_GPU_IOV_CFG_REG1;
typedef union RLC_GPU_IOV_CFG_REG2                     regRLC_GPU_IOV_CFG_REG2;
typedef union RLC_GPU_IOV_CFG_REG6                     regRLC_GPU_IOV_CFG_REG6;
typedef union RLC_GPU_IOV_CFG_REG8                     regRLC_GPU_IOV_CFG_REG8;
typedef union RLC_GPU_IOV_F32_CNTL                     regRLC_GPU_IOV_F32_CNTL;
typedef union RLC_GPU_IOV_F32_RESET                    regRLC_GPU_IOV_F32_RESET;
typedef union RLC_GPU_IOV_INT_DISABLE                  regRLC_GPU_IOV_INT_DISABLE;
typedef union RLC_GPU_IOV_INT_FORCE                    regRLC_GPU_IOV_INT_FORCE;
typedef union RLC_GPU_IOV_PERF_CNT_CNTL                regRLC_GPU_IOV_PERF_CNT_CNTL;
typedef union RLC_GPU_IOV_PERF_CNT_RD_ADDR             regRLC_GPU_IOV_PERF_CNT_RD_ADDR;
typedef union RLC_GPU_IOV_PERF_CNT_RD_DATA             regRLC_GPU_IOV_PERF_CNT_RD_DATA;
typedef union RLC_GPU_IOV_PERF_CNT_WR_ADDR             regRLC_GPU_IOV_PERF_CNT_WR_ADDR;
typedef union RLC_GPU_IOV_PERF_CNT_WR_DATA             regRLC_GPU_IOV_PERF_CNT_WR_DATA;
typedef union RLC_GPU_IOV_RLC_RESPONSE                 regRLC_GPU_IOV_RLC_RESPONSE;
typedef union RLC_GPU_IOV_SCH_0                        regRLC_GPU_IOV_SCH_0;
typedef union RLC_GPU_IOV_SCH_1                        regRLC_GPU_IOV_SCH_1;
typedef union RLC_GPU_IOV_SCH_2                        regRLC_GPU_IOV_SCH_2;
typedef union RLC_GPU_IOV_SCH_3                        regRLC_GPU_IOV_SCH_3;
typedef union RLC_GPU_IOV_SCH_BLOCK                    regRLC_GPU_IOV_SCH_BLOCK;
typedef union RLC_GPU_IOV_SCRATCH_ADDR                 regRLC_GPU_IOV_SCRATCH_ADDR;
typedef union RLC_GPU_IOV_SCRATCH_DATA                 regRLC_GPU_IOV_SCRATCH_DATA;
typedef union RLC_GPU_IOV_SDMA0_BUSY_STATUS            regRLC_GPU_IOV_SDMA0_BUSY_STATUS;
typedef union RLC_GPU_IOV_SDMA0_STATUS                 regRLC_GPU_IOV_SDMA0_STATUS;
typedef union RLC_GPU_IOV_SDMA1_BUSY_STATUS            regRLC_GPU_IOV_SDMA1_BUSY_STATUS;
typedef union RLC_GPU_IOV_SDMA1_STATUS                 regRLC_GPU_IOV_SDMA1_STATUS;
typedef union RLC_GPU_IOV_SMU_RESPONSE                 regRLC_GPU_IOV_SMU_RESPONSE;
typedef union RLC_GPU_IOV_UCODE_ADDR                   regRLC_GPU_IOV_UCODE_ADDR;
typedef union RLC_GPU_IOV_UCODE_DATA                   regRLC_GPU_IOV_UCODE_DATA;
typedef union RLC_GPU_IOV_VF_DOORBELL_STATUS           regRLC_GPU_IOV_VF_DOORBELL_STATUS;
typedef union RLC_GPU_IOV_VF_DOORBELL_STATUS_CLR       regRLC_GPU_IOV_VF_DOORBELL_STATUS_CLR;
typedef union RLC_GPU_IOV_VF_DOORBELL_STATUS_SET       regRLC_GPU_IOV_VF_DOORBELL_STATUS_SET;
typedef union RLC_GPU_IOV_VF_ENABLE                    regRLC_GPU_IOV_VF_ENABLE;
typedef union RLC_GPU_IOV_VF_MASK                      regRLC_GPU_IOV_VF_MASK;
typedef union RLC_GPU_IOV_VIRT_RESET_REQ               regRLC_GPU_IOV_VIRT_RESET_REQ;
typedef union RLC_GPU_IOV_VM_BUSY_STATUS               regRLC_GPU_IOV_VM_BUSY_STATUS;
typedef union RLC_HYP_SEMAPHORE_2                      regRLC_HYP_SEMAPHORE_2;
typedef union RLC_HYP_SEMAPHORE_3                      regRLC_HYP_SEMAPHORE_3;
typedef union RLC_INT_STAT                             regRLC_INT_STAT;
typedef union RLC_JUMP_TABLE_RESTORE                   regRLC_JUMP_TABLE_RESTORE;
typedef union RLC_LBPW_CU_STAT__GFX09                  regRLC_LBPW_CU_STAT__GFX09;
typedef union RLC_LB_ALWAYS_ACTIVE_CU_MASK__GFX09      regRLC_LB_ALWAYS_ACTIVE_CU_MASK__GFX09;
typedef union RLC_LB_CNTL                              regRLC_LB_CNTL;
typedef union RLC_LB_CNTR_INIT__GFX09                  regRLC_LB_CNTR_INIT__GFX09;
typedef union RLC_LB_CNTR_MAX__GFX09                   regRLC_LB_CNTR_MAX__GFX09;
typedef union RLC_LB_INIT_CU_MASK__GFX09               regRLC_LB_INIT_CU_MASK__GFX09;
typedef union RLC_LB_PARAMS                            regRLC_LB_PARAMS;
typedef union RLC_LB_THR_CONFIG_1__GFX09               regRLC_LB_THR_CONFIG_1__GFX09;
typedef union RLC_LB_THR_CONFIG_2__GFX09               regRLC_LB_THR_CONFIG_2__GFX09;
typedef union RLC_LB_THR_CONFIG_3__GFX09               regRLC_LB_THR_CONFIG_3__GFX09;
typedef union RLC_LB_THR_CONFIG_4__GFX09               regRLC_LB_THR_CONFIG_4__GFX09;
typedef union RLC_LOAD_BALANCE_CNTR__GFX09             regRLC_LOAD_BALANCE_CNTR__GFX09;
typedef union RLC_MAX_PG_CU__GFX09                     regRLC_MAX_PG_CU__GFX09;
typedef union RLC_MEM_SLP_CNTL                         regRLC_MEM_SLP_CNTL;
typedef union RLC_MGCG_CTRL                            regRLC_MGCG_CTRL;
typedef union RLC_PERFCOUNTER0_HI                      regRLC_PERFCOUNTER0_HI;
typedef union RLC_PERFCOUNTER0_LO                      regRLC_PERFCOUNTER0_LO;
typedef union RLC_PERFCOUNTER0_SELECT                  regRLC_PERFCOUNTER0_SELECT;
typedef union RLC_PERFCOUNTER1_HI                      regRLC_PERFCOUNTER1_HI;
typedef union RLC_PERFCOUNTER1_LO                      regRLC_PERFCOUNTER1_LO;
typedef union RLC_PERFCOUNTER1_SELECT                  regRLC_PERFCOUNTER1_SELECT;
typedef union RLC_PERFMON_CLK_CNTL                     regRLC_PERFMON_CLK_CNTL;
typedef union RLC_PERFMON_CNTL                         regRLC_PERFMON_CNTL;
typedef union RLC_PG_ALWAYS_ON_CU_MASK__GFX09          regRLC_PG_ALWAYS_ON_CU_MASK__GFX09;
typedef union RLC_PG_CNTL__GFX09                       regRLC_PG_CNTL__GFX09;
typedef union RLC_PG_DELAY                             regRLC_PG_DELAY;
typedef union RLC_PG_DELAY_2__GFX09                    regRLC_PG_DELAY_2__GFX09;
typedef union RLC_PG_DELAY_3                           regRLC_PG_DELAY_3;
typedef union RLC_PREWALKER_UTCL1_ADDR_LSB             regRLC_PREWALKER_UTCL1_ADDR_LSB;
typedef union RLC_PREWALKER_UTCL1_ADDR_MSB             regRLC_PREWALKER_UTCL1_ADDR_MSB;
typedef union RLC_PREWALKER_UTCL1_CNTL                 regRLC_PREWALKER_UTCL1_CNTL;
typedef union RLC_PREWALKER_UTCL1_SIZE_LSB             regRLC_PREWALKER_UTCL1_SIZE_LSB;
typedef union RLC_PREWALKER_UTCL1_SIZE_MSB             regRLC_PREWALKER_UTCL1_SIZE_MSB;
typedef union RLC_PREWALKER_UTCL1_TRIG                 regRLC_PREWALKER_UTCL1_TRIG;
typedef union RLC_R2I_CNTL_0                           regRLC_R2I_CNTL_0;
typedef union RLC_R2I_CNTL_1                           regRLC_R2I_CNTL_1;
typedef union RLC_R2I_CNTL_2                           regRLC_R2I_CNTL_2;
typedef union RLC_R2I_CNTL_3                           regRLC_R2I_CNTL_3;
typedef union RLC_REFCLOCK_TIMESTAMP_LSB               regRLC_REFCLOCK_TIMESTAMP_LSB;
typedef union RLC_REFCLOCK_TIMESTAMP_MSB               regRLC_REFCLOCK_TIMESTAMP_MSB;
typedef union RLC_RLCV_COMMAND                         regRLC_RLCV_COMMAND;
typedef union RLC_RLCV_SAFE_MODE                       regRLC_RLCV_SAFE_MODE;
typedef union RLC_RLCV_SPARE_INT                       regRLC_RLCV_SPARE_INT;
typedef union RLC_RLCV_TIMER_CTRL                      regRLC_RLCV_TIMER_CTRL;
typedef union RLC_RLCV_TIMER_INT_0                     regRLC_RLCV_TIMER_INT_0;
typedef union RLC_RLCV_TIMER_STAT                      regRLC_RLCV_TIMER_STAT;
typedef union RLC_SAFE_MODE                            regRLC_SAFE_MODE;
typedef union RLC_SEMAPHORE_0                          regRLC_SEMAPHORE_0;
typedef union RLC_SEMAPHORE_1                          regRLC_SEMAPHORE_1;
typedef union RLC_SERDES_CU_MASTER_BUSY__GFX09         regRLC_SERDES_CU_MASTER_BUSY__GFX09;
typedef union RLC_SERDES_NONCU_MASTER_BUSY__GFX09      regRLC_SERDES_NONCU_MASTER_BUSY__GFX09;
typedef union RLC_SERDES_NONCU_MASTER_BUSY_1__GFX09    regRLC_SERDES_NONCU_MASTER_BUSY_1__GFX09;
typedef union RLC_SERDES_RD_DATA_0                     regRLC_SERDES_RD_DATA_0;
typedef union RLC_SERDES_RD_DATA_1                     regRLC_SERDES_RD_DATA_1;
typedef union RLC_SERDES_RD_DATA_2                     regRLC_SERDES_RD_DATA_2;
typedef union RLC_SERDES_RD_MASTER_INDEX__GFX09        regRLC_SERDES_RD_MASTER_INDEX__GFX09;
typedef union RLC_SERDES_WR_CTRL__GFX09                regRLC_SERDES_WR_CTRL__GFX09;
typedef union RLC_SERDES_WR_CU_MASTER_MASK__GFX09      regRLC_SERDES_WR_CU_MASTER_MASK__GFX09;
typedef union RLC_SERDES_WR_DATA__GFX09                regRLC_SERDES_WR_DATA__GFX09;
typedef union RLC_SERDES_WR_NONCU_MASTER_MASK__GFX09   regRLC_SERDES_WR_NONCU_MASTER_MASK__GFX09;
typedef union RLC_SERDES_WR_NONCU_MASTER_MASK_1__GFX09 regRLC_SERDES_WR_NONCU_MASTER_MASK_1__GFX09;
typedef union RLC_SMU_ARGUMENT_1                       regRLC_SMU_ARGUMENT_1;
typedef union RLC_SMU_ARGUMENT_2                       regRLC_SMU_ARGUMENT_2;
typedef union RLC_SMU_COMMAND                          regRLC_SMU_COMMAND;
typedef union RLC_SMU_GRBM_REG_SAVE_CTRL               regRLC_SMU_GRBM_REG_SAVE_CTRL;
typedef union RLC_SMU_MESSAGE                          regRLC_SMU_MESSAGE;
typedef union RLC_SMU_SAFE_MODE                        regRLC_SMU_SAFE_MODE;
typedef union RLC_SPARE_INT                            regRLC_SPARE_INT;
typedef union RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY__GFX09 regRLC_SPM_CBR0_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY__GFX09 regRLC_SPM_CBR1_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_CB_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_CB_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_CPC_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_CPC_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_CPF_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_CPF_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_CPG_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_CPG_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY__GFX09 regRLC_SPM_DBR0_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY__GFX09 regRLC_SPM_DBR1_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_DB_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_DB_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_DEBUG                            regRLC_SPM_DEBUG;
typedef union RLC_SPM_DEBUG_SELECT                     regRLC_SPM_DEBUG_SELECT;
typedef union RLC_SPM_GDS_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_GDS_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_GLOBAL_MUXSEL_ADDR               regRLC_SPM_GLOBAL_MUXSEL_ADDR;
typedef union RLC_SPM_GLOBAL_MUXSEL_DATA               regRLC_SPM_GLOBAL_MUXSEL_DATA;
typedef union RLC_SPM_IA_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_IA_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_INT_CNTL                         regRLC_SPM_INT_CNTL;
typedef union RLC_SPM_INT_STATUS                       regRLC_SPM_INT_STATUS;
typedef union RLC_SPM_MC_CNTL__GFX09                   regRLC_SPM_MC_CNTL__GFX09;
typedef union RLC_SPM_PA_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_PA_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_PERFMON_CNTL                     regRLC_SPM_PERFMON_CNTL;
typedef union RLC_SPM_PERFMON_RING_BASE_HI             regRLC_SPM_PERFMON_RING_BASE_HI;
typedef union RLC_SPM_PERFMON_RING_BASE_LO             regRLC_SPM_PERFMON_RING_BASE_LO;
typedef union RLC_SPM_PERFMON_RING_SIZE                regRLC_SPM_PERFMON_RING_SIZE;
typedef union RLC_SPM_PERFMON_SEGMENT_SIZE             regRLC_SPM_PERFMON_SEGMENT_SIZE;
typedef union RLC_SPM_RING_RDPTR                       regRLC_SPM_RING_RDPTR;
typedef union RLC_SPM_RMI_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_RMI_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_SC_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_SC_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_SEGMENT_THRESHOLD                regRLC_SPM_SEGMENT_THRESHOLD;
typedef union RLC_SPM_SE_MUXSEL_ADDR                   regRLC_SPM_SE_MUXSEL_ADDR;
typedef union RLC_SPM_SE_MUXSEL_DATA                   regRLC_SPM_SE_MUXSEL_DATA;
typedef union RLC_SPM_SPI_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_SPI_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_SQG_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_SQG_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_SX_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_SX_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_TA_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_TA_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_TCA_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_TCA_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_TCC_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_TCC_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_TCP_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_TCP_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_TD_PERFMON_SAMPLE_DELAY__GFX09   regRLC_SPM_TD_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SPM_UTCL1_CNTL                       regRLC_SPM_UTCL1_CNTL;
typedef union RLC_SPM_UTCL1_ERROR_1                    regRLC_SPM_UTCL1_ERROR_1;
typedef union RLC_SPM_UTCL1_ERROR_2                    regRLC_SPM_UTCL1_ERROR_2;
typedef union RLC_SPM_VGT_PERFMON_SAMPLE_DELAY__GFX09  regRLC_SPM_VGT_PERFMON_SAMPLE_DELAY__GFX09;
typedef union RLC_SRM_ARAM_ADDR                        regRLC_SRM_ARAM_ADDR;
typedef union RLC_SRM_ARAM_DATA                        regRLC_SRM_ARAM_DATA;
typedef union RLC_SRM_CNTL                             regRLC_SRM_CNTL;
typedef union RLC_SRM_DEBUG                            regRLC_SRM_DEBUG;
typedef union RLC_SRM_DEBUG_SELECT                     regRLC_SRM_DEBUG_SELECT;
typedef union RLC_SRM_DRAM_ADDR                        regRLC_SRM_DRAM_ADDR;
typedef union RLC_SRM_DRAM_DATA                        regRLC_SRM_DRAM_DATA;
typedef union RLC_SRM_GPM_ABORT                        regRLC_SRM_GPM_ABORT;
typedef union RLC_SRM_GPM_COMMAND                      regRLC_SRM_GPM_COMMAND;
typedef union RLC_SRM_GPM_COMMAND_STATUS               regRLC_SRM_GPM_COMMAND_STATUS;
typedef union RLC_SRM_INDEX_CNTL_ADDR_0                regRLC_SRM_INDEX_CNTL_ADDR_0;
typedef union RLC_SRM_INDEX_CNTL_ADDR_1                regRLC_SRM_INDEX_CNTL_ADDR_1;
typedef union RLC_SRM_INDEX_CNTL_ADDR_2                regRLC_SRM_INDEX_CNTL_ADDR_2;
typedef union RLC_SRM_INDEX_CNTL_ADDR_3                regRLC_SRM_INDEX_CNTL_ADDR_3;
typedef union RLC_SRM_INDEX_CNTL_ADDR_4                regRLC_SRM_INDEX_CNTL_ADDR_4;
typedef union RLC_SRM_INDEX_CNTL_ADDR_5                regRLC_SRM_INDEX_CNTL_ADDR_5;
typedef union RLC_SRM_INDEX_CNTL_ADDR_6                regRLC_SRM_INDEX_CNTL_ADDR_6;
typedef union RLC_SRM_INDEX_CNTL_ADDR_7                regRLC_SRM_INDEX_CNTL_ADDR_7;
typedef union RLC_SRM_INDEX_CNTL_DATA_0                regRLC_SRM_INDEX_CNTL_DATA_0;
typedef union RLC_SRM_INDEX_CNTL_DATA_1                regRLC_SRM_INDEX_CNTL_DATA_1;
typedef union RLC_SRM_INDEX_CNTL_DATA_2                regRLC_SRM_INDEX_CNTL_DATA_2;
typedef union RLC_SRM_INDEX_CNTL_DATA_3                regRLC_SRM_INDEX_CNTL_DATA_3;
typedef union RLC_SRM_INDEX_CNTL_DATA_4                regRLC_SRM_INDEX_CNTL_DATA_4;
typedef union RLC_SRM_INDEX_CNTL_DATA_5                regRLC_SRM_INDEX_CNTL_DATA_5;
typedef union RLC_SRM_INDEX_CNTL_DATA_6                regRLC_SRM_INDEX_CNTL_DATA_6;
typedef union RLC_SRM_INDEX_CNTL_DATA_7                regRLC_SRM_INDEX_CNTL_DATA_7;
typedef union RLC_SRM_RLCV_COMMAND                     regRLC_SRM_RLCV_COMMAND;
typedef union RLC_SRM_RLCV_COMMAND_STATUS              regRLC_SRM_RLCV_COMMAND_STATUS;
typedef union RLC_SRM_STAT                             regRLC_SRM_STAT;
typedef union RLC_STAT__GFX09                          regRLC_STAT__GFX09;
typedef union RLC_STATIC_PG_STATUS__GFX09              regRLC_STATIC_PG_STATUS__GFX09;
typedef union RLC_THREAD1_DELAY__GFX09                 regRLC_THREAD1_DELAY__GFX09;
typedef union RLC_UCODE_CNTL                           regRLC_UCODE_CNTL;
typedef union RLC_UTCL1_STATUS                         regRLC_UTCL1_STATUS;
typedef union RLC_UTCL1_STATUS_2                       regRLC_UTCL1_STATUS_2;
typedef union RLC_UTCL2_CNTL__GFX09                    regRLC_UTCL2_CNTL__GFX09;
typedef union RMI_CGTT_SCLK_CTRL                       regRMI_CGTT_SCLK_CTRL;
typedef union RMI_CLOCK_CNTRL                          regRMI_CLOCK_CNTRL;
typedef union RMI_DEMUX_CNTL                           regRMI_DEMUX_CNTL;
typedef union RMI_GENERAL_CNTL                         regRMI_GENERAL_CNTL;
typedef union RMI_GENERAL_CNTL1__GFX09                 regRMI_GENERAL_CNTL1__GFX09;
typedef union RMI_GENERAL_STATUS                       regRMI_GENERAL_STATUS;
typedef union RMI_PERFCOUNTER0_HI                      regRMI_PERFCOUNTER0_HI;
typedef union RMI_PERFCOUNTER0_LO                      regRMI_PERFCOUNTER0_LO;
typedef union RMI_PERFCOUNTER0_SELECT                  regRMI_PERFCOUNTER0_SELECT;
typedef union RMI_PERFCOUNTER0_SELECT1                 regRMI_PERFCOUNTER0_SELECT1;
typedef union RMI_PERFCOUNTER1_HI                      regRMI_PERFCOUNTER1_HI;
typedef union RMI_PERFCOUNTER1_LO                      regRMI_PERFCOUNTER1_LO;
typedef union RMI_PERFCOUNTER1_SELECT                  regRMI_PERFCOUNTER1_SELECT;
typedef union RMI_PERFCOUNTER2_HI                      regRMI_PERFCOUNTER2_HI;
typedef union RMI_PERFCOUNTER2_LO                      regRMI_PERFCOUNTER2_LO;
typedef union RMI_PERFCOUNTER2_SELECT                  regRMI_PERFCOUNTER2_SELECT;
typedef union RMI_PERFCOUNTER2_SELECT1                 regRMI_PERFCOUNTER2_SELECT1;
typedef union RMI_PERFCOUNTER3_HI                      regRMI_PERFCOUNTER3_HI;
typedef union RMI_PERFCOUNTER3_LO                      regRMI_PERFCOUNTER3_LO;
typedef union RMI_PERFCOUNTER3_SELECT                  regRMI_PERFCOUNTER3_SELECT;
typedef union RMI_PERF_COUNTER_CNTL                    regRMI_PERF_COUNTER_CNTL;
typedef union RMI_PROBE_POP_LOGIC_CNTL                 regRMI_PROBE_POP_LOGIC_CNTL;
typedef union RMI_SCOREBOARD_CNTL                      regRMI_SCOREBOARD_CNTL;
typedef union RMI_SCOREBOARD_STATUS0                   regRMI_SCOREBOARD_STATUS0;
typedef union RMI_SCOREBOARD_STATUS1                   regRMI_SCOREBOARD_STATUS1;
typedef union RMI_SCOREBOARD_STATUS2                   regRMI_SCOREBOARD_STATUS2;
typedef union RMI_SPARE__GFX09                         regRMI_SPARE__GFX09;
typedef union RMI_SPARE_1                              regRMI_SPARE_1;
typedef union RMI_SPARE_2                              regRMI_SPARE_2;
typedef union RMI_SUBBLOCK_STATUS0                     regRMI_SUBBLOCK_STATUS0;
typedef union RMI_SUBBLOCK_STATUS1                     regRMI_SUBBLOCK_STATUS1;
typedef union RMI_SUBBLOCK_STATUS2                     regRMI_SUBBLOCK_STATUS2;
typedef union RMI_SUBBLOCK_STATUS3                     regRMI_SUBBLOCK_STATUS3;
typedef union RMI_TCIW_FORMATTER0_CNTL                 regRMI_TCIW_FORMATTER0_CNTL;
typedef union RMI_TCIW_FORMATTER1_CNTL                 regRMI_TCIW_FORMATTER1_CNTL;
typedef union RMI_UTCL1_CNTL1                          regRMI_UTCL1_CNTL1;
typedef union RMI_UTCL1_CNTL2                          regRMI_UTCL1_CNTL2;
typedef union RMI_UTCL1_STATUS                         regRMI_UTCL1_STATUS;
typedef union RMI_UTC_XNACK_N_MISC_CNTL                regRMI_UTC_XNACK_N_MISC_CNTL;
typedef union RMI_XBAR_ARBITER_CONFIG                  regRMI_XBAR_ARBITER_CONFIG;
typedef union RMI_XBAR_ARBITER_CONFIG_1                regRMI_XBAR_ARBITER_CONFIG_1;
typedef union RMI_XBAR_CONFIG                          regRMI_XBAR_CONFIG;
typedef union RMI_XNACK_DEBUG                          regRMI_XNACK_DEBUG;
typedef union ROM_CNTL                                 regROM_CNTL;
typedef union ROM_DATA                                 regROM_DATA;
typedef union ROM_INDEX                                regROM_INDEX;
typedef union ROM_START                                regROM_START;
typedef union ROM_STATUS                               regROM_STATUS;
typedef union ROM_SW_CNTL                              regROM_SW_CNTL;
typedef union ROM_SW_COMMAND                           regROM_SW_COMMAND;
typedef union ROM_SW_DATA_1                            regROM_SW_DATA_1;
typedef union ROM_SW_DATA_10                           regROM_SW_DATA_10;
typedef union ROM_SW_DATA_11                           regROM_SW_DATA_11;
typedef union ROM_SW_DATA_12                           regROM_SW_DATA_12;
typedef union ROM_SW_DATA_13                           regROM_SW_DATA_13;
typedef union ROM_SW_DATA_14                           regROM_SW_DATA_14;
typedef union ROM_SW_DATA_15                           regROM_SW_DATA_15;
typedef union ROM_SW_DATA_16                           regROM_SW_DATA_16;
typedef union ROM_SW_DATA_17                           regROM_SW_DATA_17;
typedef union ROM_SW_DATA_18                           regROM_SW_DATA_18;
typedef union ROM_SW_DATA_19                           regROM_SW_DATA_19;
typedef union ROM_SW_DATA_2                            regROM_SW_DATA_2;
typedef union ROM_SW_DATA_20                           regROM_SW_DATA_20;
typedef union ROM_SW_DATA_21                           regROM_SW_DATA_21;
typedef union ROM_SW_DATA_22                           regROM_SW_DATA_22;
typedef union ROM_SW_DATA_23                           regROM_SW_DATA_23;
typedef union ROM_SW_DATA_24                           regROM_SW_DATA_24;
typedef union ROM_SW_DATA_25                           regROM_SW_DATA_25;
typedef union ROM_SW_DATA_26                           regROM_SW_DATA_26;
typedef union ROM_SW_DATA_27                           regROM_SW_DATA_27;
typedef union ROM_SW_DATA_28                           regROM_SW_DATA_28;
typedef union ROM_SW_DATA_29                           regROM_SW_DATA_29;
typedef union ROM_SW_DATA_3                            regROM_SW_DATA_3;
typedef union ROM_SW_DATA_30                           regROM_SW_DATA_30;
typedef union ROM_SW_DATA_31                           regROM_SW_DATA_31;
typedef union ROM_SW_DATA_32                           regROM_SW_DATA_32;
typedef union ROM_SW_DATA_33                           regROM_SW_DATA_33;
typedef union ROM_SW_DATA_34                           regROM_SW_DATA_34;
typedef union ROM_SW_DATA_35                           regROM_SW_DATA_35;
typedef union ROM_SW_DATA_36                           regROM_SW_DATA_36;
typedef union ROM_SW_DATA_37                           regROM_SW_DATA_37;
typedef union ROM_SW_DATA_38                           regROM_SW_DATA_38;
typedef union ROM_SW_DATA_39                           regROM_SW_DATA_39;
typedef union ROM_SW_DATA_4                            regROM_SW_DATA_4;
typedef union ROM_SW_DATA_40                           regROM_SW_DATA_40;
typedef union ROM_SW_DATA_41                           regROM_SW_DATA_41;
typedef union ROM_SW_DATA_42                           regROM_SW_DATA_42;
typedef union ROM_SW_DATA_43                           regROM_SW_DATA_43;
typedef union ROM_SW_DATA_44                           regROM_SW_DATA_44;
typedef union ROM_SW_DATA_45                           regROM_SW_DATA_45;
typedef union ROM_SW_DATA_46                           regROM_SW_DATA_46;
typedef union ROM_SW_DATA_47                           regROM_SW_DATA_47;
typedef union ROM_SW_DATA_48                           regROM_SW_DATA_48;
typedef union ROM_SW_DATA_49                           regROM_SW_DATA_49;
typedef union ROM_SW_DATA_5                            regROM_SW_DATA_5;
typedef union ROM_SW_DATA_50                           regROM_SW_DATA_50;
typedef union ROM_SW_DATA_51                           regROM_SW_DATA_51;
typedef union ROM_SW_DATA_52                           regROM_SW_DATA_52;
typedef union ROM_SW_DATA_53                           regROM_SW_DATA_53;
typedef union ROM_SW_DATA_54                           regROM_SW_DATA_54;
typedef union ROM_SW_DATA_55                           regROM_SW_DATA_55;
typedef union ROM_SW_DATA_56                           regROM_SW_DATA_56;
typedef union ROM_SW_DATA_57                           regROM_SW_DATA_57;
typedef union ROM_SW_DATA_58                           regROM_SW_DATA_58;
typedef union ROM_SW_DATA_59                           regROM_SW_DATA_59;
typedef union ROM_SW_DATA_6                            regROM_SW_DATA_6;
typedef union ROM_SW_DATA_60                           regROM_SW_DATA_60;
typedef union ROM_SW_DATA_61                           regROM_SW_DATA_61;
typedef union ROM_SW_DATA_62                           regROM_SW_DATA_62;
typedef union ROM_SW_DATA_63                           regROM_SW_DATA_63;
typedef union ROM_SW_DATA_64                           regROM_SW_DATA_64;
typedef union ROM_SW_DATA_7                            regROM_SW_DATA_7;
typedef union ROM_SW_DATA_8                            regROM_SW_DATA_8;
typedef union ROM_SW_DATA_9                            regROM_SW_DATA_9;
typedef union ROM_SW_STATUS                            regROM_SW_STATUS;
typedef union RPB_ARB_CNTL                             regRPB_ARB_CNTL;
typedef union RPB_ARB_CNTL2                            regRPB_ARB_CNTL2;
typedef union RPB_ATS_CNTL                             regRPB_ATS_CNTL;
typedef union RPB_ATS_CNTL2                            regRPB_ATS_CNTL2;
typedef union RPB_BIF_CNTL                             regRPB_BIF_CNTL;
typedef union RPB_BLOCKLEVEL_CONF                      regRPB_BLOCKLEVEL_CONF;
typedef union RPB_CID_QUEUE_EX                         regRPB_CID_QUEUE_EX;
typedef union RPB_CID_QUEUE_EX_DATA                    regRPB_CID_QUEUE_EX_DATA;
typedef union RPB_CID_QUEUE_RD                         regRPB_CID_QUEUE_RD;
typedef union RPB_CID_QUEUE_WR                         regRPB_CID_QUEUE_WR;
typedef union RPB_DEINTRLV_COMBINE_CNTL                regRPB_DEINTRLV_COMBINE_CNTL;
typedef union RPB_EA_QUEUE_WR                          regRPB_EA_QUEUE_WR;
typedef union RPB_EFF_CNTL                             regRPB_EFF_CNTL;
typedef union RPB_PASSPW_CONF                          regRPB_PASSPW_CONF;
typedef union RPB_PERFCOUNTER0_CFG                     regRPB_PERFCOUNTER0_CFG;
typedef union RPB_PERFCOUNTER1_CFG                     regRPB_PERFCOUNTER1_CFG;
typedef union RPB_PERFCOUNTER2_CFG                     regRPB_PERFCOUNTER2_CFG;
typedef union RPB_PERFCOUNTER3_CFG                     regRPB_PERFCOUNTER3_CFG;
typedef union RPB_PERFCOUNTER_HI                       regRPB_PERFCOUNTER_HI;
typedef union RPB_PERFCOUNTER_LO                       regRPB_PERFCOUNTER_LO;
typedef union RPB_PERFCOUNTER_RSLT_CNTL                regRPB_PERFCOUNTER_RSLT_CNTL;
typedef union RPB_PERF_COUNTER_CNTL                    regRPB_PERF_COUNTER_CNTL;
typedef union RPB_RD_QUEUE_CNTL                        regRPB_RD_QUEUE_CNTL;
typedef union RPB_RD_QUEUE_CNTL2                       regRPB_RD_QUEUE_CNTL2;
typedef union RPB_RD_SWITCH_CNTL                       regRPB_RD_SWITCH_CNTL;
typedef union RPB_SDPPORT_CNTL                         regRPB_SDPPORT_CNTL;
typedef union RPB_SWITCH_CNTL2                         regRPB_SWITCH_CNTL2;
typedef union RPB_TAG_CONF__GFX09                      regRPB_TAG_CONF__GFX09;
typedef union RPB_VC_SWITCH_RDWR                       regRPB_VC_SWITCH_RDWR;
typedef union RPB_WR_QUEUE_CNTL                        regRPB_WR_QUEUE_CNTL;
typedef union RPB_WR_QUEUE_CNTL2                       regRPB_WR_QUEUE_CNTL2;
typedef union RPB_WR_SWITCH_CNTL                       regRPB_WR_SWITCH_CNTL;
typedef union SCRATCH_ADDR                             regSCRATCH_ADDR;
typedef union SCRATCH_REG0                             regSCRATCH_REG0;
typedef union SCRATCH_REG1                             regSCRATCH_REG1;
typedef union SCRATCH_REG2                             regSCRATCH_REG2;
typedef union SCRATCH_REG3                             regSCRATCH_REG3;
typedef union SCRATCH_REG4                             regSCRATCH_REG4;
typedef union SCRATCH_REG5                             regSCRATCH_REG5;
typedef union SCRATCH_REG6                             regSCRATCH_REG6;
typedef union SCRATCH_REG7                             regSCRATCH_REG7;
typedef union SCRATCH_UMSK                             regSCRATCH_UMSK;
typedef union SDMA0_ACTIVE_FCN_ID                      regSDMA0_ACTIVE_FCN_ID;
typedef union SDMA0_ATOMIC_CNTL                        regSDMA0_ATOMIC_CNTL;
typedef union SDMA0_ATOMIC_PREOP_HI                    regSDMA0_ATOMIC_PREOP_HI;
typedef union SDMA0_ATOMIC_PREOP_LO                    regSDMA0_ATOMIC_PREOP_LO;
typedef union SDMA0_BA_THRESHOLD                       regSDMA0_BA_THRESHOLD;
typedef union SDMA0_CHICKEN_BITS                       regSDMA0_CHICKEN_BITS;
typedef union SDMA0_CHICKEN_BITS_2                     regSDMA0_CHICKEN_BITS_2;
typedef union SDMA0_CLK_CTRL                           regSDMA0_CLK_CTRL;
typedef union SDMA0_CNTL                               regSDMA0_CNTL;
typedef union SDMA0_CONTEXT_GROUP_BOUNDARY__GFX09      regSDMA0_CONTEXT_GROUP_BOUNDARY__GFX09;
typedef union SDMA0_CONTEXT_REG_TYPE0                  regSDMA0_CONTEXT_REG_TYPE0;
typedef union SDMA0_CONTEXT_REG_TYPE1                  regSDMA0_CONTEXT_REG_TYPE1;
typedef union SDMA0_CONTEXT_REG_TYPE2                  regSDMA0_CONTEXT_REG_TYPE2;
typedef union SDMA0_CONTEXT_REG_TYPE3                  regSDMA0_CONTEXT_REG_TYPE3;
typedef union SDMA0_CRD_CNTL                           regSDMA0_CRD_CNTL;
typedef union SDMA0_EA_DBIT_ADDR_DATA                  regSDMA0_EA_DBIT_ADDR_DATA;
typedef union SDMA0_EA_DBIT_ADDR_INDEX                 regSDMA0_EA_DBIT_ADDR_INDEX;
typedef union SDMA0_EDC_CONFIG                         regSDMA0_EDC_CONFIG;
typedef union SDMA0_EDC_COUNTER                        regSDMA0_EDC_COUNTER;
typedef union SDMA0_EDC_COUNTER_CLEAR                  regSDMA0_EDC_COUNTER_CLEAR;
typedef union SDMA0_ERROR_LOG                          regSDMA0_ERROR_LOG;
typedef union SDMA0_F32_CNTL                           regSDMA0_F32_CNTL;
typedef union SDMA0_F32_COUNTER                        regSDMA0_F32_COUNTER;
typedef union SDMA0_FREEZE                             regSDMA0_FREEZE;
typedef union SDMA0_GB_ADDR_CONFIG                     regSDMA0_GB_ADDR_CONFIG;
typedef union SDMA0_GB_ADDR_CONFIG_READ                regSDMA0_GB_ADDR_CONFIG_READ;
typedef union SDMA0_GFX_CONTEXT_CNTL                   regSDMA0_GFX_CONTEXT_CNTL;
typedef union SDMA0_GFX_CONTEXT_STATUS                 regSDMA0_GFX_CONTEXT_STATUS;
typedef union SDMA0_GFX_CSA_ADDR_HI                    regSDMA0_GFX_CSA_ADDR_HI;
typedef union SDMA0_GFX_CSA_ADDR_LO                    regSDMA0_GFX_CSA_ADDR_LO;
typedef union SDMA0_GFX_DOORBELL                       regSDMA0_GFX_DOORBELL;
typedef union SDMA0_GFX_DOORBELL_LOG                   regSDMA0_GFX_DOORBELL_LOG;
typedef union SDMA0_GFX_DOORBELL_OFFSET                regSDMA0_GFX_DOORBELL_OFFSET;
typedef union SDMA0_GFX_DUMMY_REG                      regSDMA0_GFX_DUMMY_REG;
typedef union SDMA0_GFX_IB_BASE_HI                     regSDMA0_GFX_IB_BASE_HI;
typedef union SDMA0_GFX_IB_BASE_LO                     regSDMA0_GFX_IB_BASE_LO;
typedef union SDMA0_GFX_IB_CNTL                        regSDMA0_GFX_IB_CNTL;
typedef union SDMA0_GFX_IB_OFFSET                      regSDMA0_GFX_IB_OFFSET;
typedef union SDMA0_GFX_IB_RPTR                        regSDMA0_GFX_IB_RPTR;
typedef union SDMA0_GFX_IB_SIZE                        regSDMA0_GFX_IB_SIZE;
typedef union SDMA0_GFX_IB_SUB_REMAIN                  regSDMA0_GFX_IB_SUB_REMAIN;
typedef union SDMA0_GFX_MIDCMD_CNTL                    regSDMA0_GFX_MIDCMD_CNTL;
typedef union SDMA0_GFX_MIDCMD_DATA0                   regSDMA0_GFX_MIDCMD_DATA0;
typedef union SDMA0_GFX_MIDCMD_DATA1                   regSDMA0_GFX_MIDCMD_DATA1;
typedef union SDMA0_GFX_MIDCMD_DATA2                   regSDMA0_GFX_MIDCMD_DATA2;
typedef union SDMA0_GFX_MIDCMD_DATA3                   regSDMA0_GFX_MIDCMD_DATA3;
typedef union SDMA0_GFX_MIDCMD_DATA4                   regSDMA0_GFX_MIDCMD_DATA4;
typedef union SDMA0_GFX_MIDCMD_DATA5                   regSDMA0_GFX_MIDCMD_DATA5;
typedef union SDMA0_GFX_MIDCMD_DATA6                   regSDMA0_GFX_MIDCMD_DATA6;
typedef union SDMA0_GFX_MIDCMD_DATA7                   regSDMA0_GFX_MIDCMD_DATA7;
typedef union SDMA0_GFX_MIDCMD_DATA8                   regSDMA0_GFX_MIDCMD_DATA8;
typedef union SDMA0_GFX_MINOR_PTR_UPDATE               regSDMA0_GFX_MINOR_PTR_UPDATE;
typedef union SDMA0_GFX_PREEMPT                        regSDMA0_GFX_PREEMPT;
typedef union SDMA0_GFX_RB_AQL_CNTL                    regSDMA0_GFX_RB_AQL_CNTL;
typedef union SDMA0_GFX_RB_BASE                        regSDMA0_GFX_RB_BASE;
typedef union SDMA0_GFX_RB_BASE_HI                     regSDMA0_GFX_RB_BASE_HI;
typedef union SDMA0_GFX_RB_CNTL                        regSDMA0_GFX_RB_CNTL;
typedef union SDMA0_GFX_RB_RPTR                        regSDMA0_GFX_RB_RPTR;
typedef union SDMA0_GFX_RB_RPTR_ADDR_HI                regSDMA0_GFX_RB_RPTR_ADDR_HI;
typedef union SDMA0_GFX_RB_RPTR_ADDR_LO                regSDMA0_GFX_RB_RPTR_ADDR_LO;
typedef union SDMA0_GFX_RB_RPTR_HI                     regSDMA0_GFX_RB_RPTR_HI;
typedef union SDMA0_GFX_RB_WPTR                        regSDMA0_GFX_RB_WPTR;
typedef union SDMA0_GFX_RB_WPTR_HI                     regSDMA0_GFX_RB_WPTR_HI;
typedef union SDMA0_GFX_RB_WPTR_POLL_ADDR_HI           regSDMA0_GFX_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA0_GFX_RB_WPTR_POLL_ADDR_LO           regSDMA0_GFX_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA0_GFX_RB_WPTR_POLL_CNTL              regSDMA0_GFX_RB_WPTR_POLL_CNTL;
typedef union SDMA0_GFX_SKIP_CNTL                      regSDMA0_GFX_SKIP_CNTL;
typedef union SDMA0_GFX_STATUS                         regSDMA0_GFX_STATUS;
typedef union SDMA0_GFX_WATERMARK                      regSDMA0_GFX_WATERMARK;
typedef union SDMA0_GPU_IOV_VIOLATION_LOG__GFX09       regSDMA0_GPU_IOV_VIOLATION_LOG__GFX09;
typedef union SDMA0_HBM_PAGE_CONFIG                    regSDMA0_HBM_PAGE_CONFIG;
typedef union SDMA0_IB_OFFSET_FETCH                    regSDMA0_IB_OFFSET_FETCH;
typedef union SDMA0_ID                                 regSDMA0_ID;
typedef union SDMA0_MMHUB_CNTL__GFX09                  regSDMA0_MMHUB_CNTL__GFX09;
typedef union SDMA0_MMHUB_TRUSTLVL__GFX09              regSDMA0_MMHUB_TRUSTLVL__GFX09;
typedef union SDMA0_PAGE_CONTEXT_STATUS                regSDMA0_PAGE_CONTEXT_STATUS;
typedef union SDMA0_PAGE_CSA_ADDR_HI                   regSDMA0_PAGE_CSA_ADDR_HI;
typedef union SDMA0_PAGE_CSA_ADDR_LO                   regSDMA0_PAGE_CSA_ADDR_LO;
typedef union SDMA0_PAGE_DOORBELL                      regSDMA0_PAGE_DOORBELL;
typedef union SDMA0_PAGE_DOORBELL_LOG                  regSDMA0_PAGE_DOORBELL_LOG;
typedef union SDMA0_PAGE_DOORBELL_OFFSET               regSDMA0_PAGE_DOORBELL_OFFSET;
typedef union SDMA0_PAGE_DUMMY_REG                     regSDMA0_PAGE_DUMMY_REG;
typedef union SDMA0_PAGE_IB_BASE_HI                    regSDMA0_PAGE_IB_BASE_HI;
typedef union SDMA0_PAGE_IB_BASE_LO                    regSDMA0_PAGE_IB_BASE_LO;
typedef union SDMA0_PAGE_IB_CNTL                       regSDMA0_PAGE_IB_CNTL;
typedef union SDMA0_PAGE_IB_OFFSET                     regSDMA0_PAGE_IB_OFFSET;
typedef union SDMA0_PAGE_IB_RPTR                       regSDMA0_PAGE_IB_RPTR;
typedef union SDMA0_PAGE_IB_SIZE                       regSDMA0_PAGE_IB_SIZE;
typedef union SDMA0_PAGE_IB_SUB_REMAIN                 regSDMA0_PAGE_IB_SUB_REMAIN;
typedef union SDMA0_PAGE_MIDCMD_CNTL                   regSDMA0_PAGE_MIDCMD_CNTL;
typedef union SDMA0_PAGE_MIDCMD_DATA0                  regSDMA0_PAGE_MIDCMD_DATA0;
typedef union SDMA0_PAGE_MIDCMD_DATA1                  regSDMA0_PAGE_MIDCMD_DATA1;
typedef union SDMA0_PAGE_MIDCMD_DATA2                  regSDMA0_PAGE_MIDCMD_DATA2;
typedef union SDMA0_PAGE_MIDCMD_DATA3                  regSDMA0_PAGE_MIDCMD_DATA3;
typedef union SDMA0_PAGE_MIDCMD_DATA4                  regSDMA0_PAGE_MIDCMD_DATA4;
typedef union SDMA0_PAGE_MIDCMD_DATA5                  regSDMA0_PAGE_MIDCMD_DATA5;
typedef union SDMA0_PAGE_MIDCMD_DATA6                  regSDMA0_PAGE_MIDCMD_DATA6;
typedef union SDMA0_PAGE_MIDCMD_DATA7                  regSDMA0_PAGE_MIDCMD_DATA7;
typedef union SDMA0_PAGE_MIDCMD_DATA8                  regSDMA0_PAGE_MIDCMD_DATA8;
typedef union SDMA0_PAGE_MINOR_PTR_UPDATE              regSDMA0_PAGE_MINOR_PTR_UPDATE;
typedef union SDMA0_PAGE_PREEMPT                       regSDMA0_PAGE_PREEMPT;
typedef union SDMA0_PAGE_RB_AQL_CNTL                   regSDMA0_PAGE_RB_AQL_CNTL;
typedef union SDMA0_PAGE_RB_BASE                       regSDMA0_PAGE_RB_BASE;
typedef union SDMA0_PAGE_RB_BASE_HI                    regSDMA0_PAGE_RB_BASE_HI;
typedef union SDMA0_PAGE_RB_CNTL                       regSDMA0_PAGE_RB_CNTL;
typedef union SDMA0_PAGE_RB_RPTR                       regSDMA0_PAGE_RB_RPTR;
typedef union SDMA0_PAGE_RB_RPTR_ADDR_HI               regSDMA0_PAGE_RB_RPTR_ADDR_HI;
typedef union SDMA0_PAGE_RB_RPTR_ADDR_LO               regSDMA0_PAGE_RB_RPTR_ADDR_LO;
typedef union SDMA0_PAGE_RB_RPTR_HI                    regSDMA0_PAGE_RB_RPTR_HI;
typedef union SDMA0_PAGE_RB_WPTR                       regSDMA0_PAGE_RB_WPTR;
typedef union SDMA0_PAGE_RB_WPTR_HI                    regSDMA0_PAGE_RB_WPTR_HI;
typedef union SDMA0_PAGE_RB_WPTR_POLL_ADDR_HI          regSDMA0_PAGE_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA0_PAGE_RB_WPTR_POLL_ADDR_LO          regSDMA0_PAGE_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA0_PAGE_RB_WPTR_POLL_CNTL             regSDMA0_PAGE_RB_WPTR_POLL_CNTL;
typedef union SDMA0_PAGE_SKIP_CNTL                     regSDMA0_PAGE_SKIP_CNTL;
typedef union SDMA0_PAGE_STATUS                        regSDMA0_PAGE_STATUS;
typedef union SDMA0_PAGE_WATERMARK                     regSDMA0_PAGE_WATERMARK;
typedef union SDMA0_PERFCOUNTER0_RESULT                regSDMA0_PERFCOUNTER0_RESULT;
typedef union SDMA0_PERFCOUNTER1_RESULT                regSDMA0_PERFCOUNTER1_RESULT;
typedef union SDMA0_PERFCOUNTER_TAG_DELAY_RANGE        regSDMA0_PERFCOUNTER_TAG_DELAY_RANGE;
typedef union SDMA0_PERFMON_CNTL                       regSDMA0_PERFMON_CNTL;
typedef union SDMA0_PHASE0_QUANTUM                     regSDMA0_PHASE0_QUANTUM;
typedef union SDMA0_PHASE1_QUANTUM                     regSDMA0_PHASE1_QUANTUM;
typedef union SDMA0_PHASE2_QUANTUM                     regSDMA0_PHASE2_QUANTUM;
typedef union SDMA0_PHYSICAL_ADDR_HI                   regSDMA0_PHYSICAL_ADDR_HI;
typedef union SDMA0_PHYSICAL_ADDR_LO                   regSDMA0_PHYSICAL_ADDR_LO;
typedef union SDMA0_POWER_CNTL                         regSDMA0_POWER_CNTL;
typedef union SDMA0_POWER_CNTL_IDLE                    regSDMA0_POWER_CNTL_IDLE;
typedef union SDMA0_PROGRAM                            regSDMA0_PROGRAM;
typedef union SDMA0_PUB_DUMMY_REG0                     regSDMA0_PUB_DUMMY_REG0;
typedef union SDMA0_PUB_DUMMY_REG1                     regSDMA0_PUB_DUMMY_REG1;
typedef union SDMA0_PUB_DUMMY_REG2                     regSDMA0_PUB_DUMMY_REG2;
typedef union SDMA0_PUB_DUMMY_REG3                     regSDMA0_PUB_DUMMY_REG3;
typedef union SDMA0_PUB_REG_TYPE0__GFX09               regSDMA0_PUB_REG_TYPE0__GFX09;
typedef union SDMA0_PUB_REG_TYPE1                      regSDMA0_PUB_REG_TYPE1;
typedef union SDMA0_PUB_REG_TYPE2__GFX09               regSDMA0_PUB_REG_TYPE2__GFX09;
typedef union SDMA0_PUB_REG_TYPE3                      regSDMA0_PUB_REG_TYPE3;
typedef union SDMA0_RB_RPTR_FETCH                      regSDMA0_RB_RPTR_FETCH;
typedef union SDMA0_RB_RPTR_FETCH_HI                   regSDMA0_RB_RPTR_FETCH_HI;
typedef union SDMA0_RD_BURST_CNTL                      regSDMA0_RD_BURST_CNTL;
typedef union SDMA0_RELAX_ORDERING_LUT                 regSDMA0_RELAX_ORDERING_LUT;
typedef union SDMA0_RLC0_CONTEXT_STATUS                regSDMA0_RLC0_CONTEXT_STATUS;
typedef union SDMA0_RLC0_CSA_ADDR_HI                   regSDMA0_RLC0_CSA_ADDR_HI;
typedef union SDMA0_RLC0_CSA_ADDR_LO                   regSDMA0_RLC0_CSA_ADDR_LO;
typedef union SDMA0_RLC0_DOORBELL                      regSDMA0_RLC0_DOORBELL;
typedef union SDMA0_RLC0_DOORBELL_LOG                  regSDMA0_RLC0_DOORBELL_LOG;
typedef union SDMA0_RLC0_DOORBELL_OFFSET               regSDMA0_RLC0_DOORBELL_OFFSET;
typedef union SDMA0_RLC0_DUMMY_REG                     regSDMA0_RLC0_DUMMY_REG;
typedef union SDMA0_RLC0_IB_BASE_HI                    regSDMA0_RLC0_IB_BASE_HI;
typedef union SDMA0_RLC0_IB_BASE_LO                    regSDMA0_RLC0_IB_BASE_LO;
typedef union SDMA0_RLC0_IB_CNTL                       regSDMA0_RLC0_IB_CNTL;
typedef union SDMA0_RLC0_IB_OFFSET                     regSDMA0_RLC0_IB_OFFSET;
typedef union SDMA0_RLC0_IB_RPTR                       regSDMA0_RLC0_IB_RPTR;
typedef union SDMA0_RLC0_IB_SIZE                       regSDMA0_RLC0_IB_SIZE;
typedef union SDMA0_RLC0_IB_SUB_REMAIN                 regSDMA0_RLC0_IB_SUB_REMAIN;
typedef union SDMA0_RLC0_MIDCMD_CNTL                   regSDMA0_RLC0_MIDCMD_CNTL;
typedef union SDMA0_RLC0_MIDCMD_DATA0                  regSDMA0_RLC0_MIDCMD_DATA0;
typedef union SDMA0_RLC0_MIDCMD_DATA1                  regSDMA0_RLC0_MIDCMD_DATA1;
typedef union SDMA0_RLC0_MIDCMD_DATA2                  regSDMA0_RLC0_MIDCMD_DATA2;
typedef union SDMA0_RLC0_MIDCMD_DATA3                  regSDMA0_RLC0_MIDCMD_DATA3;
typedef union SDMA0_RLC0_MIDCMD_DATA4                  regSDMA0_RLC0_MIDCMD_DATA4;
typedef union SDMA0_RLC0_MIDCMD_DATA5                  regSDMA0_RLC0_MIDCMD_DATA5;
typedef union SDMA0_RLC0_MIDCMD_DATA6                  regSDMA0_RLC0_MIDCMD_DATA6;
typedef union SDMA0_RLC0_MIDCMD_DATA7                  regSDMA0_RLC0_MIDCMD_DATA7;
typedef union SDMA0_RLC0_MIDCMD_DATA8                  regSDMA0_RLC0_MIDCMD_DATA8;
typedef union SDMA0_RLC0_MINOR_PTR_UPDATE              regSDMA0_RLC0_MINOR_PTR_UPDATE;
typedef union SDMA0_RLC0_PREEMPT                       regSDMA0_RLC0_PREEMPT;
typedef union SDMA0_RLC0_RB_AQL_CNTL                   regSDMA0_RLC0_RB_AQL_CNTL;
typedef union SDMA0_RLC0_RB_BASE                       regSDMA0_RLC0_RB_BASE;
typedef union SDMA0_RLC0_RB_BASE_HI                    regSDMA0_RLC0_RB_BASE_HI;
typedef union SDMA0_RLC0_RB_CNTL                       regSDMA0_RLC0_RB_CNTL;
typedef union SDMA0_RLC0_RB_RPTR                       regSDMA0_RLC0_RB_RPTR;
typedef union SDMA0_RLC0_RB_RPTR_ADDR_HI               regSDMA0_RLC0_RB_RPTR_ADDR_HI;
typedef union SDMA0_RLC0_RB_RPTR_ADDR_LO               regSDMA0_RLC0_RB_RPTR_ADDR_LO;
typedef union SDMA0_RLC0_RB_RPTR_HI                    regSDMA0_RLC0_RB_RPTR_HI;
typedef union SDMA0_RLC0_RB_WPTR                       regSDMA0_RLC0_RB_WPTR;
typedef union SDMA0_RLC0_RB_WPTR_HI                    regSDMA0_RLC0_RB_WPTR_HI;
typedef union SDMA0_RLC0_RB_WPTR_POLL_ADDR_HI          regSDMA0_RLC0_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO          regSDMA0_RLC0_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA0_RLC0_RB_WPTR_POLL_CNTL             regSDMA0_RLC0_RB_WPTR_POLL_CNTL;
typedef union SDMA0_RLC0_SKIP_CNTL                     regSDMA0_RLC0_SKIP_CNTL;
typedef union SDMA0_RLC0_STATUS                        regSDMA0_RLC0_STATUS;
typedef union SDMA0_RLC0_WATERMARK                     regSDMA0_RLC0_WATERMARK;
typedef union SDMA0_RLC1_CONTEXT_STATUS                regSDMA0_RLC1_CONTEXT_STATUS;
typedef union SDMA0_RLC1_CSA_ADDR_HI                   regSDMA0_RLC1_CSA_ADDR_HI;
typedef union SDMA0_RLC1_CSA_ADDR_LO                   regSDMA0_RLC1_CSA_ADDR_LO;
typedef union SDMA0_RLC1_DOORBELL                      regSDMA0_RLC1_DOORBELL;
typedef union SDMA0_RLC1_DOORBELL_LOG                  regSDMA0_RLC1_DOORBELL_LOG;
typedef union SDMA0_RLC1_DOORBELL_OFFSET               regSDMA0_RLC1_DOORBELL_OFFSET;
typedef union SDMA0_RLC1_DUMMY_REG                     regSDMA0_RLC1_DUMMY_REG;
typedef union SDMA0_RLC1_IB_BASE_HI                    regSDMA0_RLC1_IB_BASE_HI;
typedef union SDMA0_RLC1_IB_BASE_LO                    regSDMA0_RLC1_IB_BASE_LO;
typedef union SDMA0_RLC1_IB_CNTL                       regSDMA0_RLC1_IB_CNTL;
typedef union SDMA0_RLC1_IB_OFFSET                     regSDMA0_RLC1_IB_OFFSET;
typedef union SDMA0_RLC1_IB_RPTR                       regSDMA0_RLC1_IB_RPTR;
typedef union SDMA0_RLC1_IB_SIZE                       regSDMA0_RLC1_IB_SIZE;
typedef union SDMA0_RLC1_IB_SUB_REMAIN                 regSDMA0_RLC1_IB_SUB_REMAIN;
typedef union SDMA0_RLC1_MIDCMD_CNTL                   regSDMA0_RLC1_MIDCMD_CNTL;
typedef union SDMA0_RLC1_MIDCMD_DATA0                  regSDMA0_RLC1_MIDCMD_DATA0;
typedef union SDMA0_RLC1_MIDCMD_DATA1                  regSDMA0_RLC1_MIDCMD_DATA1;
typedef union SDMA0_RLC1_MIDCMD_DATA2                  regSDMA0_RLC1_MIDCMD_DATA2;
typedef union SDMA0_RLC1_MIDCMD_DATA3                  regSDMA0_RLC1_MIDCMD_DATA3;
typedef union SDMA0_RLC1_MIDCMD_DATA4                  regSDMA0_RLC1_MIDCMD_DATA4;
typedef union SDMA0_RLC1_MIDCMD_DATA5                  regSDMA0_RLC1_MIDCMD_DATA5;
typedef union SDMA0_RLC1_MIDCMD_DATA6                  regSDMA0_RLC1_MIDCMD_DATA6;
typedef union SDMA0_RLC1_MIDCMD_DATA7                  regSDMA0_RLC1_MIDCMD_DATA7;
typedef union SDMA0_RLC1_MIDCMD_DATA8                  regSDMA0_RLC1_MIDCMD_DATA8;
typedef union SDMA0_RLC1_MINOR_PTR_UPDATE              regSDMA0_RLC1_MINOR_PTR_UPDATE;
typedef union SDMA0_RLC1_PREEMPT                       regSDMA0_RLC1_PREEMPT;
typedef union SDMA0_RLC1_RB_AQL_CNTL                   regSDMA0_RLC1_RB_AQL_CNTL;
typedef union SDMA0_RLC1_RB_BASE                       regSDMA0_RLC1_RB_BASE;
typedef union SDMA0_RLC1_RB_BASE_HI                    regSDMA0_RLC1_RB_BASE_HI;
typedef union SDMA0_RLC1_RB_CNTL                       regSDMA0_RLC1_RB_CNTL;
typedef union SDMA0_RLC1_RB_RPTR                       regSDMA0_RLC1_RB_RPTR;
typedef union SDMA0_RLC1_RB_RPTR_ADDR_HI               regSDMA0_RLC1_RB_RPTR_ADDR_HI;
typedef union SDMA0_RLC1_RB_RPTR_ADDR_LO               regSDMA0_RLC1_RB_RPTR_ADDR_LO;
typedef union SDMA0_RLC1_RB_RPTR_HI                    regSDMA0_RLC1_RB_RPTR_HI;
typedef union SDMA0_RLC1_RB_WPTR                       regSDMA0_RLC1_RB_WPTR;
typedef union SDMA0_RLC1_RB_WPTR_HI                    regSDMA0_RLC1_RB_WPTR_HI;
typedef union SDMA0_RLC1_RB_WPTR_POLL_ADDR_HI          regSDMA0_RLC1_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA0_RLC1_RB_WPTR_POLL_ADDR_LO          regSDMA0_RLC1_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA0_RLC1_RB_WPTR_POLL_CNTL             regSDMA0_RLC1_RB_WPTR_POLL_CNTL;
typedef union SDMA0_RLC1_SKIP_CNTL                     regSDMA0_RLC1_SKIP_CNTL;
typedef union SDMA0_RLC1_STATUS                        regSDMA0_RLC1_STATUS;
typedef union SDMA0_RLC1_WATERMARK                     regSDMA0_RLC1_WATERMARK;
typedef union SDMA0_SEM_WAIT_FAIL_TIMER_CNTL           regSDMA0_SEM_WAIT_FAIL_TIMER_CNTL;
typedef union SDMA0_STATUS1_REG                        regSDMA0_STATUS1_REG;
typedef union SDMA0_STATUS2_REG                        regSDMA0_STATUS2_REG;
typedef union SDMA0_STATUS3_REG                        regSDMA0_STATUS3_REG;
typedef union SDMA0_STATUS_REG                         regSDMA0_STATUS_REG;
typedef union SDMA0_UCODE_ADDR                         regSDMA0_UCODE_ADDR;
typedef union SDMA0_UCODE_CHECKSUM                     regSDMA0_UCODE_CHECKSUM;
typedef union SDMA0_UCODE_DATA                         regSDMA0_UCODE_DATA;
typedef union SDMA0_ULV_CNTL__GFX09                    regSDMA0_ULV_CNTL__GFX09;
typedef union SDMA0_UNBREAKABLE                        regSDMA0_UNBREAKABLE;
typedef union SDMA0_UTCL1_CNTL__GFX09                  regSDMA0_UTCL1_CNTL__GFX09;
typedef union SDMA0_UTCL1_INV0__GFX09                  regSDMA0_UTCL1_INV0__GFX09;
typedef union SDMA0_UTCL1_INV1                         regSDMA0_UTCL1_INV1;
typedef union SDMA0_UTCL1_INV2__GFX09                  regSDMA0_UTCL1_INV2__GFX09;
typedef union SDMA0_UTCL1_PAGE__GFX09                  regSDMA0_UTCL1_PAGE__GFX09;
typedef union SDMA0_UTCL1_RD_STATUS__GFX09             regSDMA0_UTCL1_RD_STATUS__GFX09;
typedef union SDMA0_UTCL1_RD_XNACK0                    regSDMA0_UTCL1_RD_XNACK0;
typedef union SDMA0_UTCL1_RD_XNACK1                    regSDMA0_UTCL1_RD_XNACK1;
typedef union SDMA0_UTCL1_TIMEOUT                      regSDMA0_UTCL1_TIMEOUT;
typedef union SDMA0_UTCL1_WATERMK                      regSDMA0_UTCL1_WATERMK;
typedef union SDMA0_UTCL1_WR_STATUS__GFX09             regSDMA0_UTCL1_WR_STATUS__GFX09;
typedef union SDMA0_UTCL1_WR_XNACK0                    regSDMA0_UTCL1_WR_XNACK0;
typedef union SDMA0_UTCL1_WR_XNACK1                    regSDMA0_UTCL1_WR_XNACK1;
typedef union SDMA0_VERSION                            regSDMA0_VERSION;
typedef union SDMA0_VF_ENABLE                          regSDMA0_VF_ENABLE;
typedef union SDMA0_VIRT_RESET_REQ                     regSDMA0_VIRT_RESET_REQ;
typedef union SDMA0_VM_CNTL                            regSDMA0_VM_CNTL;
typedef union SDMA0_VM_CTX_CNTL                        regSDMA0_VM_CTX_CNTL;
typedef union SDMA0_VM_CTX_HI                          regSDMA0_VM_CTX_HI;
typedef union SDMA0_VM_CTX_LO                          regSDMA0_VM_CTX_LO;
typedef union SDMA1_ACTIVE_FCN_ID                      regSDMA1_ACTIVE_FCN_ID;
typedef union SDMA1_ATOMIC_CNTL                        regSDMA1_ATOMIC_CNTL;
typedef union SDMA1_ATOMIC_PREOP_HI                    regSDMA1_ATOMIC_PREOP_HI;
typedef union SDMA1_ATOMIC_PREOP_LO                    regSDMA1_ATOMIC_PREOP_LO;
typedef union SDMA1_BA_THRESHOLD                       regSDMA1_BA_THRESHOLD;
typedef union SDMA1_CHICKEN_BITS                       regSDMA1_CHICKEN_BITS;
typedef union SDMA1_CHICKEN_BITS_2                     regSDMA1_CHICKEN_BITS_2;
typedef union SDMA1_CLK_CTRL                           regSDMA1_CLK_CTRL;
typedef union SDMA1_CNTL                               regSDMA1_CNTL;
typedef union SDMA1_CONTEXT_GROUP_BOUNDARY__GFX09      regSDMA1_CONTEXT_GROUP_BOUNDARY__GFX09;
typedef union SDMA1_CONTEXT_REG_TYPE0                  regSDMA1_CONTEXT_REG_TYPE0;
typedef union SDMA1_CONTEXT_REG_TYPE1                  regSDMA1_CONTEXT_REG_TYPE1;
typedef union SDMA1_CONTEXT_REG_TYPE2                  regSDMA1_CONTEXT_REG_TYPE2;
typedef union SDMA1_CONTEXT_REG_TYPE3                  regSDMA1_CONTEXT_REG_TYPE3;
typedef union SDMA1_CRD_CNTL                           regSDMA1_CRD_CNTL;
typedef union SDMA1_EA_DBIT_ADDR_DATA                  regSDMA1_EA_DBIT_ADDR_DATA;
typedef union SDMA1_EA_DBIT_ADDR_INDEX                 regSDMA1_EA_DBIT_ADDR_INDEX;
typedef union SDMA1_EDC_CONFIG                         regSDMA1_EDC_CONFIG;
typedef union SDMA1_EDC_COUNTER                        regSDMA1_EDC_COUNTER;
typedef union SDMA1_EDC_COUNTER_CLEAR                  regSDMA1_EDC_COUNTER_CLEAR;
typedef union SDMA1_ERROR_LOG                          regSDMA1_ERROR_LOG;
typedef union SDMA1_F32_CNTL                           regSDMA1_F32_CNTL;
typedef union SDMA1_F32_COUNTER                        regSDMA1_F32_COUNTER;
typedef union SDMA1_FREEZE                             regSDMA1_FREEZE;
typedef union SDMA1_GB_ADDR_CONFIG                     regSDMA1_GB_ADDR_CONFIG;
typedef union SDMA1_GB_ADDR_CONFIG_READ                regSDMA1_GB_ADDR_CONFIG_READ;
typedef union SDMA1_GFX_CONTEXT_CNTL                   regSDMA1_GFX_CONTEXT_CNTL;
typedef union SDMA1_GFX_CONTEXT_STATUS                 regSDMA1_GFX_CONTEXT_STATUS;
typedef union SDMA1_GFX_CSA_ADDR_HI                    regSDMA1_GFX_CSA_ADDR_HI;
typedef union SDMA1_GFX_CSA_ADDR_LO                    regSDMA1_GFX_CSA_ADDR_LO;
typedef union SDMA1_GFX_DOORBELL                       regSDMA1_GFX_DOORBELL;
typedef union SDMA1_GFX_DOORBELL_LOG                   regSDMA1_GFX_DOORBELL_LOG;
typedef union SDMA1_GFX_DOORBELL_OFFSET                regSDMA1_GFX_DOORBELL_OFFSET;
typedef union SDMA1_GFX_DUMMY_REG                      regSDMA1_GFX_DUMMY_REG;
typedef union SDMA1_GFX_IB_BASE_HI                     regSDMA1_GFX_IB_BASE_HI;
typedef union SDMA1_GFX_IB_BASE_LO                     regSDMA1_GFX_IB_BASE_LO;
typedef union SDMA1_GFX_IB_CNTL                        regSDMA1_GFX_IB_CNTL;
typedef union SDMA1_GFX_IB_OFFSET                      regSDMA1_GFX_IB_OFFSET;
typedef union SDMA1_GFX_IB_RPTR                        regSDMA1_GFX_IB_RPTR;
typedef union SDMA1_GFX_IB_SIZE                        regSDMA1_GFX_IB_SIZE;
typedef union SDMA1_GFX_IB_SUB_REMAIN                  regSDMA1_GFX_IB_SUB_REMAIN;
typedef union SDMA1_GFX_MIDCMD_CNTL                    regSDMA1_GFX_MIDCMD_CNTL;
typedef union SDMA1_GFX_MIDCMD_DATA0                   regSDMA1_GFX_MIDCMD_DATA0;
typedef union SDMA1_GFX_MIDCMD_DATA1                   regSDMA1_GFX_MIDCMD_DATA1;
typedef union SDMA1_GFX_MIDCMD_DATA2                   regSDMA1_GFX_MIDCMD_DATA2;
typedef union SDMA1_GFX_MIDCMD_DATA3                   regSDMA1_GFX_MIDCMD_DATA3;
typedef union SDMA1_GFX_MIDCMD_DATA4                   regSDMA1_GFX_MIDCMD_DATA4;
typedef union SDMA1_GFX_MIDCMD_DATA5                   regSDMA1_GFX_MIDCMD_DATA5;
typedef union SDMA1_GFX_MIDCMD_DATA6                   regSDMA1_GFX_MIDCMD_DATA6;
typedef union SDMA1_GFX_MIDCMD_DATA7                   regSDMA1_GFX_MIDCMD_DATA7;
typedef union SDMA1_GFX_MIDCMD_DATA8                   regSDMA1_GFX_MIDCMD_DATA8;
typedef union SDMA1_GFX_MINOR_PTR_UPDATE               regSDMA1_GFX_MINOR_PTR_UPDATE;
typedef union SDMA1_GFX_PREEMPT                        regSDMA1_GFX_PREEMPT;
typedef union SDMA1_GFX_RB_AQL_CNTL                    regSDMA1_GFX_RB_AQL_CNTL;
typedef union SDMA1_GFX_RB_BASE                        regSDMA1_GFX_RB_BASE;
typedef union SDMA1_GFX_RB_BASE_HI                     regSDMA1_GFX_RB_BASE_HI;
typedef union SDMA1_GFX_RB_CNTL                        regSDMA1_GFX_RB_CNTL;
typedef union SDMA1_GFX_RB_RPTR                        regSDMA1_GFX_RB_RPTR;
typedef union SDMA1_GFX_RB_RPTR_ADDR_HI                regSDMA1_GFX_RB_RPTR_ADDR_HI;
typedef union SDMA1_GFX_RB_RPTR_ADDR_LO                regSDMA1_GFX_RB_RPTR_ADDR_LO;
typedef union SDMA1_GFX_RB_RPTR_HI                     regSDMA1_GFX_RB_RPTR_HI;
typedef union SDMA1_GFX_RB_WPTR                        regSDMA1_GFX_RB_WPTR;
typedef union SDMA1_GFX_RB_WPTR_HI                     regSDMA1_GFX_RB_WPTR_HI;
typedef union SDMA1_GFX_RB_WPTR_POLL_ADDR_HI           regSDMA1_GFX_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA1_GFX_RB_WPTR_POLL_ADDR_LO           regSDMA1_GFX_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA1_GFX_RB_WPTR_POLL_CNTL              regSDMA1_GFX_RB_WPTR_POLL_CNTL;
typedef union SDMA1_GFX_SKIP_CNTL                      regSDMA1_GFX_SKIP_CNTL;
typedef union SDMA1_GFX_STATUS                         regSDMA1_GFX_STATUS;
typedef union SDMA1_GFX_WATERMARK                      regSDMA1_GFX_WATERMARK;
typedef union SDMA1_GPU_IOV_VIOLATION_LOG__GFX09       regSDMA1_GPU_IOV_VIOLATION_LOG__GFX09;
typedef union SDMA1_HBM_PAGE_CONFIG                    regSDMA1_HBM_PAGE_CONFIG;
typedef union SDMA1_IB_OFFSET_FETCH                    regSDMA1_IB_OFFSET_FETCH;
typedef union SDMA1_ID                                 regSDMA1_ID;
typedef union SDMA1_MMHUB_CNTL__GFX09                  regSDMA1_MMHUB_CNTL__GFX09;
typedef union SDMA1_MMHUB_TRUSTLVL__GFX09              regSDMA1_MMHUB_TRUSTLVL__GFX09;
typedef union SDMA1_PAGE_CONTEXT_STATUS                regSDMA1_PAGE_CONTEXT_STATUS;
typedef union SDMA1_PAGE_CSA_ADDR_HI                   regSDMA1_PAGE_CSA_ADDR_HI;
typedef union SDMA1_PAGE_CSA_ADDR_LO                   regSDMA1_PAGE_CSA_ADDR_LO;
typedef union SDMA1_PAGE_DOORBELL                      regSDMA1_PAGE_DOORBELL;
typedef union SDMA1_PAGE_DOORBELL_LOG                  regSDMA1_PAGE_DOORBELL_LOG;
typedef union SDMA1_PAGE_DOORBELL_OFFSET               regSDMA1_PAGE_DOORBELL_OFFSET;
typedef union SDMA1_PAGE_DUMMY_REG                     regSDMA1_PAGE_DUMMY_REG;
typedef union SDMA1_PAGE_IB_BASE_HI                    regSDMA1_PAGE_IB_BASE_HI;
typedef union SDMA1_PAGE_IB_BASE_LO                    regSDMA1_PAGE_IB_BASE_LO;
typedef union SDMA1_PAGE_IB_CNTL                       regSDMA1_PAGE_IB_CNTL;
typedef union SDMA1_PAGE_IB_OFFSET                     regSDMA1_PAGE_IB_OFFSET;
typedef union SDMA1_PAGE_IB_RPTR                       regSDMA1_PAGE_IB_RPTR;
typedef union SDMA1_PAGE_IB_SIZE                       regSDMA1_PAGE_IB_SIZE;
typedef union SDMA1_PAGE_IB_SUB_REMAIN                 regSDMA1_PAGE_IB_SUB_REMAIN;
typedef union SDMA1_PAGE_MIDCMD_CNTL                   regSDMA1_PAGE_MIDCMD_CNTL;
typedef union SDMA1_PAGE_MIDCMD_DATA0                  regSDMA1_PAGE_MIDCMD_DATA0;
typedef union SDMA1_PAGE_MIDCMD_DATA1                  regSDMA1_PAGE_MIDCMD_DATA1;
typedef union SDMA1_PAGE_MIDCMD_DATA2                  regSDMA1_PAGE_MIDCMD_DATA2;
typedef union SDMA1_PAGE_MIDCMD_DATA3                  regSDMA1_PAGE_MIDCMD_DATA3;
typedef union SDMA1_PAGE_MIDCMD_DATA4                  regSDMA1_PAGE_MIDCMD_DATA4;
typedef union SDMA1_PAGE_MIDCMD_DATA5                  regSDMA1_PAGE_MIDCMD_DATA5;
typedef union SDMA1_PAGE_MIDCMD_DATA6                  regSDMA1_PAGE_MIDCMD_DATA6;
typedef union SDMA1_PAGE_MIDCMD_DATA7                  regSDMA1_PAGE_MIDCMD_DATA7;
typedef union SDMA1_PAGE_MIDCMD_DATA8                  regSDMA1_PAGE_MIDCMD_DATA8;
typedef union SDMA1_PAGE_MINOR_PTR_UPDATE              regSDMA1_PAGE_MINOR_PTR_UPDATE;
typedef union SDMA1_PAGE_PREEMPT                       regSDMA1_PAGE_PREEMPT;
typedef union SDMA1_PAGE_RB_AQL_CNTL                   regSDMA1_PAGE_RB_AQL_CNTL;
typedef union SDMA1_PAGE_RB_BASE                       regSDMA1_PAGE_RB_BASE;
typedef union SDMA1_PAGE_RB_BASE_HI                    regSDMA1_PAGE_RB_BASE_HI;
typedef union SDMA1_PAGE_RB_CNTL                       regSDMA1_PAGE_RB_CNTL;
typedef union SDMA1_PAGE_RB_RPTR                       regSDMA1_PAGE_RB_RPTR;
typedef union SDMA1_PAGE_RB_RPTR_ADDR_HI               regSDMA1_PAGE_RB_RPTR_ADDR_HI;
typedef union SDMA1_PAGE_RB_RPTR_ADDR_LO               regSDMA1_PAGE_RB_RPTR_ADDR_LO;
typedef union SDMA1_PAGE_RB_RPTR_HI                    regSDMA1_PAGE_RB_RPTR_HI;
typedef union SDMA1_PAGE_RB_WPTR                       regSDMA1_PAGE_RB_WPTR;
typedef union SDMA1_PAGE_RB_WPTR_HI                    regSDMA1_PAGE_RB_WPTR_HI;
typedef union SDMA1_PAGE_RB_WPTR_POLL_ADDR_HI          regSDMA1_PAGE_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA1_PAGE_RB_WPTR_POLL_ADDR_LO          regSDMA1_PAGE_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA1_PAGE_RB_WPTR_POLL_CNTL             regSDMA1_PAGE_RB_WPTR_POLL_CNTL;
typedef union SDMA1_PAGE_SKIP_CNTL                     regSDMA1_PAGE_SKIP_CNTL;
typedef union SDMA1_PAGE_STATUS                        regSDMA1_PAGE_STATUS;
typedef union SDMA1_PAGE_WATERMARK                     regSDMA1_PAGE_WATERMARK;
typedef union SDMA1_PERFCOUNTER0_RESULT                regSDMA1_PERFCOUNTER0_RESULT;
typedef union SDMA1_PERFCOUNTER1_RESULT                regSDMA1_PERFCOUNTER1_RESULT;
typedef union SDMA1_PERFCOUNTER_TAG_DELAY_RANGE        regSDMA1_PERFCOUNTER_TAG_DELAY_RANGE;
typedef union SDMA1_PERFMON_CNTL                       regSDMA1_PERFMON_CNTL;
typedef union SDMA1_PHASE0_QUANTUM                     regSDMA1_PHASE0_QUANTUM;
typedef union SDMA1_PHASE1_QUANTUM                     regSDMA1_PHASE1_QUANTUM;
typedef union SDMA1_PHASE2_QUANTUM                     regSDMA1_PHASE2_QUANTUM;
typedef union SDMA1_PHYSICAL_ADDR_HI                   regSDMA1_PHYSICAL_ADDR_HI;
typedef union SDMA1_PHYSICAL_ADDR_LO                   regSDMA1_PHYSICAL_ADDR_LO;
typedef union SDMA1_POWER_CNTL                         regSDMA1_POWER_CNTL;
typedef union SDMA1_POWER_CNTL_IDLE                    regSDMA1_POWER_CNTL_IDLE;
typedef union SDMA1_PROGRAM                            regSDMA1_PROGRAM;
typedef union SDMA1_PUB_DUMMY_REG0                     regSDMA1_PUB_DUMMY_REG0;
typedef union SDMA1_PUB_DUMMY_REG1                     regSDMA1_PUB_DUMMY_REG1;
typedef union SDMA1_PUB_DUMMY_REG2                     regSDMA1_PUB_DUMMY_REG2;
typedef union SDMA1_PUB_DUMMY_REG3                     regSDMA1_PUB_DUMMY_REG3;
typedef union SDMA1_PUB_REG_TYPE0__GFX09               regSDMA1_PUB_REG_TYPE0__GFX09;
typedef union SDMA1_PUB_REG_TYPE1                      regSDMA1_PUB_REG_TYPE1;
typedef union SDMA1_PUB_REG_TYPE2__GFX09               regSDMA1_PUB_REG_TYPE2__GFX09;
typedef union SDMA1_PUB_REG_TYPE3                      regSDMA1_PUB_REG_TYPE3;
typedef union SDMA1_RB_RPTR_FETCH                      regSDMA1_RB_RPTR_FETCH;
typedef union SDMA1_RB_RPTR_FETCH_HI                   regSDMA1_RB_RPTR_FETCH_HI;
typedef union SDMA1_RD_BURST_CNTL                      regSDMA1_RD_BURST_CNTL;
typedef union SDMA1_RELAX_ORDERING_LUT                 regSDMA1_RELAX_ORDERING_LUT;
typedef union SDMA1_RLC0_CONTEXT_STATUS                regSDMA1_RLC0_CONTEXT_STATUS;
typedef union SDMA1_RLC0_CSA_ADDR_HI                   regSDMA1_RLC0_CSA_ADDR_HI;
typedef union SDMA1_RLC0_CSA_ADDR_LO                   regSDMA1_RLC0_CSA_ADDR_LO;
typedef union SDMA1_RLC0_DOORBELL                      regSDMA1_RLC0_DOORBELL;
typedef union SDMA1_RLC0_DOORBELL_LOG                  regSDMA1_RLC0_DOORBELL_LOG;
typedef union SDMA1_RLC0_DOORBELL_OFFSET               regSDMA1_RLC0_DOORBELL_OFFSET;
typedef union SDMA1_RLC0_DUMMY_REG                     regSDMA1_RLC0_DUMMY_REG;
typedef union SDMA1_RLC0_IB_BASE_HI                    regSDMA1_RLC0_IB_BASE_HI;
typedef union SDMA1_RLC0_IB_BASE_LO                    regSDMA1_RLC0_IB_BASE_LO;
typedef union SDMA1_RLC0_IB_CNTL                       regSDMA1_RLC0_IB_CNTL;
typedef union SDMA1_RLC0_IB_OFFSET                     regSDMA1_RLC0_IB_OFFSET;
typedef union SDMA1_RLC0_IB_RPTR                       regSDMA1_RLC0_IB_RPTR;
typedef union SDMA1_RLC0_IB_SIZE                       regSDMA1_RLC0_IB_SIZE;
typedef union SDMA1_RLC0_IB_SUB_REMAIN                 regSDMA1_RLC0_IB_SUB_REMAIN;
typedef union SDMA1_RLC0_MIDCMD_CNTL                   regSDMA1_RLC0_MIDCMD_CNTL;
typedef union SDMA1_RLC0_MIDCMD_DATA0                  regSDMA1_RLC0_MIDCMD_DATA0;
typedef union SDMA1_RLC0_MIDCMD_DATA1                  regSDMA1_RLC0_MIDCMD_DATA1;
typedef union SDMA1_RLC0_MIDCMD_DATA2                  regSDMA1_RLC0_MIDCMD_DATA2;
typedef union SDMA1_RLC0_MIDCMD_DATA3                  regSDMA1_RLC0_MIDCMD_DATA3;
typedef union SDMA1_RLC0_MIDCMD_DATA4                  regSDMA1_RLC0_MIDCMD_DATA4;
typedef union SDMA1_RLC0_MIDCMD_DATA5                  regSDMA1_RLC0_MIDCMD_DATA5;
typedef union SDMA1_RLC0_MIDCMD_DATA6                  regSDMA1_RLC0_MIDCMD_DATA6;
typedef union SDMA1_RLC0_MIDCMD_DATA7                  regSDMA1_RLC0_MIDCMD_DATA7;
typedef union SDMA1_RLC0_MIDCMD_DATA8                  regSDMA1_RLC0_MIDCMD_DATA8;
typedef union SDMA1_RLC0_MINOR_PTR_UPDATE              regSDMA1_RLC0_MINOR_PTR_UPDATE;
typedef union SDMA1_RLC0_PREEMPT                       regSDMA1_RLC0_PREEMPT;
typedef union SDMA1_RLC0_RB_AQL_CNTL                   regSDMA1_RLC0_RB_AQL_CNTL;
typedef union SDMA1_RLC0_RB_BASE                       regSDMA1_RLC0_RB_BASE;
typedef union SDMA1_RLC0_RB_BASE_HI                    regSDMA1_RLC0_RB_BASE_HI;
typedef union SDMA1_RLC0_RB_CNTL                       regSDMA1_RLC0_RB_CNTL;
typedef union SDMA1_RLC0_RB_RPTR                       regSDMA1_RLC0_RB_RPTR;
typedef union SDMA1_RLC0_RB_RPTR_ADDR_HI               regSDMA1_RLC0_RB_RPTR_ADDR_HI;
typedef union SDMA1_RLC0_RB_RPTR_ADDR_LO               regSDMA1_RLC0_RB_RPTR_ADDR_LO;
typedef union SDMA1_RLC0_RB_RPTR_HI                    regSDMA1_RLC0_RB_RPTR_HI;
typedef union SDMA1_RLC0_RB_WPTR                       regSDMA1_RLC0_RB_WPTR;
typedef union SDMA1_RLC0_RB_WPTR_HI                    regSDMA1_RLC0_RB_WPTR_HI;
typedef union SDMA1_RLC0_RB_WPTR_POLL_ADDR_HI          regSDMA1_RLC0_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA1_RLC0_RB_WPTR_POLL_ADDR_LO          regSDMA1_RLC0_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA1_RLC0_RB_WPTR_POLL_CNTL             regSDMA1_RLC0_RB_WPTR_POLL_CNTL;
typedef union SDMA1_RLC0_SKIP_CNTL                     regSDMA1_RLC0_SKIP_CNTL;
typedef union SDMA1_RLC0_STATUS                        regSDMA1_RLC0_STATUS;
typedef union SDMA1_RLC0_WATERMARK                     regSDMA1_RLC0_WATERMARK;
typedef union SDMA1_RLC1_CONTEXT_STATUS                regSDMA1_RLC1_CONTEXT_STATUS;
typedef union SDMA1_RLC1_CSA_ADDR_HI                   regSDMA1_RLC1_CSA_ADDR_HI;
typedef union SDMA1_RLC1_CSA_ADDR_LO                   regSDMA1_RLC1_CSA_ADDR_LO;
typedef union SDMA1_RLC1_DOORBELL                      regSDMA1_RLC1_DOORBELL;
typedef union SDMA1_RLC1_DOORBELL_LOG                  regSDMA1_RLC1_DOORBELL_LOG;
typedef union SDMA1_RLC1_DOORBELL_OFFSET               regSDMA1_RLC1_DOORBELL_OFFSET;
typedef union SDMA1_RLC1_DUMMY_REG                     regSDMA1_RLC1_DUMMY_REG;
typedef union SDMA1_RLC1_IB_BASE_HI                    regSDMA1_RLC1_IB_BASE_HI;
typedef union SDMA1_RLC1_IB_BASE_LO                    regSDMA1_RLC1_IB_BASE_LO;
typedef union SDMA1_RLC1_IB_CNTL                       regSDMA1_RLC1_IB_CNTL;
typedef union SDMA1_RLC1_IB_OFFSET                     regSDMA1_RLC1_IB_OFFSET;
typedef union SDMA1_RLC1_IB_RPTR                       regSDMA1_RLC1_IB_RPTR;
typedef union SDMA1_RLC1_IB_SIZE                       regSDMA1_RLC1_IB_SIZE;
typedef union SDMA1_RLC1_IB_SUB_REMAIN                 regSDMA1_RLC1_IB_SUB_REMAIN;
typedef union SDMA1_RLC1_MIDCMD_CNTL                   regSDMA1_RLC1_MIDCMD_CNTL;
typedef union SDMA1_RLC1_MIDCMD_DATA0                  regSDMA1_RLC1_MIDCMD_DATA0;
typedef union SDMA1_RLC1_MIDCMD_DATA1                  regSDMA1_RLC1_MIDCMD_DATA1;
typedef union SDMA1_RLC1_MIDCMD_DATA2                  regSDMA1_RLC1_MIDCMD_DATA2;
typedef union SDMA1_RLC1_MIDCMD_DATA3                  regSDMA1_RLC1_MIDCMD_DATA3;
typedef union SDMA1_RLC1_MIDCMD_DATA4                  regSDMA1_RLC1_MIDCMD_DATA4;
typedef union SDMA1_RLC1_MIDCMD_DATA5                  regSDMA1_RLC1_MIDCMD_DATA5;
typedef union SDMA1_RLC1_MIDCMD_DATA6                  regSDMA1_RLC1_MIDCMD_DATA6;
typedef union SDMA1_RLC1_MIDCMD_DATA7                  regSDMA1_RLC1_MIDCMD_DATA7;
typedef union SDMA1_RLC1_MIDCMD_DATA8                  regSDMA1_RLC1_MIDCMD_DATA8;
typedef union SDMA1_RLC1_MINOR_PTR_UPDATE              regSDMA1_RLC1_MINOR_PTR_UPDATE;
typedef union SDMA1_RLC1_PREEMPT                       regSDMA1_RLC1_PREEMPT;
typedef union SDMA1_RLC1_RB_AQL_CNTL                   regSDMA1_RLC1_RB_AQL_CNTL;
typedef union SDMA1_RLC1_RB_BASE                       regSDMA1_RLC1_RB_BASE;
typedef union SDMA1_RLC1_RB_BASE_HI                    regSDMA1_RLC1_RB_BASE_HI;
typedef union SDMA1_RLC1_RB_CNTL                       regSDMA1_RLC1_RB_CNTL;
typedef union SDMA1_RLC1_RB_RPTR                       regSDMA1_RLC1_RB_RPTR;
typedef union SDMA1_RLC1_RB_RPTR_ADDR_HI               regSDMA1_RLC1_RB_RPTR_ADDR_HI;
typedef union SDMA1_RLC1_RB_RPTR_ADDR_LO               regSDMA1_RLC1_RB_RPTR_ADDR_LO;
typedef union SDMA1_RLC1_RB_RPTR_HI                    regSDMA1_RLC1_RB_RPTR_HI;
typedef union SDMA1_RLC1_RB_WPTR                       regSDMA1_RLC1_RB_WPTR;
typedef union SDMA1_RLC1_RB_WPTR_HI                    regSDMA1_RLC1_RB_WPTR_HI;
typedef union SDMA1_RLC1_RB_WPTR_POLL_ADDR_HI          regSDMA1_RLC1_RB_WPTR_POLL_ADDR_HI;
typedef union SDMA1_RLC1_RB_WPTR_POLL_ADDR_LO          regSDMA1_RLC1_RB_WPTR_POLL_ADDR_LO;
typedef union SDMA1_RLC1_RB_WPTR_POLL_CNTL             regSDMA1_RLC1_RB_WPTR_POLL_CNTL;
typedef union SDMA1_RLC1_SKIP_CNTL                     regSDMA1_RLC1_SKIP_CNTL;
typedef union SDMA1_RLC1_STATUS                        regSDMA1_RLC1_STATUS;
typedef union SDMA1_RLC1_WATERMARK                     regSDMA1_RLC1_WATERMARK;
typedef union SDMA1_SEM_WAIT_FAIL_TIMER_CNTL           regSDMA1_SEM_WAIT_FAIL_TIMER_CNTL;
typedef union SDMA1_STATUS1_REG                        regSDMA1_STATUS1_REG;
typedef union SDMA1_STATUS2_REG                        regSDMA1_STATUS2_REG;
typedef union SDMA1_STATUS3_REG                        regSDMA1_STATUS3_REG;
typedef union SDMA1_STATUS_REG                         regSDMA1_STATUS_REG;
typedef union SDMA1_UCODE_ADDR                         regSDMA1_UCODE_ADDR;
typedef union SDMA1_UCODE_CHECKSUM                     regSDMA1_UCODE_CHECKSUM;
typedef union SDMA1_UCODE_DATA                         regSDMA1_UCODE_DATA;
typedef union SDMA1_ULV_CNTL__GFX09                    regSDMA1_ULV_CNTL__GFX09;
typedef union SDMA1_UNBREAKABLE                        regSDMA1_UNBREAKABLE;
typedef union SDMA1_UTCL1_CNTL__GFX09                  regSDMA1_UTCL1_CNTL__GFX09;
typedef union SDMA1_UTCL1_INV0__GFX09                  regSDMA1_UTCL1_INV0__GFX09;
typedef union SDMA1_UTCL1_INV1                         regSDMA1_UTCL1_INV1;
typedef union SDMA1_UTCL1_INV2__GFX09                  regSDMA1_UTCL1_INV2__GFX09;
typedef union SDMA1_UTCL1_PAGE__GFX09                  regSDMA1_UTCL1_PAGE__GFX09;
typedef union SDMA1_UTCL1_RD_STATUS__GFX09             regSDMA1_UTCL1_RD_STATUS__GFX09;
typedef union SDMA1_UTCL1_RD_XNACK0                    regSDMA1_UTCL1_RD_XNACK0;
typedef union SDMA1_UTCL1_RD_XNACK1                    regSDMA1_UTCL1_RD_XNACK1;
typedef union SDMA1_UTCL1_TIMEOUT                      regSDMA1_UTCL1_TIMEOUT;
typedef union SDMA1_UTCL1_WATERMK                      regSDMA1_UTCL1_WATERMK;
typedef union SDMA1_UTCL1_WR_STATUS__GFX09             regSDMA1_UTCL1_WR_STATUS__GFX09;
typedef union SDMA1_UTCL1_WR_XNACK0                    regSDMA1_UTCL1_WR_XNACK0;
typedef union SDMA1_UTCL1_WR_XNACK1                    regSDMA1_UTCL1_WR_XNACK1;
typedef union SDMA1_VERSION                            regSDMA1_VERSION;
typedef union SDMA1_VF_ENABLE                          regSDMA1_VF_ENABLE;
typedef union SDMA1_VIRT_RESET_REQ                     regSDMA1_VIRT_RESET_REQ;
typedef union SDMA1_VM_CNTL                            regSDMA1_VM_CNTL;
typedef union SDMA1_VM_CTX_CNTL                        regSDMA1_VM_CTX_CNTL;
typedef union SDMA1_VM_CTX_HI                          regSDMA1_VM_CTX_HI;
typedef union SDMA1_VM_CTX_LO                          regSDMA1_VM_CTX_LO;
typedef union SDMA_PGFSM_CONFIG                        regSDMA_PGFSM_CONFIG;
typedef union SDMA_PGFSM_READ                          regSDMA_PGFSM_READ;
typedef union SDMA_PGFSM_WRITE                         regSDMA_PGFSM_WRITE;
typedef union SDMA_POWER_GATING                        regSDMA_POWER_GATING;
typedef union SEM_ACTIVE_FCN_ID                        regSEM_ACTIVE_FCN_ID;
typedef union SEM_ATOMIC_OP_LUT                        regSEM_ATOMIC_OP_LUT;
typedef union SEM_CHICKEN_BITS                         regSEM_CHICKEN_BITS;
typedef union SEM_CHICKEN_BITS2                        regSEM_CHICKEN_BITS2;
typedef union SEM_CID_REMAP_DATA__GFX09                regSEM_CID_REMAP_DATA__GFX09;
typedef union SEM_CID_REMAP_INDEX                      regSEM_CID_REMAP_INDEX;
typedef union SEM_CLK_CTRL__GFX09                      regSEM_CLK_CTRL__GFX09;
typedef union SEM_EDC_CONFIG                           regSEM_EDC_CONFIG;
typedef union SEM_GPU_IOV_VIOLATION_LOG__GFX09         regSEM_GPU_IOV_VIOLATION_LOG__GFX09;
typedef union SEM_MAILBOX                              regSEM_MAILBOX;
typedef union SEM_MAILBOX_CLIENTCONFIG                 regSEM_MAILBOX_CLIENTCONFIG;
typedef union SEM_MAILBOX_CLIENTCONFIG_EXTRA           regSEM_MAILBOX_CLIENTCONFIG_EXTRA;
typedef union SEM_MAILBOX_CONTROL                      regSEM_MAILBOX_CONTROL;
typedef union SEM_MCIF_CONFIG                          regSEM_MCIF_CONFIG;
typedef union SEM_MMHUB_CNTL                           regSEM_MMHUB_CNTL;
typedef union SEM_OUTSTANDING_THRESHOLD                regSEM_OUTSTANDING_THRESHOLD;
typedef union SEM_PERFCOUNTER0_RESULT                  regSEM_PERFCOUNTER0_RESULT;
typedef union SEM_PERFCOUNTER1_RESULT                  regSEM_PERFCOUNTER1_RESULT;
typedef union SEM_PERFMON_CNTL                         regSEM_PERFMON_CNTL;
typedef union SEM_REGISTER_LAST_PART0                  regSEM_REGISTER_LAST_PART0;
typedef union SEM_REGISTER_LAST_PART1                  regSEM_REGISTER_LAST_PART1;
typedef union SEM_REGISTER_LAST_PART2                  regSEM_REGISTER_LAST_PART2;
typedef union SEM_REQ_INPUT_0                          regSEM_REQ_INPUT_0;
typedef union SEM_REQ_INPUT_1                          regSEM_REQ_INPUT_1;
typedef union SEM_REQ_INPUT_2                          regSEM_REQ_INPUT_2;
typedef union SEM_REQ_INPUT_3                          regSEM_REQ_INPUT_3;
typedef union SEM_RESP_ACP__GFX09                      regSEM_RESP_ACP__GFX09;
typedef union SEM_RESP_GC__GFX09                       regSEM_RESP_GC__GFX09;
typedef union SEM_RESP_ISP__GFX09                      regSEM_RESP_ISP__GFX09;
typedef union SEM_RESP_SDMA0__GFX09                    regSEM_RESP_SDMA0__GFX09;
typedef union SEM_RESP_SDMA1__GFX09                    regSEM_RESP_SDMA1__GFX09;
typedef union SEM_RESP_UVD__GFX09                      regSEM_RESP_UVD__GFX09;
typedef union SEM_RESP_VCE_0__GFX09                    regSEM_RESP_VCE_0__GFX09;
typedef union SEM_RESP_VCE_1__GFX09                    regSEM_RESP_VCE_1__GFX09;
typedef union SEM_RESP_VP8__GFX09                      regSEM_RESP_VP8__GFX09;
typedef union SEM_STATUS                               regSEM_STATUS;
typedef union SEM_UTCL2_TRAN_EN_LUT                    regSEM_UTCL2_TRAN_EN_LUT;
typedef union SEM_UTC_CONFIG                           regSEM_UTC_CONFIG;
typedef union SEM_UTC_CREDIT                           regSEM_UTC_CREDIT;
typedef union SEM_VIRT_RESET_REQ                       regSEM_VIRT_RESET_REQ;
typedef union SE_CAC_CGTT_CLK_CTRL                     regSE_CAC_CGTT_CLK_CTRL;
typedef union SE_CAC_CNTL__GFX09                       regSE_CAC_CNTL__GFX09;
typedef union SE_CAC_IND_DATA                          regSE_CAC_IND_DATA;
typedef union SE_CAC_IND_INDEX                         regSE_CAC_IND_INDEX;
typedef union SE_CAC_OVR_SEL                           regSE_CAC_OVR_SEL;
typedef union SE_CAC_OVR_VAL                           regSE_CAC_OVR_VAL;
typedef union SH_MEM_BASES                             regSH_MEM_BASES;
typedef union SH_MEM_CONFIG__GFX09                     regSH_MEM_CONFIG__GFX09;
typedef union SMU_RLC_RESPONSE                         regSMU_RLC_RESPONSE;
typedef union SPIS_DEBUG_READ                          regSPIS_DEBUG_READ;
typedef union SPI_ARB_CNTL_0                           regSPI_ARB_CNTL_0;
typedef union SPI_ARB_CYCLES_0                         regSPI_ARB_CYCLES_0;
typedef union SPI_ARB_CYCLES_1                         regSPI_ARB_CYCLES_1;
typedef union SPI_ARB_PRIORITY                         regSPI_ARB_PRIORITY;
typedef union SPI_BARYC_CNTL                           regSPI_BARYC_CNTL;
typedef union SPI_CDBG_SYS_CS0                         regSPI_CDBG_SYS_CS0;
typedef union SPI_CDBG_SYS_CS1                         regSPI_CDBG_SYS_CS1;
typedef union SPI_CDBG_SYS_GFX                         regSPI_CDBG_SYS_GFX;
typedef union SPI_CDBG_SYS_HP3D                        regSPI_CDBG_SYS_HP3D;
typedef union SPI_COMPUTE_QUEUE_RESET                  regSPI_COMPUTE_QUEUE_RESET;
typedef union SPI_COMPUTE_WF_CTX_SAVE                  regSPI_COMPUTE_WF_CTX_SAVE;
typedef union SPI_CONFIG_CNTL                          regSPI_CONFIG_CNTL;
typedef union SPI_CONFIG_CNTL_1__GFX09                 regSPI_CONFIG_CNTL_1__GFX09;
typedef union SPI_CONFIG_CNTL_2                        regSPI_CONFIG_CNTL_2;
typedef union SPI_CONFIG_PS_CU_EN__GFX09               regSPI_CONFIG_PS_CU_EN__GFX09;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_0                regSPI_CSQ_WF_ACTIVE_COUNT_0;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_1                regSPI_CSQ_WF_ACTIVE_COUNT_1;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_2                regSPI_CSQ_WF_ACTIVE_COUNT_2;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_3                regSPI_CSQ_WF_ACTIVE_COUNT_3;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_4                regSPI_CSQ_WF_ACTIVE_COUNT_4;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_5                regSPI_CSQ_WF_ACTIVE_COUNT_5;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_6                regSPI_CSQ_WF_ACTIVE_COUNT_6;
typedef union SPI_CSQ_WF_ACTIVE_COUNT_7                regSPI_CSQ_WF_ACTIVE_COUNT_7;
typedef union SPI_CSQ_WF_ACTIVE_STATUS                 regSPI_CSQ_WF_ACTIVE_STATUS;
typedef union SPI_DEBUG_BUSY__GFX09                    regSPI_DEBUG_BUSY__GFX09;
typedef union SPI_DEBUG_READ                           regSPI_DEBUG_READ;
typedef union SPI_DSM_CNTL                             regSPI_DSM_CNTL;
typedef union SPI_DSM_CNTL2__GFX09                     regSPI_DSM_CNTL2__GFX09;
typedef union SPI_EDC_CNT                              regSPI_EDC_CNT;
typedef union SPI_GDBG_TRAP_CONFIG                     regSPI_GDBG_TRAP_CONFIG;
typedef union SPI_GDBG_TRAP_DATA0                      regSPI_GDBG_TRAP_DATA0;
typedef union SPI_GDBG_TRAP_DATA1                      regSPI_GDBG_TRAP_DATA1;
typedef union SPI_GDBG_TRAP_MASK                       regSPI_GDBG_TRAP_MASK;
typedef union SPI_GDBG_WAVE_CNTL                       regSPI_GDBG_WAVE_CNTL;
typedef union SPI_GDBG_WAVE_CNTL2                      regSPI_GDBG_WAVE_CNTL2;
typedef union SPI_GDBG_WAVE_CNTL3                      regSPI_GDBG_WAVE_CNTL3;
typedef union SPI_GDS_CREDITS                          regSPI_GDS_CREDITS;
typedef union SPI_GFX_CNTL                             regSPI_GFX_CNTL;
typedef union SPI_INTERP_CONTROL_0                     regSPI_INTERP_CONTROL_0;
typedef union SPI_LB_CTR_CTRL                          regSPI_LB_CTR_CTRL;
typedef union SPI_LB_CU_MASK__GFX09                    regSPI_LB_CU_MASK__GFX09;
typedef union SPI_LB_DATA_PERCU_WAVE_CS__GFX09         regSPI_LB_DATA_PERCU_WAVE_CS__GFX09;
typedef union SPI_LB_DATA_PERCU_WAVE_HSGS__GFX09       regSPI_LB_DATA_PERCU_WAVE_HSGS__GFX09;
typedef union SPI_LB_DATA_PERCU_WAVE_VSPS__GFX09       regSPI_LB_DATA_PERCU_WAVE_VSPS__GFX09;
typedef union SPI_LB_DATA_REG                          regSPI_LB_DATA_REG;
typedef union SPI_LB_DATA_WAVES                        regSPI_LB_DATA_WAVES;
typedef union SPI_P0_TRAP_SCREEN_GPR_MIN               regSPI_P0_TRAP_SCREEN_GPR_MIN;
typedef union SPI_P0_TRAP_SCREEN_PSBA_HI               regSPI_P0_TRAP_SCREEN_PSBA_HI;
typedef union SPI_P0_TRAP_SCREEN_PSBA_LO               regSPI_P0_TRAP_SCREEN_PSBA_LO;
typedef union SPI_P0_TRAP_SCREEN_PSMA_HI               regSPI_P0_TRAP_SCREEN_PSMA_HI;
typedef union SPI_P0_TRAP_SCREEN_PSMA_LO               regSPI_P0_TRAP_SCREEN_PSMA_LO;
typedef union SPI_P1_TRAP_SCREEN_GPR_MIN               regSPI_P1_TRAP_SCREEN_GPR_MIN;
typedef union SPI_P1_TRAP_SCREEN_PSBA_HI               regSPI_P1_TRAP_SCREEN_PSBA_HI;
typedef union SPI_P1_TRAP_SCREEN_PSBA_LO               regSPI_P1_TRAP_SCREEN_PSBA_LO;
typedef union SPI_P1_TRAP_SCREEN_PSMA_HI               regSPI_P1_TRAP_SCREEN_PSMA_HI;
typedef union SPI_P1_TRAP_SCREEN_PSMA_LO               regSPI_P1_TRAP_SCREEN_PSMA_LO;
typedef union SPI_PERFCOUNTER0_HI                      regSPI_PERFCOUNTER0_HI;
typedef union SPI_PERFCOUNTER0_LO                      regSPI_PERFCOUNTER0_LO;
typedef union SPI_PERFCOUNTER0_SELECT                  regSPI_PERFCOUNTER0_SELECT;
typedef union SPI_PERFCOUNTER0_SELECT1                 regSPI_PERFCOUNTER0_SELECT1;
typedef union SPI_PERFCOUNTER1_HI                      regSPI_PERFCOUNTER1_HI;
typedef union SPI_PERFCOUNTER1_LO                      regSPI_PERFCOUNTER1_LO;
typedef union SPI_PERFCOUNTER1_SELECT                  regSPI_PERFCOUNTER1_SELECT;
typedef union SPI_PERFCOUNTER1_SELECT1                 regSPI_PERFCOUNTER1_SELECT1;
typedef union SPI_PERFCOUNTER2_HI                      regSPI_PERFCOUNTER2_HI;
typedef union SPI_PERFCOUNTER2_LO                      regSPI_PERFCOUNTER2_LO;
typedef union SPI_PERFCOUNTER2_SELECT                  regSPI_PERFCOUNTER2_SELECT;
typedef union SPI_PERFCOUNTER2_SELECT1                 regSPI_PERFCOUNTER2_SELECT1;
typedef union SPI_PERFCOUNTER3_HI                      regSPI_PERFCOUNTER3_HI;
typedef union SPI_PERFCOUNTER3_LO                      regSPI_PERFCOUNTER3_LO;
typedef union SPI_PERFCOUNTER3_SELECT                  regSPI_PERFCOUNTER3_SELECT;
typedef union SPI_PERFCOUNTER3_SELECT1                 regSPI_PERFCOUNTER3_SELECT1;
typedef union SPI_PERFCOUNTER4_HI                      regSPI_PERFCOUNTER4_HI;
typedef union SPI_PERFCOUNTER4_LO                      regSPI_PERFCOUNTER4_LO;
typedef union SPI_PERFCOUNTER4_SELECT                  regSPI_PERFCOUNTER4_SELECT;
typedef union SPI_PERFCOUNTER5_HI                      regSPI_PERFCOUNTER5_HI;
typedef union SPI_PERFCOUNTER5_LO                      regSPI_PERFCOUNTER5_LO;
typedef union SPI_PERFCOUNTER5_SELECT                  regSPI_PERFCOUNTER5_SELECT;
typedef union SPI_PERFCOUNTER_BINS                     regSPI_PERFCOUNTER_BINS;
typedef union SPI_PG_ENABLE_STATIC_CU_MASK__GFX09      regSPI_PG_ENABLE_STATIC_CU_MASK__GFX09;
typedef union SPI_PS_INPUT_ADDR                        regSPI_PS_INPUT_ADDR;
typedef union SPI_PS_INPUT_CNTL_0                      regSPI_PS_INPUT_CNTL_0;
typedef union SPI_PS_INPUT_CNTL_1                      regSPI_PS_INPUT_CNTL_1;
typedef union SPI_PS_INPUT_CNTL_10                     regSPI_PS_INPUT_CNTL_10;
typedef union SPI_PS_INPUT_CNTL_11                     regSPI_PS_INPUT_CNTL_11;
typedef union SPI_PS_INPUT_CNTL_12                     regSPI_PS_INPUT_CNTL_12;
typedef union SPI_PS_INPUT_CNTL_13                     regSPI_PS_INPUT_CNTL_13;
typedef union SPI_PS_INPUT_CNTL_14                     regSPI_PS_INPUT_CNTL_14;
typedef union SPI_PS_INPUT_CNTL_15                     regSPI_PS_INPUT_CNTL_15;
typedef union SPI_PS_INPUT_CNTL_16                     regSPI_PS_INPUT_CNTL_16;
typedef union SPI_PS_INPUT_CNTL_17                     regSPI_PS_INPUT_CNTL_17;
typedef union SPI_PS_INPUT_CNTL_18                     regSPI_PS_INPUT_CNTL_18;
typedef union SPI_PS_INPUT_CNTL_19                     regSPI_PS_INPUT_CNTL_19;
typedef union SPI_PS_INPUT_CNTL_2                      regSPI_PS_INPUT_CNTL_2;
typedef union SPI_PS_INPUT_CNTL_20                     regSPI_PS_INPUT_CNTL_20;
typedef union SPI_PS_INPUT_CNTL_21                     regSPI_PS_INPUT_CNTL_21;
typedef union SPI_PS_INPUT_CNTL_22                     regSPI_PS_INPUT_CNTL_22;
typedef union SPI_PS_INPUT_CNTL_23                     regSPI_PS_INPUT_CNTL_23;
typedef union SPI_PS_INPUT_CNTL_24                     regSPI_PS_INPUT_CNTL_24;
typedef union SPI_PS_INPUT_CNTL_25                     regSPI_PS_INPUT_CNTL_25;
typedef union SPI_PS_INPUT_CNTL_26                     regSPI_PS_INPUT_CNTL_26;
typedef union SPI_PS_INPUT_CNTL_27                     regSPI_PS_INPUT_CNTL_27;
typedef union SPI_PS_INPUT_CNTL_28                     regSPI_PS_INPUT_CNTL_28;
typedef union SPI_PS_INPUT_CNTL_29                     regSPI_PS_INPUT_CNTL_29;
typedef union SPI_PS_INPUT_CNTL_3                      regSPI_PS_INPUT_CNTL_3;
typedef union SPI_PS_INPUT_CNTL_30                     regSPI_PS_INPUT_CNTL_30;
typedef union SPI_PS_INPUT_CNTL_31                     regSPI_PS_INPUT_CNTL_31;
typedef union SPI_PS_INPUT_CNTL_4                      regSPI_PS_INPUT_CNTL_4;
typedef union SPI_PS_INPUT_CNTL_5                      regSPI_PS_INPUT_CNTL_5;
typedef union SPI_PS_INPUT_CNTL_6                      regSPI_PS_INPUT_CNTL_6;
typedef union SPI_PS_INPUT_CNTL_7                      regSPI_PS_INPUT_CNTL_7;
typedef union SPI_PS_INPUT_CNTL_8                      regSPI_PS_INPUT_CNTL_8;
typedef union SPI_PS_INPUT_CNTL_9                      regSPI_PS_INPUT_CNTL_9;
typedef union SPI_PS_INPUT_ENA                         regSPI_PS_INPUT_ENA;
typedef union SPI_PS_IN_CONTROL                        regSPI_PS_IN_CONTROL;
typedef union SPI_PS_MAX_WAVE_ID                       regSPI_PS_MAX_WAVE_ID;
typedef union SPI_RESET_DEBUG                          regSPI_RESET_DEBUG;
typedef union SPI_RESOURCE_RESERVE_CU_0                regSPI_RESOURCE_RESERVE_CU_0;
typedef union SPI_RESOURCE_RESERVE_CU_1                regSPI_RESOURCE_RESERVE_CU_1;
typedef union SPI_RESOURCE_RESERVE_CU_10               regSPI_RESOURCE_RESERVE_CU_10;
typedef union SPI_RESOURCE_RESERVE_CU_11               regSPI_RESOURCE_RESERVE_CU_11;
typedef union SPI_RESOURCE_RESERVE_CU_12               regSPI_RESOURCE_RESERVE_CU_12;
typedef union SPI_RESOURCE_RESERVE_CU_13               regSPI_RESOURCE_RESERVE_CU_13;
typedef union SPI_RESOURCE_RESERVE_CU_14               regSPI_RESOURCE_RESERVE_CU_14;
typedef union SPI_RESOURCE_RESERVE_CU_15               regSPI_RESOURCE_RESERVE_CU_15;
typedef union SPI_RESOURCE_RESERVE_CU_2                regSPI_RESOURCE_RESERVE_CU_2;
typedef union SPI_RESOURCE_RESERVE_CU_3                regSPI_RESOURCE_RESERVE_CU_3;
typedef union SPI_RESOURCE_RESERVE_CU_4                regSPI_RESOURCE_RESERVE_CU_4;
typedef union SPI_RESOURCE_RESERVE_CU_5                regSPI_RESOURCE_RESERVE_CU_5;
typedef union SPI_RESOURCE_RESERVE_CU_6                regSPI_RESOURCE_RESERVE_CU_6;
typedef union SPI_RESOURCE_RESERVE_CU_7                regSPI_RESOURCE_RESERVE_CU_7;
typedef union SPI_RESOURCE_RESERVE_CU_8                regSPI_RESOURCE_RESERVE_CU_8;
typedef union SPI_RESOURCE_RESERVE_CU_9                regSPI_RESOURCE_RESERVE_CU_9;
typedef union SPI_RESOURCE_RESERVE_EN_CU_0             regSPI_RESOURCE_RESERVE_EN_CU_0;
typedef union SPI_RESOURCE_RESERVE_EN_CU_1             regSPI_RESOURCE_RESERVE_EN_CU_1;
typedef union SPI_RESOURCE_RESERVE_EN_CU_10            regSPI_RESOURCE_RESERVE_EN_CU_10;
typedef union SPI_RESOURCE_RESERVE_EN_CU_11            regSPI_RESOURCE_RESERVE_EN_CU_11;
typedef union SPI_RESOURCE_RESERVE_EN_CU_12            regSPI_RESOURCE_RESERVE_EN_CU_12;
typedef union SPI_RESOURCE_RESERVE_EN_CU_13            regSPI_RESOURCE_RESERVE_EN_CU_13;
typedef union SPI_RESOURCE_RESERVE_EN_CU_14            regSPI_RESOURCE_RESERVE_EN_CU_14;
typedef union SPI_RESOURCE_RESERVE_EN_CU_15            regSPI_RESOURCE_RESERVE_EN_CU_15;
typedef union SPI_RESOURCE_RESERVE_EN_CU_2             regSPI_RESOURCE_RESERVE_EN_CU_2;
typedef union SPI_RESOURCE_RESERVE_EN_CU_3             regSPI_RESOURCE_RESERVE_EN_CU_3;
typedef union SPI_RESOURCE_RESERVE_EN_CU_4             regSPI_RESOURCE_RESERVE_EN_CU_4;
typedef union SPI_RESOURCE_RESERVE_EN_CU_5             regSPI_RESOURCE_RESERVE_EN_CU_5;
typedef union SPI_RESOURCE_RESERVE_EN_CU_6             regSPI_RESOURCE_RESERVE_EN_CU_6;
typedef union SPI_RESOURCE_RESERVE_EN_CU_7             regSPI_RESOURCE_RESERVE_EN_CU_7;
typedef union SPI_RESOURCE_RESERVE_EN_CU_8             regSPI_RESOURCE_RESERVE_EN_CU_8;
typedef union SPI_RESOURCE_RESERVE_EN_CU_9             regSPI_RESOURCE_RESERVE_EN_CU_9;
typedef union SPI_SHADER_COL_FORMAT                    regSPI_SHADER_COL_FORMAT;
typedef union SPI_SHADER_LATE_ALLOC_VS                 regSPI_SHADER_LATE_ALLOC_VS;
typedef union SPI_SHADER_PGM_HI_ES                     regSPI_SHADER_PGM_HI_ES;
typedef union SPI_SHADER_PGM_HI_GS                     regSPI_SHADER_PGM_HI_GS;
typedef union SPI_SHADER_PGM_HI_HS                     regSPI_SHADER_PGM_HI_HS;
typedef union SPI_SHADER_PGM_HI_LS                     regSPI_SHADER_PGM_HI_LS;
typedef union SPI_SHADER_PGM_HI_PS                     regSPI_SHADER_PGM_HI_PS;
typedef union SPI_SHADER_PGM_HI_VS                     regSPI_SHADER_PGM_HI_VS;
typedef union SPI_SHADER_PGM_LO_ES                     regSPI_SHADER_PGM_LO_ES;
typedef union SPI_SHADER_PGM_LO_GS                     regSPI_SHADER_PGM_LO_GS;
typedef union SPI_SHADER_PGM_LO_HS                     regSPI_SHADER_PGM_LO_HS;
typedef union SPI_SHADER_PGM_LO_LS                     regSPI_SHADER_PGM_LO_LS;
typedef union SPI_SHADER_PGM_LO_PS                     regSPI_SHADER_PGM_LO_PS;
typedef union SPI_SHADER_PGM_LO_VS                     regSPI_SHADER_PGM_LO_VS;
typedef union SPI_SHADER_PGM_RSRC1_GS                  regSPI_SHADER_PGM_RSRC1_GS;
typedef union SPI_SHADER_PGM_RSRC1_HS                  regSPI_SHADER_PGM_RSRC1_HS;
typedef union SPI_SHADER_PGM_RSRC1_PS                  regSPI_SHADER_PGM_RSRC1_PS;
typedef union SPI_SHADER_PGM_RSRC1_VS                  regSPI_SHADER_PGM_RSRC1_VS;
typedef union SPI_SHADER_PGM_RSRC2_GS__GFX09           regSPI_SHADER_PGM_RSRC2_GS__GFX09;
typedef union SPI_SHADER_PGM_RSRC2_GS_VS               regSPI_SHADER_PGM_RSRC2_GS_VS;
typedef union SPI_SHADER_PGM_RSRC2_HS__GFX09           regSPI_SHADER_PGM_RSRC2_HS__GFX09;
typedef union SPI_SHADER_PGM_RSRC2_PS__GFX09           regSPI_SHADER_PGM_RSRC2_PS__GFX09;
typedef union SPI_SHADER_PGM_RSRC2_VS__GFX09           regSPI_SHADER_PGM_RSRC2_VS__GFX09;
typedef union SPI_SHADER_PGM_RSRC3_GS__GFX09           regSPI_SHADER_PGM_RSRC3_GS__GFX09;
typedef union SPI_SHADER_PGM_RSRC3_HS__GFX09           regSPI_SHADER_PGM_RSRC3_HS__GFX09;
typedef union SPI_SHADER_PGM_RSRC3_PS                  regSPI_SHADER_PGM_RSRC3_PS;
typedef union SPI_SHADER_PGM_RSRC3_VS                  regSPI_SHADER_PGM_RSRC3_VS;
typedef union SPI_SHADER_PGM_RSRC4_GS__GFX09           regSPI_SHADER_PGM_RSRC4_GS__GFX09;
typedef union SPI_SHADER_PGM_RSRC4_HS__GFX09           regSPI_SHADER_PGM_RSRC4_HS__GFX09;
typedef union SPI_SHADER_POS_FORMAT                    regSPI_SHADER_POS_FORMAT;
typedef union SPI_SHADER_USER_DATA_ADDR_HI_GS          regSPI_SHADER_USER_DATA_ADDR_HI_GS;
typedef union SPI_SHADER_USER_DATA_ADDR_HI_HS          regSPI_SHADER_USER_DATA_ADDR_HI_HS;
typedef union SPI_SHADER_USER_DATA_ADDR_LO_GS          regSPI_SHADER_USER_DATA_ADDR_LO_GS;
typedef union SPI_SHADER_USER_DATA_ADDR_LO_HS          regSPI_SHADER_USER_DATA_ADDR_LO_HS;
typedef union SPI_SHADER_USER_DATA_COMMON_0__GFX09     regSPI_SHADER_USER_DATA_COMMON_0__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_1__GFX09     regSPI_SHADER_USER_DATA_COMMON_1__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_10__GFX09    regSPI_SHADER_USER_DATA_COMMON_10__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_11__GFX09    regSPI_SHADER_USER_DATA_COMMON_11__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_12__GFX09    regSPI_SHADER_USER_DATA_COMMON_12__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_13__GFX09    regSPI_SHADER_USER_DATA_COMMON_13__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_14__GFX09    regSPI_SHADER_USER_DATA_COMMON_14__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_15__GFX09    regSPI_SHADER_USER_DATA_COMMON_15__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_16__GFX09    regSPI_SHADER_USER_DATA_COMMON_16__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_17__GFX09    regSPI_SHADER_USER_DATA_COMMON_17__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_18__GFX09    regSPI_SHADER_USER_DATA_COMMON_18__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_19__GFX09    regSPI_SHADER_USER_DATA_COMMON_19__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_2__GFX09     regSPI_SHADER_USER_DATA_COMMON_2__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_20__GFX09    regSPI_SHADER_USER_DATA_COMMON_20__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_21__GFX09    regSPI_SHADER_USER_DATA_COMMON_21__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_22__GFX09    regSPI_SHADER_USER_DATA_COMMON_22__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_23__GFX09    regSPI_SHADER_USER_DATA_COMMON_23__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_24__GFX09    regSPI_SHADER_USER_DATA_COMMON_24__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_25__GFX09    regSPI_SHADER_USER_DATA_COMMON_25__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_26__GFX09    regSPI_SHADER_USER_DATA_COMMON_26__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_27__GFX09    regSPI_SHADER_USER_DATA_COMMON_27__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_28__GFX09    regSPI_SHADER_USER_DATA_COMMON_28__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_29__GFX09    regSPI_SHADER_USER_DATA_COMMON_29__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_3__GFX09     regSPI_SHADER_USER_DATA_COMMON_3__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_30__GFX09    regSPI_SHADER_USER_DATA_COMMON_30__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_31__GFX09    regSPI_SHADER_USER_DATA_COMMON_31__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_4__GFX09     regSPI_SHADER_USER_DATA_COMMON_4__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_5__GFX09     regSPI_SHADER_USER_DATA_COMMON_5__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_6__GFX09     regSPI_SHADER_USER_DATA_COMMON_6__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_7__GFX09     regSPI_SHADER_USER_DATA_COMMON_7__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_8__GFX09     regSPI_SHADER_USER_DATA_COMMON_8__GFX09;
typedef union SPI_SHADER_USER_DATA_COMMON_9__GFX09     regSPI_SHADER_USER_DATA_COMMON_9__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_0                regSPI_SHADER_USER_DATA_ES_0;
typedef union SPI_SHADER_USER_DATA_ES_1                regSPI_SHADER_USER_DATA_ES_1;
typedef union SPI_SHADER_USER_DATA_ES_10               regSPI_SHADER_USER_DATA_ES_10;
typedef union SPI_SHADER_USER_DATA_ES_11               regSPI_SHADER_USER_DATA_ES_11;
typedef union SPI_SHADER_USER_DATA_ES_12               regSPI_SHADER_USER_DATA_ES_12;
typedef union SPI_SHADER_USER_DATA_ES_13               regSPI_SHADER_USER_DATA_ES_13;
typedef union SPI_SHADER_USER_DATA_ES_14               regSPI_SHADER_USER_DATA_ES_14;
typedef union SPI_SHADER_USER_DATA_ES_15               regSPI_SHADER_USER_DATA_ES_15;
typedef union SPI_SHADER_USER_DATA_ES_16__GFX09        regSPI_SHADER_USER_DATA_ES_16__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_17__GFX09        regSPI_SHADER_USER_DATA_ES_17__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_18__GFX09        regSPI_SHADER_USER_DATA_ES_18__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_19__GFX09        regSPI_SHADER_USER_DATA_ES_19__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_2                regSPI_SHADER_USER_DATA_ES_2;
typedef union SPI_SHADER_USER_DATA_ES_20__GFX09        regSPI_SHADER_USER_DATA_ES_20__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_21__GFX09        regSPI_SHADER_USER_DATA_ES_21__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_22__GFX09        regSPI_SHADER_USER_DATA_ES_22__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_23__GFX09        regSPI_SHADER_USER_DATA_ES_23__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_24__GFX09        regSPI_SHADER_USER_DATA_ES_24__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_25__GFX09        regSPI_SHADER_USER_DATA_ES_25__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_26__GFX09        regSPI_SHADER_USER_DATA_ES_26__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_27__GFX09        regSPI_SHADER_USER_DATA_ES_27__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_28__GFX09        regSPI_SHADER_USER_DATA_ES_28__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_29__GFX09        regSPI_SHADER_USER_DATA_ES_29__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_3                regSPI_SHADER_USER_DATA_ES_3;
typedef union SPI_SHADER_USER_DATA_ES_30__GFX09        regSPI_SHADER_USER_DATA_ES_30__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_31__GFX09        regSPI_SHADER_USER_DATA_ES_31__GFX09;
typedef union SPI_SHADER_USER_DATA_ES_4                regSPI_SHADER_USER_DATA_ES_4;
typedef union SPI_SHADER_USER_DATA_ES_5                regSPI_SHADER_USER_DATA_ES_5;
typedef union SPI_SHADER_USER_DATA_ES_6                regSPI_SHADER_USER_DATA_ES_6;
typedef union SPI_SHADER_USER_DATA_ES_7                regSPI_SHADER_USER_DATA_ES_7;
typedef union SPI_SHADER_USER_DATA_ES_8                regSPI_SHADER_USER_DATA_ES_8;
typedef union SPI_SHADER_USER_DATA_ES_9                regSPI_SHADER_USER_DATA_ES_9;
typedef union SPI_SHADER_USER_DATA_LS_0                regSPI_SHADER_USER_DATA_LS_0;
typedef union SPI_SHADER_USER_DATA_LS_1                regSPI_SHADER_USER_DATA_LS_1;
typedef union SPI_SHADER_USER_DATA_LS_10               regSPI_SHADER_USER_DATA_LS_10;
typedef union SPI_SHADER_USER_DATA_LS_11               regSPI_SHADER_USER_DATA_LS_11;
typedef union SPI_SHADER_USER_DATA_LS_12               regSPI_SHADER_USER_DATA_LS_12;
typedef union SPI_SHADER_USER_DATA_LS_13               regSPI_SHADER_USER_DATA_LS_13;
typedef union SPI_SHADER_USER_DATA_LS_14               regSPI_SHADER_USER_DATA_LS_14;
typedef union SPI_SHADER_USER_DATA_LS_15               regSPI_SHADER_USER_DATA_LS_15;
typedef union SPI_SHADER_USER_DATA_LS_16__GFX09        regSPI_SHADER_USER_DATA_LS_16__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_17__GFX09        regSPI_SHADER_USER_DATA_LS_17__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_18__GFX09        regSPI_SHADER_USER_DATA_LS_18__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_19__GFX09        regSPI_SHADER_USER_DATA_LS_19__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_2                regSPI_SHADER_USER_DATA_LS_2;
typedef union SPI_SHADER_USER_DATA_LS_20__GFX09        regSPI_SHADER_USER_DATA_LS_20__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_21__GFX09        regSPI_SHADER_USER_DATA_LS_21__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_22__GFX09        regSPI_SHADER_USER_DATA_LS_22__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_23__GFX09        regSPI_SHADER_USER_DATA_LS_23__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_24__GFX09        regSPI_SHADER_USER_DATA_LS_24__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_25__GFX09        regSPI_SHADER_USER_DATA_LS_25__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_26__GFX09        regSPI_SHADER_USER_DATA_LS_26__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_27__GFX09        regSPI_SHADER_USER_DATA_LS_27__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_28__GFX09        regSPI_SHADER_USER_DATA_LS_28__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_29__GFX09        regSPI_SHADER_USER_DATA_LS_29__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_3                regSPI_SHADER_USER_DATA_LS_3;
typedef union SPI_SHADER_USER_DATA_LS_30__GFX09        regSPI_SHADER_USER_DATA_LS_30__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_31__GFX09        regSPI_SHADER_USER_DATA_LS_31__GFX09;
typedef union SPI_SHADER_USER_DATA_LS_4                regSPI_SHADER_USER_DATA_LS_4;
typedef union SPI_SHADER_USER_DATA_LS_5                regSPI_SHADER_USER_DATA_LS_5;
typedef union SPI_SHADER_USER_DATA_LS_6                regSPI_SHADER_USER_DATA_LS_6;
typedef union SPI_SHADER_USER_DATA_LS_7                regSPI_SHADER_USER_DATA_LS_7;
typedef union SPI_SHADER_USER_DATA_LS_8                regSPI_SHADER_USER_DATA_LS_8;
typedef union SPI_SHADER_USER_DATA_LS_9                regSPI_SHADER_USER_DATA_LS_9;
typedef union SPI_SHADER_USER_DATA_PS_0                regSPI_SHADER_USER_DATA_PS_0;
typedef union SPI_SHADER_USER_DATA_PS_1                regSPI_SHADER_USER_DATA_PS_1;
typedef union SPI_SHADER_USER_DATA_PS_10               regSPI_SHADER_USER_DATA_PS_10;
typedef union SPI_SHADER_USER_DATA_PS_11               regSPI_SHADER_USER_DATA_PS_11;
typedef union SPI_SHADER_USER_DATA_PS_12               regSPI_SHADER_USER_DATA_PS_12;
typedef union SPI_SHADER_USER_DATA_PS_13               regSPI_SHADER_USER_DATA_PS_13;
typedef union SPI_SHADER_USER_DATA_PS_14               regSPI_SHADER_USER_DATA_PS_14;
typedef union SPI_SHADER_USER_DATA_PS_15               regSPI_SHADER_USER_DATA_PS_15;
typedef union SPI_SHADER_USER_DATA_PS_16               regSPI_SHADER_USER_DATA_PS_16;
typedef union SPI_SHADER_USER_DATA_PS_17               regSPI_SHADER_USER_DATA_PS_17;
typedef union SPI_SHADER_USER_DATA_PS_18               regSPI_SHADER_USER_DATA_PS_18;
typedef union SPI_SHADER_USER_DATA_PS_19               regSPI_SHADER_USER_DATA_PS_19;
typedef union SPI_SHADER_USER_DATA_PS_2                regSPI_SHADER_USER_DATA_PS_2;
typedef union SPI_SHADER_USER_DATA_PS_20               regSPI_SHADER_USER_DATA_PS_20;
typedef union SPI_SHADER_USER_DATA_PS_21               regSPI_SHADER_USER_DATA_PS_21;
typedef union SPI_SHADER_USER_DATA_PS_22               regSPI_SHADER_USER_DATA_PS_22;
typedef union SPI_SHADER_USER_DATA_PS_23               regSPI_SHADER_USER_DATA_PS_23;
typedef union SPI_SHADER_USER_DATA_PS_24               regSPI_SHADER_USER_DATA_PS_24;
typedef union SPI_SHADER_USER_DATA_PS_25               regSPI_SHADER_USER_DATA_PS_25;
typedef union SPI_SHADER_USER_DATA_PS_26               regSPI_SHADER_USER_DATA_PS_26;
typedef union SPI_SHADER_USER_DATA_PS_27               regSPI_SHADER_USER_DATA_PS_27;
typedef union SPI_SHADER_USER_DATA_PS_28               regSPI_SHADER_USER_DATA_PS_28;
typedef union SPI_SHADER_USER_DATA_PS_29               regSPI_SHADER_USER_DATA_PS_29;
typedef union SPI_SHADER_USER_DATA_PS_3                regSPI_SHADER_USER_DATA_PS_3;
typedef union SPI_SHADER_USER_DATA_PS_30               regSPI_SHADER_USER_DATA_PS_30;
typedef union SPI_SHADER_USER_DATA_PS_31               regSPI_SHADER_USER_DATA_PS_31;
typedef union SPI_SHADER_USER_DATA_PS_4                regSPI_SHADER_USER_DATA_PS_4;
typedef union SPI_SHADER_USER_DATA_PS_5                regSPI_SHADER_USER_DATA_PS_5;
typedef union SPI_SHADER_USER_DATA_PS_6                regSPI_SHADER_USER_DATA_PS_6;
typedef union SPI_SHADER_USER_DATA_PS_7                regSPI_SHADER_USER_DATA_PS_7;
typedef union SPI_SHADER_USER_DATA_PS_8                regSPI_SHADER_USER_DATA_PS_8;
typedef union SPI_SHADER_USER_DATA_PS_9                regSPI_SHADER_USER_DATA_PS_9;
typedef union SPI_SHADER_USER_DATA_VS_0                regSPI_SHADER_USER_DATA_VS_0;
typedef union SPI_SHADER_USER_DATA_VS_1                regSPI_SHADER_USER_DATA_VS_1;
typedef union SPI_SHADER_USER_DATA_VS_10               regSPI_SHADER_USER_DATA_VS_10;
typedef union SPI_SHADER_USER_DATA_VS_11               regSPI_SHADER_USER_DATA_VS_11;
typedef union SPI_SHADER_USER_DATA_VS_12               regSPI_SHADER_USER_DATA_VS_12;
typedef union SPI_SHADER_USER_DATA_VS_13               regSPI_SHADER_USER_DATA_VS_13;
typedef union SPI_SHADER_USER_DATA_VS_14               regSPI_SHADER_USER_DATA_VS_14;
typedef union SPI_SHADER_USER_DATA_VS_15               regSPI_SHADER_USER_DATA_VS_15;
typedef union SPI_SHADER_USER_DATA_VS_16               regSPI_SHADER_USER_DATA_VS_16;
typedef union SPI_SHADER_USER_DATA_VS_17               regSPI_SHADER_USER_DATA_VS_17;
typedef union SPI_SHADER_USER_DATA_VS_18               regSPI_SHADER_USER_DATA_VS_18;
typedef union SPI_SHADER_USER_DATA_VS_19               regSPI_SHADER_USER_DATA_VS_19;
typedef union SPI_SHADER_USER_DATA_VS_2                regSPI_SHADER_USER_DATA_VS_2;
typedef union SPI_SHADER_USER_DATA_VS_20               regSPI_SHADER_USER_DATA_VS_20;
typedef union SPI_SHADER_USER_DATA_VS_21               regSPI_SHADER_USER_DATA_VS_21;
typedef union SPI_SHADER_USER_DATA_VS_22               regSPI_SHADER_USER_DATA_VS_22;
typedef union SPI_SHADER_USER_DATA_VS_23               regSPI_SHADER_USER_DATA_VS_23;
typedef union SPI_SHADER_USER_DATA_VS_24               regSPI_SHADER_USER_DATA_VS_24;
typedef union SPI_SHADER_USER_DATA_VS_25               regSPI_SHADER_USER_DATA_VS_25;
typedef union SPI_SHADER_USER_DATA_VS_26               regSPI_SHADER_USER_DATA_VS_26;
typedef union SPI_SHADER_USER_DATA_VS_27               regSPI_SHADER_USER_DATA_VS_27;
typedef union SPI_SHADER_USER_DATA_VS_28               regSPI_SHADER_USER_DATA_VS_28;
typedef union SPI_SHADER_USER_DATA_VS_29               regSPI_SHADER_USER_DATA_VS_29;
typedef union SPI_SHADER_USER_DATA_VS_3                regSPI_SHADER_USER_DATA_VS_3;
typedef union SPI_SHADER_USER_DATA_VS_30               regSPI_SHADER_USER_DATA_VS_30;
typedef union SPI_SHADER_USER_DATA_VS_31               regSPI_SHADER_USER_DATA_VS_31;
typedef union SPI_SHADER_USER_DATA_VS_4                regSPI_SHADER_USER_DATA_VS_4;
typedef union SPI_SHADER_USER_DATA_VS_5                regSPI_SHADER_USER_DATA_VS_5;
typedef union SPI_SHADER_USER_DATA_VS_6                regSPI_SHADER_USER_DATA_VS_6;
typedef union SPI_SHADER_USER_DATA_VS_7                regSPI_SHADER_USER_DATA_VS_7;
typedef union SPI_SHADER_USER_DATA_VS_8                regSPI_SHADER_USER_DATA_VS_8;
typedef union SPI_SHADER_USER_DATA_VS_9                regSPI_SHADER_USER_DATA_VS_9;
typedef union SPI_SHADER_Z_FORMAT                      regSPI_SHADER_Z_FORMAT;
typedef union SPI_START_PHASE__GFX09                   regSPI_START_PHASE__GFX09;
typedef union SPI_SX_EXPORT_BUFFER_SIZES               regSPI_SX_EXPORT_BUFFER_SIZES;
typedef union SPI_SX_SCOREBOARD_BUFFER_SIZES           regSPI_SX_SCOREBOARD_BUFFER_SIZES;
typedef union SPI_TMPRING_SIZE                         regSPI_TMPRING_SIZE;
typedef union SPI_VS_OUT_CONFIG                        regSPI_VS_OUT_CONFIG;
typedef union SPI_WCL_PIPE_PERCENT_CS0                 regSPI_WCL_PIPE_PERCENT_CS0;
typedef union SPI_WCL_PIPE_PERCENT_CS1                 regSPI_WCL_PIPE_PERCENT_CS1;
typedef union SPI_WCL_PIPE_PERCENT_CS2                 regSPI_WCL_PIPE_PERCENT_CS2;
typedef union SPI_WCL_PIPE_PERCENT_CS3                 regSPI_WCL_PIPE_PERCENT_CS3;
typedef union SPI_WCL_PIPE_PERCENT_CS4                 regSPI_WCL_PIPE_PERCENT_CS4;
typedef union SPI_WCL_PIPE_PERCENT_CS5                 regSPI_WCL_PIPE_PERCENT_CS5;
typedef union SPI_WCL_PIPE_PERCENT_CS6                 regSPI_WCL_PIPE_PERCENT_CS6;
typedef union SPI_WCL_PIPE_PERCENT_CS7                 regSPI_WCL_PIPE_PERCENT_CS7;
typedef union SPI_WCL_PIPE_PERCENT_GFX                 regSPI_WCL_PIPE_PERCENT_GFX;
typedef union SPI_WCL_PIPE_PERCENT_HP3D                regSPI_WCL_PIPE_PERCENT_HP3D;
typedef union SPI_WF_LIFETIME_CNTL                     regSPI_WF_LIFETIME_CNTL;
typedef union SPI_WF_LIFETIME_DEBUG                    regSPI_WF_LIFETIME_DEBUG;
typedef union SPI_WF_LIFETIME_LIMIT_0                  regSPI_WF_LIFETIME_LIMIT_0;
typedef union SPI_WF_LIFETIME_LIMIT_1                  regSPI_WF_LIFETIME_LIMIT_1;
typedef union SPI_WF_LIFETIME_LIMIT_2                  regSPI_WF_LIFETIME_LIMIT_2;
typedef union SPI_WF_LIFETIME_LIMIT_3                  regSPI_WF_LIFETIME_LIMIT_3;
typedef union SPI_WF_LIFETIME_LIMIT_4                  regSPI_WF_LIFETIME_LIMIT_4;
typedef union SPI_WF_LIFETIME_LIMIT_5                  regSPI_WF_LIFETIME_LIMIT_5;
typedef union SPI_WF_LIFETIME_LIMIT_6                  regSPI_WF_LIFETIME_LIMIT_6;
typedef union SPI_WF_LIFETIME_LIMIT_7                  regSPI_WF_LIFETIME_LIMIT_7;
typedef union SPI_WF_LIFETIME_LIMIT_8                  regSPI_WF_LIFETIME_LIMIT_8;
typedef union SPI_WF_LIFETIME_LIMIT_9                  regSPI_WF_LIFETIME_LIMIT_9;
typedef union SPI_WF_LIFETIME_STATUS_0                 regSPI_WF_LIFETIME_STATUS_0;
typedef union SPI_WF_LIFETIME_STATUS_1                 regSPI_WF_LIFETIME_STATUS_1;
typedef union SPI_WF_LIFETIME_STATUS_10                regSPI_WF_LIFETIME_STATUS_10;
typedef union SPI_WF_LIFETIME_STATUS_11                regSPI_WF_LIFETIME_STATUS_11;
typedef union SPI_WF_LIFETIME_STATUS_12                regSPI_WF_LIFETIME_STATUS_12;
typedef union SPI_WF_LIFETIME_STATUS_13                regSPI_WF_LIFETIME_STATUS_13;
typedef union SPI_WF_LIFETIME_STATUS_14                regSPI_WF_LIFETIME_STATUS_14;
typedef union SPI_WF_LIFETIME_STATUS_15                regSPI_WF_LIFETIME_STATUS_15;
typedef union SPI_WF_LIFETIME_STATUS_16                regSPI_WF_LIFETIME_STATUS_16;
typedef union SPI_WF_LIFETIME_STATUS_17                regSPI_WF_LIFETIME_STATUS_17;
typedef union SPI_WF_LIFETIME_STATUS_18                regSPI_WF_LIFETIME_STATUS_18;
typedef union SPI_WF_LIFETIME_STATUS_19                regSPI_WF_LIFETIME_STATUS_19;
typedef union SPI_WF_LIFETIME_STATUS_2                 regSPI_WF_LIFETIME_STATUS_2;
typedef union SPI_WF_LIFETIME_STATUS_20                regSPI_WF_LIFETIME_STATUS_20;
typedef union SPI_WF_LIFETIME_STATUS_3                 regSPI_WF_LIFETIME_STATUS_3;
typedef union SPI_WF_LIFETIME_STATUS_4                 regSPI_WF_LIFETIME_STATUS_4;
typedef union SPI_WF_LIFETIME_STATUS_5                 regSPI_WF_LIFETIME_STATUS_5;
typedef union SPI_WF_LIFETIME_STATUS_6                 regSPI_WF_LIFETIME_STATUS_6;
typedef union SPI_WF_LIFETIME_STATUS_7                 regSPI_WF_LIFETIME_STATUS_7;
typedef union SPI_WF_LIFETIME_STATUS_8                 regSPI_WF_LIFETIME_STATUS_8;
typedef union SPI_WF_LIFETIME_STATUS_9                 regSPI_WF_LIFETIME_STATUS_9;
typedef union SQC_CACHES                               regSQC_CACHES;
typedef union SQC_CONFIG                               regSQC_CONFIG;
typedef union SQC_DCACHE_UTCL1_CNTL1__GFX09            regSQC_DCACHE_UTCL1_CNTL1__GFX09;
typedef union SQC_DCACHE_UTCL1_CNTL2__GFX09            regSQC_DCACHE_UTCL1_CNTL2__GFX09;
typedef union SQC_DCACHE_UTCL1_STATUS__GFX09           regSQC_DCACHE_UTCL1_STATUS__GFX09;
typedef union SQC_DSM_CNTL__GFX09                      regSQC_DSM_CNTL__GFX09;
typedef union SQC_DSM_CNTL2__GFX09                     regSQC_DSM_CNTL2__GFX09;
typedef union SQC_DSM_CNTL2A__GFX09                    regSQC_DSM_CNTL2A__GFX09;
typedef union SQC_DSM_CNTL2B__GFX09                    regSQC_DSM_CNTL2B__GFX09;
typedef union SQC_DSM_CNTLA__GFX09                     regSQC_DSM_CNTLA__GFX09;
typedef union SQC_DSM_CNTLB__GFX09                     regSQC_DSM_CNTLB__GFX09;
typedef union SQC_EDC_CNT__GFX09                       regSQC_EDC_CNT__GFX09;
typedef union SQC_EDC_CNT2__GFX09                      regSQC_EDC_CNT2__GFX09;
typedef union SQC_EDC_CNT3__GFX09                      regSQC_EDC_CNT3__GFX09;
typedef union SQC_EDC_FUE_CNTL__GFX09                  regSQC_EDC_FUE_CNTL__GFX09;
typedef union SQC_ICACHE_UTCL1_CNTL1__GFX09            regSQC_ICACHE_UTCL1_CNTL1__GFX09;
typedef union SQC_ICACHE_UTCL1_CNTL2__GFX09            regSQC_ICACHE_UTCL1_CNTL2__GFX09;
typedef union SQC_ICACHE_UTCL1_STATUS__GFX09           regSQC_ICACHE_UTCL1_STATUS__GFX09;
typedef union SQC_WRITEBACK                            regSQC_WRITEBACK;
typedef union SQ_ALU_CLK_CTRL__GFX09                   regSQ_ALU_CLK_CTRL__GFX09;
typedef union SQ_BUF_RSRC_WORD0__GFX09                 regSQ_BUF_RSRC_WORD0__GFX09;
typedef union SQ_BUF_RSRC_WORD1__GFX09                 regSQ_BUF_RSRC_WORD1__GFX09;
typedef union SQ_BUF_RSRC_WORD2__GFX09                 regSQ_BUF_RSRC_WORD2__GFX09;
typedef union SQ_BUF_RSRC_WORD3__GFX09                 regSQ_BUF_RSRC_WORD3__GFX09;
typedef union SQ_CMD__GFX09                            regSQ_CMD__GFX09;
typedef union SQ_CMD_TIMESTAMP__GFX09                  regSQ_CMD_TIMESTAMP__GFX09;
typedef union SQ_CONFIG__GFX09                         regSQ_CONFIG__GFX09;
typedef union SQ_DEBUG_CTRL_LOCAL                      regSQ_DEBUG_CTRL_LOCAL;
typedef union SQ_DEBUG_STS_GLOBAL                      regSQ_DEBUG_STS_GLOBAL;
typedef union SQ_DEBUG_STS_LOCAL                       regSQ_DEBUG_STS_LOCAL;
typedef union SQ_DSM_CNTL                              regSQ_DSM_CNTL;
typedef union SQ_DSM_CNTL2                             regSQ_DSM_CNTL2;
typedef union SQ_DS_0__GFX09                           regSQ_DS_0__GFX09;
typedef union SQ_DS_1__GFX09                           regSQ_DS_1__GFX09;
typedef union SQ_EDC_CNT                               regSQ_EDC_CNT;
typedef union SQ_EDC_DED_CNT__GFX09                    regSQ_EDC_DED_CNT__GFX09;
typedef union SQ_EDC_FUE_CNTL                          regSQ_EDC_FUE_CNTL;
typedef union SQ_EDC_INFO__GFX09                       regSQ_EDC_INFO__GFX09;
typedef union SQ_EDC_SEC_CNT__GFX09                    regSQ_EDC_SEC_CNT__GFX09;
typedef union SQ_EXP_0__GFX09                          regSQ_EXP_0__GFX09;
typedef union SQ_EXP_1__GFX09                          regSQ_EXP_1__GFX09;
typedef union SQ_FIFO_SIZES__GFX09                     regSQ_FIFO_SIZES__GFX09;
typedef union SQ_FLAT_0__GFX09                         regSQ_FLAT_0__GFX09;
typedef union SQ_FLAT_1__GFX09                         regSQ_FLAT_1__GFX09;
typedef union SQ_FLAT_SCRATCH_WORD0__GFX09             regSQ_FLAT_SCRATCH_WORD0__GFX09;
typedef union SQ_FLAT_SCRATCH_WORD1__GFX09             regSQ_FLAT_SCRATCH_WORD1__GFX09;
typedef union SQ_GLBL_0__GFX09                         regSQ_GLBL_0__GFX09;
typedef union SQ_GLBL_1__GFX09                         regSQ_GLBL_1__GFX09;
typedef union SQ_IMG_RSRC_WORD0__GFX09                 regSQ_IMG_RSRC_WORD0__GFX09;
typedef union SQ_IMG_RSRC_WORD1__GFX09                 regSQ_IMG_RSRC_WORD1__GFX09;
typedef union SQ_IMG_RSRC_WORD2__GFX09                 regSQ_IMG_RSRC_WORD2__GFX09;
typedef union SQ_IMG_RSRC_WORD3__GFX09                 regSQ_IMG_RSRC_WORD3__GFX09;
typedef union SQ_IMG_RSRC_WORD4__GFX09                 regSQ_IMG_RSRC_WORD4__GFX09;
typedef union SQ_IMG_RSRC_WORD5__GFX09                 regSQ_IMG_RSRC_WORD5__GFX09;
typedef union SQ_IMG_RSRC_WORD6__GFX09                 regSQ_IMG_RSRC_WORD6__GFX09;
typedef union SQ_IMG_RSRC_WORD7__GFX09                 regSQ_IMG_RSRC_WORD7__GFX09;
typedef union SQ_IMG_SAMP_WORD0__GFX09                 regSQ_IMG_SAMP_WORD0__GFX09;
typedef union SQ_IMG_SAMP_WORD1__GFX09                 regSQ_IMG_SAMP_WORD1__GFX09;
typedef union SQ_IMG_SAMP_WORD2__GFX09                 regSQ_IMG_SAMP_WORD2__GFX09;
typedef union SQ_IMG_SAMP_WORD3__GFX09                 regSQ_IMG_SAMP_WORD3__GFX09;
typedef union SQ_IND_DATA                              regSQ_IND_DATA;
typedef union SQ_IND_INDEX__GFX09                      regSQ_IND_INDEX__GFX09;
typedef union SQ_INST__GFX09                           regSQ_INST__GFX09;
typedef union SQ_INTERRUPT_AUTO_MASK                   regSQ_INTERRUPT_AUTO_MASK;
typedef union SQ_INTERRUPT_MSG_CTRL                    regSQ_INTERRUPT_MSG_CTRL;
typedef union SQ_INTERRUPT_WORD_AUTO_CTXID__GFX09      regSQ_INTERRUPT_WORD_AUTO_CTXID__GFX09;
typedef union SQ_INTERRUPT_WORD_AUTO_HI__GFX09         regSQ_INTERRUPT_WORD_AUTO_HI__GFX09;
typedef union SQ_INTERRUPT_WORD_AUTO_LO__GFX09         regSQ_INTERRUPT_WORD_AUTO_LO__GFX09;
typedef union SQ_INTERRUPT_WORD_CMN_CTXID__GFX09       regSQ_INTERRUPT_WORD_CMN_CTXID__GFX09;
typedef union SQ_INTERRUPT_WORD_CMN_HI__GFX09          regSQ_INTERRUPT_WORD_CMN_HI__GFX09;
typedef union SQ_INTERRUPT_WORD_WAVE_CTXID__GFX09      regSQ_INTERRUPT_WORD_WAVE_CTXID__GFX09;
typedef union SQ_INTERRUPT_WORD_WAVE_HI__GFX09         regSQ_INTERRUPT_WORD_WAVE_HI__GFX09;
typedef union SQ_INTERRUPT_WORD_WAVE_LO__GFX09         regSQ_INTERRUPT_WORD_WAVE_LO__GFX09;
typedef union SQ_LB_CTR0_CU__GFX09                     regSQ_LB_CTR0_CU__GFX09;
typedef union SQ_LB_CTR1_CU__GFX09                     regSQ_LB_CTR1_CU__GFX09;
typedef union SQ_LB_CTR2_CU__GFX09                     regSQ_LB_CTR2_CU__GFX09;
typedef union SQ_LB_CTR3_CU__GFX09                     regSQ_LB_CTR3_CU__GFX09;
typedef union SQ_LB_CTR_CTRL                           regSQ_LB_CTR_CTRL;
typedef union SQ_LB_CTR_SEL__GFX09                     regSQ_LB_CTR_SEL__GFX09;
typedef union SQ_LB_DATA0                              regSQ_LB_DATA0;
typedef union SQ_LB_DATA1                              regSQ_LB_DATA1;
typedef union SQ_LB_DATA2                              regSQ_LB_DATA2;
typedef union SQ_LB_DATA3                              regSQ_LB_DATA3;
typedef union SQ_LDS_CLK_CTRL__GFX09                   regSQ_LDS_CLK_CTRL__GFX09;
typedef union SQ_M0_GPR_IDX_WORD__GFX09                regSQ_M0_GPR_IDX_WORD__GFX09;
typedef union SQ_MIMG_0__GFX09                         regSQ_MIMG_0__GFX09;
typedef union SQ_MIMG_1__GFX09                         regSQ_MIMG_1__GFX09;
typedef union SQ_MTBUF_0__GFX09                        regSQ_MTBUF_0__GFX09;
typedef union SQ_MTBUF_1__GFX09                        regSQ_MTBUF_1__GFX09;
typedef union SQ_MUBUF_0__GFX09                        regSQ_MUBUF_0__GFX09;
typedef union SQ_MUBUF_1__GFX09                        regSQ_MUBUF_1__GFX09;
typedef union SQ_PERFCOUNTER0_HI                       regSQ_PERFCOUNTER0_HI;
typedef union SQ_PERFCOUNTER0_LO                       regSQ_PERFCOUNTER0_LO;
typedef union SQ_PERFCOUNTER0_SELECT                   regSQ_PERFCOUNTER0_SELECT;
typedef union SQ_PERFCOUNTER10_HI                      regSQ_PERFCOUNTER10_HI;
typedef union SQ_PERFCOUNTER10_LO                      regSQ_PERFCOUNTER10_LO;
typedef union SQ_PERFCOUNTER10_SELECT                  regSQ_PERFCOUNTER10_SELECT;
typedef union SQ_PERFCOUNTER11_HI                      regSQ_PERFCOUNTER11_HI;
typedef union SQ_PERFCOUNTER11_LO                      regSQ_PERFCOUNTER11_LO;
typedef union SQ_PERFCOUNTER11_SELECT                  regSQ_PERFCOUNTER11_SELECT;
typedef union SQ_PERFCOUNTER12_HI                      regSQ_PERFCOUNTER12_HI;
typedef union SQ_PERFCOUNTER12_LO                      regSQ_PERFCOUNTER12_LO;
typedef union SQ_PERFCOUNTER12_SELECT                  regSQ_PERFCOUNTER12_SELECT;
typedef union SQ_PERFCOUNTER13_HI                      regSQ_PERFCOUNTER13_HI;
typedef union SQ_PERFCOUNTER13_LO                      regSQ_PERFCOUNTER13_LO;
typedef union SQ_PERFCOUNTER13_SELECT                  regSQ_PERFCOUNTER13_SELECT;
typedef union SQ_PERFCOUNTER14_HI                      regSQ_PERFCOUNTER14_HI;
typedef union SQ_PERFCOUNTER14_LO                      regSQ_PERFCOUNTER14_LO;
typedef union SQ_PERFCOUNTER14_SELECT                  regSQ_PERFCOUNTER14_SELECT;
typedef union SQ_PERFCOUNTER15_HI                      regSQ_PERFCOUNTER15_HI;
typedef union SQ_PERFCOUNTER15_LO                      regSQ_PERFCOUNTER15_LO;
typedef union SQ_PERFCOUNTER15_SELECT                  regSQ_PERFCOUNTER15_SELECT;
typedef union SQ_PERFCOUNTER1_HI                       regSQ_PERFCOUNTER1_HI;
typedef union SQ_PERFCOUNTER1_LO                       regSQ_PERFCOUNTER1_LO;
typedef union SQ_PERFCOUNTER1_SELECT                   regSQ_PERFCOUNTER1_SELECT;
typedef union SQ_PERFCOUNTER2_HI                       regSQ_PERFCOUNTER2_HI;
typedef union SQ_PERFCOUNTER2_LO                       regSQ_PERFCOUNTER2_LO;
typedef union SQ_PERFCOUNTER2_SELECT                   regSQ_PERFCOUNTER2_SELECT;
typedef union SQ_PERFCOUNTER3_HI                       regSQ_PERFCOUNTER3_HI;
typedef union SQ_PERFCOUNTER3_LO                       regSQ_PERFCOUNTER3_LO;
typedef union SQ_PERFCOUNTER3_SELECT                   regSQ_PERFCOUNTER3_SELECT;
typedef union SQ_PERFCOUNTER4_HI                       regSQ_PERFCOUNTER4_HI;
typedef union SQ_PERFCOUNTER4_LO                       regSQ_PERFCOUNTER4_LO;
typedef union SQ_PERFCOUNTER4_SELECT                   regSQ_PERFCOUNTER4_SELECT;
typedef union SQ_PERFCOUNTER5_HI                       regSQ_PERFCOUNTER5_HI;
typedef union SQ_PERFCOUNTER5_LO                       regSQ_PERFCOUNTER5_LO;
typedef union SQ_PERFCOUNTER5_SELECT                   regSQ_PERFCOUNTER5_SELECT;
typedef union SQ_PERFCOUNTER6_HI                       regSQ_PERFCOUNTER6_HI;
typedef union SQ_PERFCOUNTER6_LO                       regSQ_PERFCOUNTER6_LO;
typedef union SQ_PERFCOUNTER6_SELECT                   regSQ_PERFCOUNTER6_SELECT;
typedef union SQ_PERFCOUNTER7_HI                       regSQ_PERFCOUNTER7_HI;
typedef union SQ_PERFCOUNTER7_LO                       regSQ_PERFCOUNTER7_LO;
typedef union SQ_PERFCOUNTER7_SELECT                   regSQ_PERFCOUNTER7_SELECT;
typedef union SQ_PERFCOUNTER8_HI                       regSQ_PERFCOUNTER8_HI;
typedef union SQ_PERFCOUNTER8_LO                       regSQ_PERFCOUNTER8_LO;
typedef union SQ_PERFCOUNTER8_SELECT                   regSQ_PERFCOUNTER8_SELECT;
typedef union SQ_PERFCOUNTER9_HI                       regSQ_PERFCOUNTER9_HI;
typedef union SQ_PERFCOUNTER9_LO                       regSQ_PERFCOUNTER9_LO;
typedef union SQ_PERFCOUNTER9_SELECT                   regSQ_PERFCOUNTER9_SELECT;
typedef union SQ_PERFCOUNTER_CTRL                      regSQ_PERFCOUNTER_CTRL;
typedef union SQ_PERFCOUNTER_CTRL2                     regSQ_PERFCOUNTER_CTRL2;
typedef union SQ_PERFCOUNTER_MASK__GFX09               regSQ_PERFCOUNTER_MASK__GFX09;
typedef union SQ_POWER_THROTTLE__GFX09                 regSQ_POWER_THROTTLE__GFX09;
typedef union SQ_POWER_THROTTLE2__GFX09                regSQ_POWER_THROTTLE2__GFX09;
typedef union SQ_RANDOM_WAVE_PRI                       regSQ_RANDOM_WAVE_PRI;
typedef union SQ_REG_CREDITS__GFX09                    regSQ_REG_CREDITS__GFX09;
typedef union SQ_REG_TIMESTAMP__GFX09                  regSQ_REG_TIMESTAMP__GFX09;
typedef union SQ_RUNTIME_CONFIG                        regSQ_RUNTIME_CONFIG;
typedef union SQ_SCRATCH_0__GFX09                      regSQ_SCRATCH_0__GFX09;
typedef union SQ_SCRATCH_1__GFX09                      regSQ_SCRATCH_1__GFX09;
typedef union SQ_SHADER_TBA_HI                         regSQ_SHADER_TBA_HI;
typedef union SQ_SHADER_TBA_LO                         regSQ_SHADER_TBA_LO;
typedef union SQ_SHADER_TMA_HI                         regSQ_SHADER_TMA_HI;
typedef union SQ_SHADER_TMA_LO                         regSQ_SHADER_TMA_LO;
typedef union SQ_SMEM_0__GFX09                         regSQ_SMEM_0__GFX09;
typedef union SQ_SMEM_1__GFX09                         regSQ_SMEM_1__GFX09;
typedef union SQ_SOP1__GFX09                           regSQ_SOP1__GFX09;
typedef union SQ_SOP2__GFX09                           regSQ_SOP2__GFX09;
typedef union SQ_SOPC__GFX09                           regSQ_SOPC__GFX09;
typedef union SQ_SOPK__GFX09                           regSQ_SOPK__GFX09;
typedef union SQ_SOPP__GFX09                           regSQ_SOPP__GFX09;
typedef union SQ_TEX_CLK_CTRL__GFX09                   regSQ_TEX_CLK_CTRL__GFX09;
typedef union SQ_THREAD_TRACE_BASE__GFX09              regSQ_THREAD_TRACE_BASE__GFX09;
typedef union SQ_THREAD_TRACE_BASE2__GFX09             regSQ_THREAD_TRACE_BASE2__GFX09;
typedef union SQ_THREAD_TRACE_CNTR__GFX09              regSQ_THREAD_TRACE_CNTR__GFX09;
typedef union SQ_THREAD_TRACE_CTRL__GFX09              regSQ_THREAD_TRACE_CTRL__GFX09;
typedef union SQ_THREAD_TRACE_HIWATER__GFX09           regSQ_THREAD_TRACE_HIWATER__GFX09;
typedef union SQ_THREAD_TRACE_MASK__GFX09              regSQ_THREAD_TRACE_MASK__GFX09;
typedef union SQ_THREAD_TRACE_MODE__GFX09              regSQ_THREAD_TRACE_MODE__GFX09;
typedef union SQ_THREAD_TRACE_PERF_MASK__GFX09         regSQ_THREAD_TRACE_PERF_MASK__GFX09;
typedef union SQ_THREAD_TRACE_SIZE__GFX09              regSQ_THREAD_TRACE_SIZE__GFX09;
typedef union SQ_THREAD_TRACE_STATUS__GFX09            regSQ_THREAD_TRACE_STATUS__GFX09;
typedef union SQ_THREAD_TRACE_TOKEN_MASK__GFX09        regSQ_THREAD_TRACE_TOKEN_MASK__GFX09;
typedef union SQ_THREAD_TRACE_TOKEN_MASK2__GFX09       regSQ_THREAD_TRACE_TOKEN_MASK2__GFX09;
typedef union SQ_THREAD_TRACE_USERDATA_0               regSQ_THREAD_TRACE_USERDATA_0;
typedef union SQ_THREAD_TRACE_USERDATA_1               regSQ_THREAD_TRACE_USERDATA_1;
typedef union SQ_THREAD_TRACE_USERDATA_2               regSQ_THREAD_TRACE_USERDATA_2;
typedef union SQ_THREAD_TRACE_USERDATA_3               regSQ_THREAD_TRACE_USERDATA_3;
typedef union SQ_THREAD_TRACE_WORD_CMN__GFX09          regSQ_THREAD_TRACE_WORD_CMN__GFX09;
typedef union SQ_THREAD_TRACE_WORD_EVENT__GFX09        regSQ_THREAD_TRACE_WORD_EVENT__GFX09;
typedef union SQ_THREAD_TRACE_WORD_INST__GFX09         regSQ_THREAD_TRACE_WORD_INST__GFX09;
typedef union SQ_THREAD_TRACE_WORD_INST_PC_1_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_INST_PC_2_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_ISSUE__GFX09        regSQ_THREAD_TRACE_WORD_ISSUE__GFX09;
typedef union SQ_THREAD_TRACE_WORD_MISC__GFX09         regSQ_THREAD_TRACE_WORD_MISC__GFX09;
typedef union SQ_THREAD_TRACE_WORD_PERF_1_OF_2__GFX09  regSQ_THREAD_TRACE_WORD_PERF_1_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_PERF_2_OF_2__GFX09  regSQ_THREAD_TRACE_WORD_PERF_2_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_REG_1_OF_2__GFX09   regSQ_THREAD_TRACE_WORD_REG_1_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_REG_2_OF_2__GFX09   regSQ_THREAD_TRACE_WORD_REG_2_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_REG_CS_1_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_REG_CS_2_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2__GFX09 regSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2__GFX09;
typedef union SQ_THREAD_TRACE_WORD_WAVE__GFX09         regSQ_THREAD_TRACE_WORD_WAVE__GFX09;
typedef union SQ_THREAD_TRACE_WORD_WAVE_START__GFX09   regSQ_THREAD_TRACE_WORD_WAVE_START__GFX09;
typedef union SQ_THREAD_TRACE_WPTR__GFX09              regSQ_THREAD_TRACE_WPTR__GFX09;
typedef union SQ_TIME_HI                               regSQ_TIME_HI;
typedef union SQ_TIME_LO                               regSQ_TIME_LO;
typedef union SQ_UTCL1_CNTL1__GFX09                    regSQ_UTCL1_CNTL1__GFX09;
typedef union SQ_UTCL1_CNTL2__GFX09                    regSQ_UTCL1_CNTL2__GFX09;
typedef union SQ_UTCL1_STATUS__GFX09                   regSQ_UTCL1_STATUS__GFX09;
typedef union SQ_VINTRP__GFX09                         regSQ_VINTRP__GFX09;
typedef union SQ_VOP1__GFX09                           regSQ_VOP1__GFX09;
typedef union SQ_VOP2__GFX09                           regSQ_VOP2__GFX09;
typedef union SQ_VOP3P_0__GFX09                        regSQ_VOP3P_0__GFX09;
typedef union SQ_VOP3P_1__GFX09                        regSQ_VOP3P_1__GFX09;
typedef union SQ_VOP3_0__GFX09                         regSQ_VOP3_0__GFX09;
typedef union SQ_VOP3_0_SDST_ENC__GFX09                regSQ_VOP3_0_SDST_ENC__GFX09;
typedef union SQ_VOP3_1__GFX09                         regSQ_VOP3_1__GFX09;
typedef union SQ_VOPC__GFX09                           regSQ_VOPC__GFX09;
typedef union SQ_VOP_DPP__GFX09                        regSQ_VOP_DPP__GFX09;
typedef union SQ_VOP_SDWA__GFX09                       regSQ_VOP_SDWA__GFX09;
typedef union SQ_VOP_SDWA_SDST_ENC__GFX09              regSQ_VOP_SDWA_SDST_ENC__GFX09;
typedef union SQ_WAVE_EXEC_HI                          regSQ_WAVE_EXEC_HI;
typedef union SQ_WAVE_EXEC_LO                          regSQ_WAVE_EXEC_LO;
typedef union SQ_WAVE_FLUSH_IB                         regSQ_WAVE_FLUSH_IB;
typedef union SQ_WAVE_GPR_ALLOC                        regSQ_WAVE_GPR_ALLOC;
typedef union SQ_WAVE_HW_ID__GFX09                     regSQ_WAVE_HW_ID__GFX09;
typedef union SQ_WAVE_IB_DBG0__GFX09                   regSQ_WAVE_IB_DBG0__GFX09;
typedef union SQ_WAVE_IB_DBG1__GFX09                   regSQ_WAVE_IB_DBG1__GFX09;
typedef union SQ_WAVE_IB_STS                           regSQ_WAVE_IB_STS;
typedef union SQ_WAVE_INST_DW0                         regSQ_WAVE_INST_DW0;
typedef union SQ_WAVE_INST_DW1__GFX09                  regSQ_WAVE_INST_DW1__GFX09;
typedef union SQ_WAVE_LDS_ALLOC                        regSQ_WAVE_LDS_ALLOC;
typedef union SQ_WAVE_M0                               regSQ_WAVE_M0;
typedef union SQ_WAVE_MODE__GFX09                      regSQ_WAVE_MODE__GFX09;
typedef union SQ_WAVE_PC_HI                            regSQ_WAVE_PC_HI;
typedef union SQ_WAVE_PC_LO                            regSQ_WAVE_PC_LO;
typedef union SQ_WAVE_STATUS__GFX09                    regSQ_WAVE_STATUS__GFX09;
typedef union SQ_WAVE_TRAPSTS__GFX09                   regSQ_WAVE_TRAPSTS__GFX09;
typedef union SQ_WAVE_TTMP0                            regSQ_WAVE_TTMP0;
typedef union SQ_WAVE_TTMP1                            regSQ_WAVE_TTMP1;
typedef union SQ_WAVE_TTMP10                           regSQ_WAVE_TTMP10;
typedef union SQ_WAVE_TTMP11                           regSQ_WAVE_TTMP11;
typedef union SQ_WAVE_TTMP12                           regSQ_WAVE_TTMP12;
typedef union SQ_WAVE_TTMP13                           regSQ_WAVE_TTMP13;
typedef union SQ_WAVE_TTMP14                           regSQ_WAVE_TTMP14;
typedef union SQ_WAVE_TTMP15                           regSQ_WAVE_TTMP15;
typedef union SQ_WAVE_TTMP2                            regSQ_WAVE_TTMP2;
typedef union SQ_WAVE_TTMP3                            regSQ_WAVE_TTMP3;
typedef union SQ_WAVE_TTMP4                            regSQ_WAVE_TTMP4;
typedef union SQ_WAVE_TTMP5                            regSQ_WAVE_TTMP5;
typedef union SQ_WAVE_TTMP6                            regSQ_WAVE_TTMP6;
typedef union SQ_WAVE_TTMP7                            regSQ_WAVE_TTMP7;
typedef union SQ_WAVE_TTMP8                            regSQ_WAVE_TTMP8;
typedef union SQ_WAVE_TTMP9                            regSQ_WAVE_TTMP9;
typedef union SQ_WREXEC_EXEC_HI                        regSQ_WREXEC_EXEC_HI;
typedef union SQ_WREXEC_EXEC_LO                        regSQ_WREXEC_EXEC_LO;
typedef union SX_BLEND_OPT_CONTROL                     regSX_BLEND_OPT_CONTROL;
typedef union SX_BLEND_OPT_EPSILON                     regSX_BLEND_OPT_EPSILON;
typedef union SX_DEBUG_1__GFX09                        regSX_DEBUG_1__GFX09;
typedef union SX_DEBUG_BUSY__GFX09                     regSX_DEBUG_BUSY__GFX09;
typedef union SX_DEBUG_BUSY_2__GFX09                   regSX_DEBUG_BUSY_2__GFX09;
typedef union SX_DEBUG_BUSY_3__GFX09                   regSX_DEBUG_BUSY_3__GFX09;
typedef union SX_DEBUG_BUSY_4__GFX09                   regSX_DEBUG_BUSY_4__GFX09;
typedef union SX_DEBUG_BUSY_5__GFX09                   regSX_DEBUG_BUSY_5__GFX09;
typedef union SX_MRT0_BLEND_OPT                        regSX_MRT0_BLEND_OPT;
typedef union SX_MRT1_BLEND_OPT                        regSX_MRT1_BLEND_OPT;
typedef union SX_MRT2_BLEND_OPT                        regSX_MRT2_BLEND_OPT;
typedef union SX_MRT3_BLEND_OPT                        regSX_MRT3_BLEND_OPT;
typedef union SX_MRT4_BLEND_OPT                        regSX_MRT4_BLEND_OPT;
typedef union SX_MRT5_BLEND_OPT                        regSX_MRT5_BLEND_OPT;
typedef union SX_MRT6_BLEND_OPT                        regSX_MRT6_BLEND_OPT;
typedef union SX_MRT7_BLEND_OPT                        regSX_MRT7_BLEND_OPT;
typedef union SX_PERFCOUNTER0_HI                       regSX_PERFCOUNTER0_HI;
typedef union SX_PERFCOUNTER0_LO                       regSX_PERFCOUNTER0_LO;
typedef union SX_PERFCOUNTER0_SELECT                   regSX_PERFCOUNTER0_SELECT;
typedef union SX_PERFCOUNTER0_SELECT1                  regSX_PERFCOUNTER0_SELECT1;
typedef union SX_PERFCOUNTER1_HI                       regSX_PERFCOUNTER1_HI;
typedef union SX_PERFCOUNTER1_LO                       regSX_PERFCOUNTER1_LO;
typedef union SX_PERFCOUNTER1_SELECT                   regSX_PERFCOUNTER1_SELECT;
typedef union SX_PERFCOUNTER1_SELECT1                  regSX_PERFCOUNTER1_SELECT1;
typedef union SX_PERFCOUNTER2_HI                       regSX_PERFCOUNTER2_HI;
typedef union SX_PERFCOUNTER2_LO                       regSX_PERFCOUNTER2_LO;
typedef union SX_PERFCOUNTER2_SELECT                   regSX_PERFCOUNTER2_SELECT;
typedef union SX_PERFCOUNTER3_HI                       regSX_PERFCOUNTER3_HI;
typedef union SX_PERFCOUNTER3_LO                       regSX_PERFCOUNTER3_LO;
typedef union SX_PERFCOUNTER3_SELECT                   regSX_PERFCOUNTER3_SELECT;
typedef union SX_PS_DOWNCONVERT                        regSX_PS_DOWNCONVERT;
typedef union TA_BC_BASE_ADDR                          regTA_BC_BASE_ADDR;
typedef union TA_BC_BASE_ADDR_HI                       regTA_BC_BASE_ADDR_HI;
typedef union TA_CGTT_CTRL                             regTA_CGTT_CTRL;
typedef union TA_CNTL__GFX09                           regTA_CNTL__GFX09;
typedef union TA_CNTL_AUX__GFX09                       regTA_CNTL_AUX__GFX09;
typedef union TA_CS_BC_BASE_ADDR                       regTA_CS_BC_BASE_ADDR;
typedef union TA_CS_BC_BASE_ADDR_HI                    regTA_CS_BC_BASE_ADDR_HI;
typedef union TA_DEBUG_DATA                            regTA_DEBUG_DATA;
typedef union TA_DEBUG_INDEX                           regTA_DEBUG_INDEX;
typedef union TA_PERFCOUNTER0_HI                       regTA_PERFCOUNTER0_HI;
typedef union TA_PERFCOUNTER0_LO                       regTA_PERFCOUNTER0_LO;
typedef union TA_PERFCOUNTER0_SELECT                   regTA_PERFCOUNTER0_SELECT;
typedef union TA_PERFCOUNTER0_SELECT1                  regTA_PERFCOUNTER0_SELECT1;
typedef union TA_PERFCOUNTER1_HI                       regTA_PERFCOUNTER1_HI;
typedef union TA_PERFCOUNTER1_LO                       regTA_PERFCOUNTER1_LO;
typedef union TA_PERFCOUNTER1_SELECT__GFX09            regTA_PERFCOUNTER1_SELECT__GFX09;
typedef union TA_RESERVED_010C                         regTA_RESERVED_010C;
typedef union TA_SCRATCH                               regTA_SCRATCH;
typedef union TA_STATUS                                regTA_STATUS;
typedef union TCA_BURST_CTRL__GFX09                    regTCA_BURST_CTRL__GFX09;
typedef union TCA_BURST_MASK__GFX09                    regTCA_BURST_MASK__GFX09;
typedef union TCA_CGTT_SCLK_CTRL__GFX09                regTCA_CGTT_SCLK_CTRL__GFX09;
typedef union TCA_CTRL__GFX09                          regTCA_CTRL__GFX09;
typedef union TCA_DSM_CNTL__GFX09                      regTCA_DSM_CNTL__GFX09;
typedef union TCA_DSM_CNTL2__GFX09                     regTCA_DSM_CNTL2__GFX09;
typedef union TCA_EDC_CNT__GFX09                       regTCA_EDC_CNT__GFX09;
typedef union TCA_PERFCOUNTER0_HI__GFX09               regTCA_PERFCOUNTER0_HI__GFX09;
typedef union TCA_PERFCOUNTER0_LO__GFX09               regTCA_PERFCOUNTER0_LO__GFX09;
typedef union TCA_PERFCOUNTER0_SELECT__GFX09           regTCA_PERFCOUNTER0_SELECT__GFX09;
typedef union TCA_PERFCOUNTER0_SELECT1__GFX09          regTCA_PERFCOUNTER0_SELECT1__GFX09;
typedef union TCA_PERFCOUNTER1_HI__GFX09               regTCA_PERFCOUNTER1_HI__GFX09;
typedef union TCA_PERFCOUNTER1_LO__GFX09               regTCA_PERFCOUNTER1_LO__GFX09;
typedef union TCA_PERFCOUNTER1_SELECT__GFX09           regTCA_PERFCOUNTER1_SELECT__GFX09;
typedef union TCA_PERFCOUNTER1_SELECT1__GFX09          regTCA_PERFCOUNTER1_SELECT1__GFX09;
typedef union TCA_PERFCOUNTER2_HI__GFX09               regTCA_PERFCOUNTER2_HI__GFX09;
typedef union TCA_PERFCOUNTER2_LO__GFX09               regTCA_PERFCOUNTER2_LO__GFX09;
typedef union TCA_PERFCOUNTER2_SELECT__GFX09           regTCA_PERFCOUNTER2_SELECT__GFX09;
typedef union TCA_PERFCOUNTER3_HI__GFX09               regTCA_PERFCOUNTER3_HI__GFX09;
typedef union TCA_PERFCOUNTER3_LO__GFX09               regTCA_PERFCOUNTER3_LO__GFX09;
typedef union TCA_PERFCOUNTER3_SELECT__GFX09           regTCA_PERFCOUNTER3_SELECT__GFX09;
typedef union TCC_CGTT_SCLK_CTRL__GFX09                regTCC_CGTT_SCLK_CTRL__GFX09;
typedef union TCC_CTRL__GFX09                          regTCC_CTRL__GFX09;
typedef union TCC_CTRL2__GFX09                         regTCC_CTRL2__GFX09;
typedef union TCC_DSM_CNTL__GFX09                      regTCC_DSM_CNTL__GFX09;
typedef union TCC_DSM_CNTL2__GFX09                     regTCC_DSM_CNTL2__GFX09;
typedef union TCC_DSM_CNTL2A__GFX09                    regTCC_DSM_CNTL2A__GFX09;
typedef union TCC_DSM_CNTL2B__GFX09                    regTCC_DSM_CNTL2B__GFX09;
typedef union TCC_DSM_CNTLA__GFX09                     regTCC_DSM_CNTLA__GFX09;
typedef union TCC_EDC_CNT__GFX09                       regTCC_EDC_CNT__GFX09;
typedef union TCC_EDC_CNT2__GFX09                      regTCC_EDC_CNT2__GFX09;
typedef union TCC_EXE_DISABLE__GFX09                   regTCC_EXE_DISABLE__GFX09;
typedef union TCC_PERFCOUNTER0_HI__GFX09               regTCC_PERFCOUNTER0_HI__GFX09;
typedef union TCC_PERFCOUNTER0_LO__GFX09               regTCC_PERFCOUNTER0_LO__GFX09;
typedef union TCC_PERFCOUNTER0_SELECT__GFX09           regTCC_PERFCOUNTER0_SELECT__GFX09;
typedef union TCC_PERFCOUNTER0_SELECT1__GFX09          regTCC_PERFCOUNTER0_SELECT1__GFX09;
typedef union TCC_PERFCOUNTER1_HI__GFX09               regTCC_PERFCOUNTER1_HI__GFX09;
typedef union TCC_PERFCOUNTER1_LO__GFX09               regTCC_PERFCOUNTER1_LO__GFX09;
typedef union TCC_PERFCOUNTER1_SELECT__GFX09           regTCC_PERFCOUNTER1_SELECT__GFX09;
typedef union TCC_PERFCOUNTER1_SELECT1__GFX09          regTCC_PERFCOUNTER1_SELECT1__GFX09;
typedef union TCC_PERFCOUNTER2_HI__GFX09               regTCC_PERFCOUNTER2_HI__GFX09;
typedef union TCC_PERFCOUNTER2_LO__GFX09               regTCC_PERFCOUNTER2_LO__GFX09;
typedef union TCC_PERFCOUNTER2_SELECT__GFX09           regTCC_PERFCOUNTER2_SELECT__GFX09;
typedef union TCC_PERFCOUNTER3_HI__GFX09               regTCC_PERFCOUNTER3_HI__GFX09;
typedef union TCC_PERFCOUNTER3_LO__GFX09               regTCC_PERFCOUNTER3_LO__GFX09;
typedef union TCC_PERFCOUNTER3_SELECT__GFX09           regTCC_PERFCOUNTER3_SELECT__GFX09;
typedef union TCC_REDUNDANCY__GFX09                    regTCC_REDUNDANCY__GFX09;
typedef union TCC_SOFT_RESET__GFX09                    regTCC_SOFT_RESET__GFX09;
typedef union TCC_WBINVL2__GFX09                       regTCC_WBINVL2__GFX09;
typedef union TCI_CNTL_1                               regTCI_CNTL_1;
typedef union TCI_CNTL_2                               regTCI_CNTL_2;
typedef union TCI_STATUS                               regTCI_STATUS;
typedef union TCP_ADDR_CONFIG__GFX09                   regTCP_ADDR_CONFIG__GFX09;
typedef union TCP_ATC_EDC_GATCL1_CNT__GFX09            regTCP_ATC_EDC_GATCL1_CNT__GFX09;
typedef union TCP_BUFFER_ADDR_HASH_CNTL                regTCP_BUFFER_ADDR_HASH_CNTL;
typedef union TCP_CHAN_STEER_HI__GFX09                 regTCP_CHAN_STEER_HI__GFX09;
typedef union TCP_CHAN_STEER_LO__GFX09                 regTCP_CHAN_STEER_LO__GFX09;
typedef union TCP_CNTL__GFX09                          regTCP_CNTL__GFX09;
typedef union TCP_CNTL2                                regTCP_CNTL2;
typedef union TCP_CREDIT                               regTCP_CREDIT;
typedef union TCP_EDC_CNT                              regTCP_EDC_CNT;
typedef union TCP_GATCL1_CNTL__GFX09                   regTCP_GATCL1_CNTL__GFX09;
typedef union TCP_GATCL1_DSM_CNTL__GFX09               regTCP_GATCL1_DSM_CNTL__GFX09;
typedef union TCP_INVALIDATE                           regTCP_INVALIDATE;
typedef union TCP_PERFCOUNTER0_HI                      regTCP_PERFCOUNTER0_HI;
typedef union TCP_PERFCOUNTER0_LO                      regTCP_PERFCOUNTER0_LO;
typedef union TCP_PERFCOUNTER0_SELECT                  regTCP_PERFCOUNTER0_SELECT;
typedef union TCP_PERFCOUNTER0_SELECT1                 regTCP_PERFCOUNTER0_SELECT1;
typedef union TCP_PERFCOUNTER1_HI                      regTCP_PERFCOUNTER1_HI;
typedef union TCP_PERFCOUNTER1_LO                      regTCP_PERFCOUNTER1_LO;
typedef union TCP_PERFCOUNTER1_SELECT                  regTCP_PERFCOUNTER1_SELECT;
typedef union TCP_PERFCOUNTER1_SELECT1                 regTCP_PERFCOUNTER1_SELECT1;
typedef union TCP_PERFCOUNTER2_HI                      regTCP_PERFCOUNTER2_HI;
typedef union TCP_PERFCOUNTER2_LO                      regTCP_PERFCOUNTER2_LO;
typedef union TCP_PERFCOUNTER2_SELECT                  regTCP_PERFCOUNTER2_SELECT;
typedef union TCP_PERFCOUNTER3_HI                      regTCP_PERFCOUNTER3_HI;
typedef union TCP_PERFCOUNTER3_LO                      regTCP_PERFCOUNTER3_LO;
typedef union TCP_PERFCOUNTER3_SELECT                  regTCP_PERFCOUNTER3_SELECT;
typedef union TCP_PERFCOUNTER_FILTER__GFX09            regTCP_PERFCOUNTER_FILTER__GFX09;
typedef union TCP_PERFCOUNTER_FILTER_EN__GFX09         regTCP_PERFCOUNTER_FILTER_EN__GFX09;
typedef union TCP_STATUS                               regTCP_STATUS;
typedef union TCP_UTCL1_CNTL1__GFX09                   regTCP_UTCL1_CNTL1__GFX09;
typedef union TCP_UTCL1_CNTL2__GFX09                   regTCP_UTCL1_CNTL2__GFX09;
typedef union TCP_UTCL1_STATUS__GFX09                  regTCP_UTCL1_STATUS__GFX09;
typedef union TCP_WATCH0_ADDR_H                        regTCP_WATCH0_ADDR_H;
typedef union TCP_WATCH0_ADDR_L__GFX09                 regTCP_WATCH0_ADDR_L__GFX09;
typedef union TCP_WATCH0_CNTL__GFX09                   regTCP_WATCH0_CNTL__GFX09;
typedef union TCP_WATCH1_ADDR_H                        regTCP_WATCH1_ADDR_H;
typedef union TCP_WATCH1_ADDR_L__GFX09                 regTCP_WATCH1_ADDR_L__GFX09;
typedef union TCP_WATCH1_CNTL__GFX09                   regTCP_WATCH1_CNTL__GFX09;
typedef union TCP_WATCH2_ADDR_H                        regTCP_WATCH2_ADDR_H;
typedef union TCP_WATCH2_ADDR_L__GFX09                 regTCP_WATCH2_ADDR_L__GFX09;
typedef union TCP_WATCH2_CNTL__GFX09                   regTCP_WATCH2_CNTL__GFX09;
typedef union TCP_WATCH3_ADDR_H                        regTCP_WATCH3_ADDR_H;
typedef union TCP_WATCH3_ADDR_L__GFX09                 regTCP_WATCH3_ADDR_L__GFX09;
typedef union TCP_WATCH3_CNTL__GFX09                   regTCP_WATCH3_CNTL__GFX09;
typedef union TC_CFG_L1_LOAD_POLICY0__GFX09            regTC_CFG_L1_LOAD_POLICY0__GFX09;
typedef union TC_CFG_L1_LOAD_POLICY1__GFX09            regTC_CFG_L1_LOAD_POLICY1__GFX09;
typedef union TC_CFG_L1_STORE_POLICY__GFX09            regTC_CFG_L1_STORE_POLICY__GFX09;
typedef union TC_CFG_L1_VOLATILE__GFX09                regTC_CFG_L1_VOLATILE__GFX09;
typedef union TC_CFG_L2_ATOMIC_POLICY__GFX09           regTC_CFG_L2_ATOMIC_POLICY__GFX09;
typedef union TC_CFG_L2_LOAD_POLICY0__GFX09            regTC_CFG_L2_LOAD_POLICY0__GFX09;
typedef union TC_CFG_L2_LOAD_POLICY1__GFX09            regTC_CFG_L2_LOAD_POLICY1__GFX09;
typedef union TC_CFG_L2_STORE_POLICY0__GFX09           regTC_CFG_L2_STORE_POLICY0__GFX09;
typedef union TC_CFG_L2_STORE_POLICY1__GFX09           regTC_CFG_L2_STORE_POLICY1__GFX09;
typedef union TC_CFG_L2_VOLATILE__GFX09                regTC_CFG_L2_VOLATILE__GFX09;
typedef union TD_CGTT_CTRL                             regTD_CGTT_CTRL;
typedef union TD_CNTL                                  regTD_CNTL;
typedef union TD_DEBUG_DATA                            regTD_DEBUG_DATA;
typedef union TD_DEBUG_INDEX                           regTD_DEBUG_INDEX;
typedef union TD_DSM_CNTL                              regTD_DSM_CNTL;
typedef union TD_DSM_CNTL2                             regTD_DSM_CNTL2;
typedef union TD_PERFCOUNTER0_HI                       regTD_PERFCOUNTER0_HI;
typedef union TD_PERFCOUNTER0_LO                       regTD_PERFCOUNTER0_LO;
typedef union TD_PERFCOUNTER0_SELECT                   regTD_PERFCOUNTER0_SELECT;
typedef union TD_PERFCOUNTER0_SELECT1                  regTD_PERFCOUNTER0_SELECT1;
typedef union TD_PERFCOUNTER1_HI                       regTD_PERFCOUNTER1_HI;
typedef union TD_PERFCOUNTER1_LO                       regTD_PERFCOUNTER1_LO;
typedef union TD_PERFCOUNTER1_SELECT__GFX09            regTD_PERFCOUNTER1_SELECT__GFX09;
typedef union TD_SCRATCH                               regTD_SCRATCH;
typedef union TD_STATUS                                regTD_STATUS;
typedef union UTCL2_CGTT_CLK_CTRL__GFX09               regUTCL2_CGTT_CLK_CTRL__GFX09;
typedef union VGT_CACHE_INVALIDATION                   regVGT_CACHE_INVALIDATION;
typedef union VGT_CNTL_STATUS                          regVGT_CNTL_STATUS;
typedef union VGT_DEBUG_DATA__GFX09                    regVGT_DEBUG_DATA__GFX09;
typedef union VGT_DEBUG_REG0__GFX09                    regVGT_DEBUG_REG0__GFX09;
typedef union VGT_DEBUG_REG1__GFX09                    regVGT_DEBUG_REG1__GFX09;
typedef union VGT_DEBUG_REG10__GFX09                   regVGT_DEBUG_REG10__GFX09;
typedef union VGT_DEBUG_REG11__GFX09                   regVGT_DEBUG_REG11__GFX09;
typedef union VGT_DEBUG_REG12__GFX09                   regVGT_DEBUG_REG12__GFX09;
typedef union VGT_DEBUG_REG13__GFX09                   regVGT_DEBUG_REG13__GFX09;
typedef union VGT_DEBUG_REG14__GFX09                   regVGT_DEBUG_REG14__GFX09;
typedef union VGT_DEBUG_REG15__GFX09                   regVGT_DEBUG_REG15__GFX09;
typedef union VGT_DEBUG_REG16__GFX09                   regVGT_DEBUG_REG16__GFX09;
typedef union VGT_DEBUG_REG2__GFX09                    regVGT_DEBUG_REG2__GFX09;
typedef union VGT_DEBUG_REG23__GFX09                   regVGT_DEBUG_REG23__GFX09;
typedef union VGT_DEBUG_REG30__GFX09                   regVGT_DEBUG_REG30__GFX09;
typedef union VGT_DEBUG_REG32__GFX09                   regVGT_DEBUG_REG32__GFX09;
typedef union VGT_DEBUG_REG4__GFX09                    regVGT_DEBUG_REG4__GFX09;
typedef union VGT_DEBUG_REG5__GFX09                    regVGT_DEBUG_REG5__GFX09;
typedef union VGT_DEBUG_REG7__GFX09                    regVGT_DEBUG_REG7__GFX09;
typedef union VGT_DEBUG_REG9__GFX09                    regVGT_DEBUG_REG9__GFX09;
typedef union VGT_DISPATCH_DRAW_INDEX                  regVGT_DISPATCH_DRAW_INDEX;
typedef union VGT_DMA_BASE                             regVGT_DMA_BASE;
typedef union VGT_DMA_BASE_HI                          regVGT_DMA_BASE_HI;
typedef union VGT_DMA_CONTROL                          regVGT_DMA_CONTROL;
typedef union VGT_DMA_DATA_FIFO_DEPTH__GFX09           regVGT_DMA_DATA_FIFO_DEPTH__GFX09;
typedef union VGT_DMA_EVENT_INITIATOR                  regVGT_DMA_EVENT_INITIATOR;
typedef union VGT_DMA_INDEX_TYPE__GFX09                regVGT_DMA_INDEX_TYPE__GFX09;
typedef union VGT_DMA_LS_HS_CONFIG                     regVGT_DMA_LS_HS_CONFIG;
typedef union VGT_DMA_MAX_SIZE                         regVGT_DMA_MAX_SIZE;
typedef union VGT_DMA_NUM_INSTANCES                    regVGT_DMA_NUM_INSTANCES;
typedef union VGT_DMA_PRIMITIVE_TYPE                   regVGT_DMA_PRIMITIVE_TYPE;
typedef union VGT_DMA_REQ_FIFO_DEPTH                   regVGT_DMA_REQ_FIFO_DEPTH;
typedef union VGT_DMA_SIZE                             regVGT_DMA_SIZE;
typedef union VGT_DRAW_INITIATOR                       regVGT_DRAW_INITIATOR;
typedef union VGT_DRAW_INIT_FIFO_DEPTH                 regVGT_DRAW_INIT_FIFO_DEPTH;
typedef union VGT_ENHANCE                              regVGT_ENHANCE;
typedef union VGT_ESGS_RING_ITEMSIZE                   regVGT_ESGS_RING_ITEMSIZE;
typedef union VGT_ES_PER_GS                            regVGT_ES_PER_GS;
typedef union VGT_EVENT_ADDRESS_REG                    regVGT_EVENT_ADDRESS_REG;
typedef union VGT_EVENT_INITIATOR                      regVGT_EVENT_INITIATOR;
typedef union VGT_FIFO_DEPTHS__GFX09                   regVGT_FIFO_DEPTHS__GFX09;
typedef union VGT_GROUP_DECR                           regVGT_GROUP_DECR;
typedef union VGT_GROUP_FIRST_DECR                     regVGT_GROUP_FIRST_DECR;
typedef union VGT_GROUP_PRIM_TYPE                      regVGT_GROUP_PRIM_TYPE;
typedef union VGT_GROUP_VECT_0_CNTL                    regVGT_GROUP_VECT_0_CNTL;
typedef union VGT_GROUP_VECT_0_FMT_CNTL                regVGT_GROUP_VECT_0_FMT_CNTL;
typedef union VGT_GROUP_VECT_1_CNTL                    regVGT_GROUP_VECT_1_CNTL;
typedef union VGT_GROUP_VECT_1_FMT_CNTL                regVGT_GROUP_VECT_1_FMT_CNTL;
typedef union VGT_GSVS_RING_ITEMSIZE                   regVGT_GSVS_RING_ITEMSIZE;
typedef union VGT_GSVS_RING_OFFSET_1                   regVGT_GSVS_RING_OFFSET_1;
typedef union VGT_GSVS_RING_OFFSET_2                   regVGT_GSVS_RING_OFFSET_2;
typedef union VGT_GSVS_RING_OFFSET_3                   regVGT_GSVS_RING_OFFSET_3;
typedef union VGT_GSVS_RING_SIZE                       regVGT_GSVS_RING_SIZE;
typedef union VGT_GS_INSTANCE_CNT                      regVGT_GS_INSTANCE_CNT;
typedef union VGT_GS_MAX_PRIMS_PER_SUBGROUP__GFX09     regVGT_GS_MAX_PRIMS_PER_SUBGROUP__GFX09;
typedef union VGT_GS_MAX_VERT_OUT                      regVGT_GS_MAX_VERT_OUT;
typedef union VGT_GS_MAX_WAVE_ID                       regVGT_GS_MAX_WAVE_ID;
typedef union VGT_GS_MODE                              regVGT_GS_MODE;
typedef union VGT_GS_ONCHIP_CNTL                       regVGT_GS_ONCHIP_CNTL;
typedef union VGT_GS_OUT_PRIM_TYPE                     regVGT_GS_OUT_PRIM_TYPE;
typedef union VGT_GS_PER_ES                            regVGT_GS_PER_ES;
typedef union VGT_GS_PER_VS                            regVGT_GS_PER_VS;
typedef union VGT_GS_VERTEX_REUSE                      regVGT_GS_VERTEX_REUSE;
typedef union VGT_GS_VERT_ITEMSIZE                     regVGT_GS_VERT_ITEMSIZE;
typedef union VGT_GS_VERT_ITEMSIZE_1                   regVGT_GS_VERT_ITEMSIZE_1;
typedef union VGT_GS_VERT_ITEMSIZE_2                   regVGT_GS_VERT_ITEMSIZE_2;
typedef union VGT_GS_VERT_ITEMSIZE_3                   regVGT_GS_VERT_ITEMSIZE_3;
typedef union VGT_HOS_CNTL                             regVGT_HOS_CNTL;
typedef union VGT_HOS_MAX_TESS_LEVEL                   regVGT_HOS_MAX_TESS_LEVEL;
typedef union VGT_HOS_MIN_TESS_LEVEL                   regVGT_HOS_MIN_TESS_LEVEL;
typedef union VGT_HOS_REUSE_DEPTH                      regVGT_HOS_REUSE_DEPTH;
typedef union VGT_HS_OFFCHIP_PARAM                     regVGT_HS_OFFCHIP_PARAM;
typedef union VGT_IMMED_DATA                           regVGT_IMMED_DATA;
typedef union VGT_INDEX_TYPE                           regVGT_INDEX_TYPE;
typedef union VGT_INDX_OFFSET                          regVGT_INDX_OFFSET;
typedef union VGT_INSTANCE_BASE_ID                     regVGT_INSTANCE_BASE_ID;
typedef union VGT_INSTANCE_STEP_RATE_0                 regVGT_INSTANCE_STEP_RATE_0;
typedef union VGT_INSTANCE_STEP_RATE_1                 regVGT_INSTANCE_STEP_RATE_1;
typedef union VGT_LAST_COPY_STATE                      regVGT_LAST_COPY_STATE;
typedef union VGT_LS_HS_CONFIG                         regVGT_LS_HS_CONFIG;
typedef union VGT_MAX_VTX_INDX                         regVGT_MAX_VTX_INDX;
typedef union VGT_MC_LAT_CNTL                          regVGT_MC_LAT_CNTL;
typedef union VGT_MIN_VTX_INDX                         regVGT_MIN_VTX_INDX;
typedef union VGT_MULTI_PRIM_IB_RESET_EN               regVGT_MULTI_PRIM_IB_RESET_EN;
typedef union VGT_MULTI_PRIM_IB_RESET_INDX             regVGT_MULTI_PRIM_IB_RESET_INDX;
typedef union VGT_NUM_INDICES                          regVGT_NUM_INDICES;
typedef union VGT_NUM_INSTANCES                        regVGT_NUM_INSTANCES;
typedef union VGT_OUTPUT_PATH_CNTL                     regVGT_OUTPUT_PATH_CNTL;
typedef union VGT_OUT_DEALLOC_CNTL                     regVGT_OUT_DEALLOC_CNTL;
typedef union VGT_PERFCOUNTER0_HI__GFX09               regVGT_PERFCOUNTER0_HI__GFX09;
typedef union VGT_PERFCOUNTER0_LO__GFX09               regVGT_PERFCOUNTER0_LO__GFX09;
typedef union VGT_PERFCOUNTER0_SELECT__GFX09           regVGT_PERFCOUNTER0_SELECT__GFX09;
typedef union VGT_PERFCOUNTER0_SELECT1__GFX09          regVGT_PERFCOUNTER0_SELECT1__GFX09;
typedef union VGT_PERFCOUNTER1_HI__GFX09               regVGT_PERFCOUNTER1_HI__GFX09;
typedef union VGT_PERFCOUNTER1_LO__GFX09               regVGT_PERFCOUNTER1_LO__GFX09;
typedef union VGT_PERFCOUNTER1_SELECT__GFX09           regVGT_PERFCOUNTER1_SELECT__GFX09;
typedef union VGT_PERFCOUNTER1_SELECT1__GFX09          regVGT_PERFCOUNTER1_SELECT1__GFX09;
typedef union VGT_PERFCOUNTER2_HI__GFX09               regVGT_PERFCOUNTER2_HI__GFX09;
typedef union VGT_PERFCOUNTER2_LO__GFX09               regVGT_PERFCOUNTER2_LO__GFX09;
typedef union VGT_PERFCOUNTER2_SELECT__GFX09           regVGT_PERFCOUNTER2_SELECT__GFX09;
typedef union VGT_PERFCOUNTER3_HI__GFX09               regVGT_PERFCOUNTER3_HI__GFX09;
typedef union VGT_PERFCOUNTER3_LO__GFX09               regVGT_PERFCOUNTER3_LO__GFX09;
typedef union VGT_PERFCOUNTER3_SELECT__GFX09           regVGT_PERFCOUNTER3_SELECT__GFX09;
typedef union VGT_PERFCOUNTER_SEID_MASK__GFX09         regVGT_PERFCOUNTER_SEID_MASK__GFX09;
typedef union VGT_PRIMITIVEID_EN                       regVGT_PRIMITIVEID_EN;
typedef union VGT_PRIMITIVEID_RESET                    regVGT_PRIMITIVEID_RESET;
typedef union VGT_PRIMITIVE_TYPE                       regVGT_PRIMITIVE_TYPE;
typedef union VGT_RESET_DEBUG                          regVGT_RESET_DEBUG;
typedef union VGT_REUSE_OFF                            regVGT_REUSE_OFF;
typedef union VGT_SHADER_STAGES_EN                     regVGT_SHADER_STAGES_EN;
typedef union VGT_STRMOUT_BUFFER_CONFIG                regVGT_STRMOUT_BUFFER_CONFIG;
typedef union VGT_STRMOUT_BUFFER_FILLED_SIZE_0         regVGT_STRMOUT_BUFFER_FILLED_SIZE_0;
typedef union VGT_STRMOUT_BUFFER_FILLED_SIZE_1         regVGT_STRMOUT_BUFFER_FILLED_SIZE_1;
typedef union VGT_STRMOUT_BUFFER_FILLED_SIZE_2         regVGT_STRMOUT_BUFFER_FILLED_SIZE_2;
typedef union VGT_STRMOUT_BUFFER_FILLED_SIZE_3         regVGT_STRMOUT_BUFFER_FILLED_SIZE_3;
typedef union VGT_STRMOUT_BUFFER_OFFSET_0              regVGT_STRMOUT_BUFFER_OFFSET_0;
typedef union VGT_STRMOUT_BUFFER_OFFSET_1              regVGT_STRMOUT_BUFFER_OFFSET_1;
typedef union VGT_STRMOUT_BUFFER_OFFSET_2              regVGT_STRMOUT_BUFFER_OFFSET_2;
typedef union VGT_STRMOUT_BUFFER_OFFSET_3              regVGT_STRMOUT_BUFFER_OFFSET_3;
typedef union VGT_STRMOUT_BUFFER_SIZE_0                regVGT_STRMOUT_BUFFER_SIZE_0;
typedef union VGT_STRMOUT_BUFFER_SIZE_1                regVGT_STRMOUT_BUFFER_SIZE_1;
typedef union VGT_STRMOUT_BUFFER_SIZE_2                regVGT_STRMOUT_BUFFER_SIZE_2;
typedef union VGT_STRMOUT_BUFFER_SIZE_3                regVGT_STRMOUT_BUFFER_SIZE_3;
typedef union VGT_STRMOUT_CONFIG                       regVGT_STRMOUT_CONFIG;
typedef union VGT_STRMOUT_DELAY                        regVGT_STRMOUT_DELAY;
typedef union VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE regVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE;
typedef union VGT_STRMOUT_DRAW_OPAQUE_OFFSET           regVGT_STRMOUT_DRAW_OPAQUE_OFFSET;
typedef union VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE    regVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE;
typedef union VGT_STRMOUT_VTX_STRIDE_0                 regVGT_STRMOUT_VTX_STRIDE_0;
typedef union VGT_STRMOUT_VTX_STRIDE_1                 regVGT_STRMOUT_VTX_STRIDE_1;
typedef union VGT_STRMOUT_VTX_STRIDE_2                 regVGT_STRMOUT_VTX_STRIDE_2;
typedef union VGT_STRMOUT_VTX_STRIDE_3                 regVGT_STRMOUT_VTX_STRIDE_3;
typedef union VGT_SYS_CONFIG                           regVGT_SYS_CONFIG;
typedef union VGT_TESS_DISTRIBUTION                    regVGT_TESS_DISTRIBUTION;
typedef union VGT_TF_MEMORY_BASE                       regVGT_TF_MEMORY_BASE;
typedef union VGT_TF_MEMORY_BASE_HI                    regVGT_TF_MEMORY_BASE_HI;
typedef union VGT_TF_PARAM                             regVGT_TF_PARAM;
typedef union VGT_TF_RING_SIZE                         regVGT_TF_RING_SIZE;
typedef union VGT_VERTEX_REUSE_BLOCK_CNTL              regVGT_VERTEX_REUSE_BLOCK_CNTL;
typedef union VGT_VS_MAX_WAVE_ID                       regVGT_VS_MAX_WAVE_ID;
typedef union VGT_VTX_CNT_EN                           regVGT_VTX_CNT_EN;
typedef union VGT_VTX_VECT_EJECT_REG                   regVGT_VTX_VECT_EJECT_REG;
typedef union VM_CONTEXT0_CNTL__GFX09                  regVM_CONTEXT0_CNTL__GFX09;
typedef union VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT10_CNTL__GFX09                 regVM_CONTEXT10_CNTL__GFX09;
typedef union VM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT11_CNTL__GFX09                 regVM_CONTEXT11_CNTL__GFX09;
typedef union VM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT12_CNTL__GFX09                 regVM_CONTEXT12_CNTL__GFX09;
typedef union VM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT13_CNTL__GFX09                 regVM_CONTEXT13_CNTL__GFX09;
typedef union VM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT14_CNTL__GFX09                 regVM_CONTEXT14_CNTL__GFX09;
typedef union VM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT15_CNTL__GFX09                 regVM_CONTEXT15_CNTL__GFX09;
typedef union VM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT1_CNTL__GFX09                  regVM_CONTEXT1_CNTL__GFX09;
typedef union VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT2_CNTL__GFX09                  regVM_CONTEXT2_CNTL__GFX09;
typedef union VM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT3_CNTL__GFX09                  regVM_CONTEXT3_CNTL__GFX09;
typedef union VM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT4_CNTL__GFX09                  regVM_CONTEXT4_CNTL__GFX09;
typedef union VM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT5_CNTL__GFX09                  regVM_CONTEXT5_CNTL__GFX09;
typedef union VM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT6_CNTL__GFX09                  regVM_CONTEXT6_CNTL__GFX09;
typedef union VM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT7_CNTL__GFX09                  regVM_CONTEXT7_CNTL__GFX09;
typedef union VM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT8_CNTL__GFX09                  regVM_CONTEXT8_CNTL__GFX09;
typedef union VM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXT9_CNTL__GFX09                  regVM_CONTEXT9_CNTL__GFX09;
typedef union VM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32__GFX09 regVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32__GFX09;
typedef union VM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32__GFX09 regVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32__GFX09;
typedef union VM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32__GFX09 regVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32__GFX09;
typedef union VM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32__GFX09 regVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32__GFX09;
typedef union VM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32__GFX09 regVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32__GFX09;
typedef union VM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32__GFX09 regVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32__GFX09;
typedef union VM_CONTEXTS_DISABLE__GFX09               regVM_CONTEXTS_DISABLE__GFX09;
typedef union VM_DEBUG__GFX09                          regVM_DEBUG__GFX09;
typedef union VM_DUMMY_PAGE_FAULT_ADDR_HI32__GFX09     regVM_DUMMY_PAGE_FAULT_ADDR_HI32__GFX09;
typedef union VM_DUMMY_PAGE_FAULT_ADDR_LO32__GFX09     regVM_DUMMY_PAGE_FAULT_ADDR_LO32__GFX09;
typedef union VM_DUMMY_PAGE_FAULT_CNTL__GFX09          regVM_DUMMY_PAGE_FAULT_CNTL__GFX09;
typedef union VM_INVALIDATE_ENG0_ACK__GFX09            regVM_INVALIDATE_ENG0_ACK__GFX09;
typedef union VM_INVALIDATE_ENG0_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG0_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG0_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG0_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG0_REQ__GFX09            regVM_INVALIDATE_ENG0_REQ__GFX09;
typedef union VM_INVALIDATE_ENG0_SEM__GFX09            regVM_INVALIDATE_ENG0_SEM__GFX09;
typedef union VM_INVALIDATE_ENG10_ACK__GFX09           regVM_INVALIDATE_ENG10_ACK__GFX09;
typedef union VM_INVALIDATE_ENG10_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG10_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG10_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG10_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG10_REQ__GFX09           regVM_INVALIDATE_ENG10_REQ__GFX09;
typedef union VM_INVALIDATE_ENG10_SEM__GFX09           regVM_INVALIDATE_ENG10_SEM__GFX09;
typedef union VM_INVALIDATE_ENG11_ACK__GFX09           regVM_INVALIDATE_ENG11_ACK__GFX09;
typedef union VM_INVALIDATE_ENG11_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG11_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG11_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG11_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG11_REQ__GFX09           regVM_INVALIDATE_ENG11_REQ__GFX09;
typedef union VM_INVALIDATE_ENG11_SEM__GFX09           regVM_INVALIDATE_ENG11_SEM__GFX09;
typedef union VM_INVALIDATE_ENG12_ACK__GFX09           regVM_INVALIDATE_ENG12_ACK__GFX09;
typedef union VM_INVALIDATE_ENG12_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG12_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG12_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG12_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG12_REQ__GFX09           regVM_INVALIDATE_ENG12_REQ__GFX09;
typedef union VM_INVALIDATE_ENG12_SEM__GFX09           regVM_INVALIDATE_ENG12_SEM__GFX09;
typedef union VM_INVALIDATE_ENG13_ACK__GFX09           regVM_INVALIDATE_ENG13_ACK__GFX09;
typedef union VM_INVALIDATE_ENG13_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG13_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG13_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG13_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG13_REQ__GFX09           regVM_INVALIDATE_ENG13_REQ__GFX09;
typedef union VM_INVALIDATE_ENG13_SEM__GFX09           regVM_INVALIDATE_ENG13_SEM__GFX09;
typedef union VM_INVALIDATE_ENG14_ACK__GFX09           regVM_INVALIDATE_ENG14_ACK__GFX09;
typedef union VM_INVALIDATE_ENG14_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG14_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG14_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG14_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG14_REQ__GFX09           regVM_INVALIDATE_ENG14_REQ__GFX09;
typedef union VM_INVALIDATE_ENG14_SEM__GFX09           regVM_INVALIDATE_ENG14_SEM__GFX09;
typedef union VM_INVALIDATE_ENG15_ACK__GFX09           regVM_INVALIDATE_ENG15_ACK__GFX09;
typedef union VM_INVALIDATE_ENG15_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG15_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG15_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG15_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG15_REQ__GFX09           regVM_INVALIDATE_ENG15_REQ__GFX09;
typedef union VM_INVALIDATE_ENG15_SEM__GFX09           regVM_INVALIDATE_ENG15_SEM__GFX09;
typedef union VM_INVALIDATE_ENG16_ACK__GFX09           regVM_INVALIDATE_ENG16_ACK__GFX09;
typedef union VM_INVALIDATE_ENG16_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG16_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG16_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG16_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG16_REQ__GFX09           regVM_INVALIDATE_ENG16_REQ__GFX09;
typedef union VM_INVALIDATE_ENG16_SEM__GFX09           regVM_INVALIDATE_ENG16_SEM__GFX09;
typedef union VM_INVALIDATE_ENG17_ACK__GFX09           regVM_INVALIDATE_ENG17_ACK__GFX09;
typedef union VM_INVALIDATE_ENG17_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG17_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG17_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG17_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG17_REQ__GFX09           regVM_INVALIDATE_ENG17_REQ__GFX09;
typedef union VM_INVALIDATE_ENG17_SEM__GFX09           regVM_INVALIDATE_ENG17_SEM__GFX09;
typedef union VM_INVALIDATE_ENG1_ACK__GFX09            regVM_INVALIDATE_ENG1_ACK__GFX09;
typedef union VM_INVALIDATE_ENG1_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG1_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG1_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG1_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG1_REQ__GFX09            regVM_INVALIDATE_ENG1_REQ__GFX09;
typedef union VM_INVALIDATE_ENG1_SEM__GFX09            regVM_INVALIDATE_ENG1_SEM__GFX09;
typedef union VM_INVALIDATE_ENG2_ACK__GFX09            regVM_INVALIDATE_ENG2_ACK__GFX09;
typedef union VM_INVALIDATE_ENG2_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG2_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG2_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG2_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG2_REQ__GFX09            regVM_INVALIDATE_ENG2_REQ__GFX09;
typedef union VM_INVALIDATE_ENG2_SEM__GFX09            regVM_INVALIDATE_ENG2_SEM__GFX09;
typedef union VM_INVALIDATE_ENG3_ACK__GFX09            regVM_INVALIDATE_ENG3_ACK__GFX09;
typedef union VM_INVALIDATE_ENG3_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG3_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG3_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG3_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG3_REQ__GFX09            regVM_INVALIDATE_ENG3_REQ__GFX09;
typedef union VM_INVALIDATE_ENG3_SEM__GFX09            regVM_INVALIDATE_ENG3_SEM__GFX09;
typedef union VM_INVALIDATE_ENG4_ACK__GFX09            regVM_INVALIDATE_ENG4_ACK__GFX09;
typedef union VM_INVALIDATE_ENG4_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG4_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG4_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG4_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG4_REQ__GFX09            regVM_INVALIDATE_ENG4_REQ__GFX09;
typedef union VM_INVALIDATE_ENG4_SEM__GFX09            regVM_INVALIDATE_ENG4_SEM__GFX09;
typedef union VM_INVALIDATE_ENG5_ACK__GFX09            regVM_INVALIDATE_ENG5_ACK__GFX09;
typedef union VM_INVALIDATE_ENG5_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG5_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG5_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG5_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG5_REQ__GFX09            regVM_INVALIDATE_ENG5_REQ__GFX09;
typedef union VM_INVALIDATE_ENG5_SEM__GFX09            regVM_INVALIDATE_ENG5_SEM__GFX09;
typedef union VM_INVALIDATE_ENG6_ACK__GFX09            regVM_INVALIDATE_ENG6_ACK__GFX09;
typedef union VM_INVALIDATE_ENG6_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG6_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG6_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG6_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG6_REQ__GFX09            regVM_INVALIDATE_ENG6_REQ__GFX09;
typedef union VM_INVALIDATE_ENG6_SEM__GFX09            regVM_INVALIDATE_ENG6_SEM__GFX09;
typedef union VM_INVALIDATE_ENG7_ACK__GFX09            regVM_INVALIDATE_ENG7_ACK__GFX09;
typedef union VM_INVALIDATE_ENG7_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG7_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG7_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG7_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG7_REQ__GFX09            regVM_INVALIDATE_ENG7_REQ__GFX09;
typedef union VM_INVALIDATE_ENG7_SEM__GFX09            regVM_INVALIDATE_ENG7_SEM__GFX09;
typedef union VM_INVALIDATE_ENG8_ACK__GFX09            regVM_INVALIDATE_ENG8_ACK__GFX09;
typedef union VM_INVALIDATE_ENG8_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG8_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG8_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG8_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG8_REQ__GFX09            regVM_INVALIDATE_ENG8_REQ__GFX09;
typedef union VM_INVALIDATE_ENG8_SEM__GFX09            regVM_INVALIDATE_ENG8_SEM__GFX09;
typedef union VM_INVALIDATE_ENG9_ACK__GFX09            regVM_INVALIDATE_ENG9_ACK__GFX09;
typedef union VM_INVALIDATE_ENG9_ADDR_RANGE_HI32__GFX09 regVM_INVALIDATE_ENG9_ADDR_RANGE_HI32__GFX09;
typedef union VM_INVALIDATE_ENG9_ADDR_RANGE_LO32__GFX09 regVM_INVALIDATE_ENG9_ADDR_RANGE_LO32__GFX09;
typedef union VM_INVALIDATE_ENG9_REQ__GFX09            regVM_INVALIDATE_ENG9_REQ__GFX09;
typedef union VM_INVALIDATE_ENG9_SEM__GFX09            regVM_INVALIDATE_ENG9_SEM__GFX09;
typedef union VM_IOMMU_CONTROL_REGISTER__GFX09         regVM_IOMMU_CONTROL_REGISTER__GFX09;
typedef union VM_IOMMU_MMIO_CNTRL_1__GFX09             regVM_IOMMU_MMIO_CNTRL_1__GFX09;
typedef union VM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER__GFX09 regVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER__GFX09;
typedef union VM_L2_BANK_SELECT_RESERVED_CID__GFX09    regVM_L2_BANK_SELECT_RESERVED_CID__GFX09;
typedef union VM_L2_BANK_SELECT_RESERVED_CID2__GFX09   regVM_L2_BANK_SELECT_RESERVED_CID2__GFX09;
typedef union VM_L2_CACHE_PARITY_CNTL__GFX09           regVM_L2_CACHE_PARITY_CNTL__GFX09;
typedef union VM_L2_CGTT_CLK_CTRL__GFX09               regVM_L2_CGTT_CLK_CTRL__GFX09;
typedef union VM_L2_CNTL__GFX09                        regVM_L2_CNTL__GFX09;
typedef union VM_L2_CNTL2__GFX09                       regVM_L2_CNTL2__GFX09;
typedef union VM_L2_CNTL3__GFX09                       regVM_L2_CNTL3__GFX09;
typedef union VM_L2_CNTL4__GFX09                       regVM_L2_CNTL4__GFX09;
typedef union VM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32__GFX09 regVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32__GFX09;
typedef union VM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32__GFX09 regVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32__GFX09;
typedef union VM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32__GFX09 regVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32__GFX09;
typedef union VM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32__GFX09 regVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32__GFX09;
typedef union VM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32__GFX09 regVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32__GFX09;
typedef union VM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32__GFX09 regVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32__GFX09;
typedef union VM_L2_MM_GROUP_RT_CLASSES__GFX09         regVM_L2_MM_GROUP_RT_CLASSES__GFX09;
typedef union VM_L2_PROTECTION_FAULT_ADDR_HI32__GFX09  regVM_L2_PROTECTION_FAULT_ADDR_HI32__GFX09;
typedef union VM_L2_PROTECTION_FAULT_ADDR_LO32__GFX09  regVM_L2_PROTECTION_FAULT_ADDR_LO32__GFX09;
typedef union VM_L2_PROTECTION_FAULT_CNTL__GFX09       regVM_L2_PROTECTION_FAULT_CNTL__GFX09;
typedef union VM_L2_PROTECTION_FAULT_CNTL2__GFX09      regVM_L2_PROTECTION_FAULT_CNTL2__GFX09;
typedef union VM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32__GFX09 regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32__GFX09;
typedef union VM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32__GFX09 regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32__GFX09;
typedef union VM_L2_PROTECTION_FAULT_MM_CNTL3__GFX09   regVM_L2_PROTECTION_FAULT_MM_CNTL3__GFX09;
typedef union VM_L2_PROTECTION_FAULT_MM_CNTL4__GFX09   regVM_L2_PROTECTION_FAULT_MM_CNTL4__GFX09;
typedef union VM_L2_PROTECTION_FAULT_STATUS__GFX09     regVM_L2_PROTECTION_FAULT_STATUS__GFX09;
typedef union VM_L2_STATUS__GFX09                      regVM_L2_STATUS__GFX09;
typedef union VM_PCIE_ATS_CNTL__GFX09                  regVM_PCIE_ATS_CNTL__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_0__GFX09             regVM_PCIE_ATS_CNTL_VF_0__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_1__GFX09             regVM_PCIE_ATS_CNTL_VF_1__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_10__GFX09            regVM_PCIE_ATS_CNTL_VF_10__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_11__GFX09            regVM_PCIE_ATS_CNTL_VF_11__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_12__GFX09            regVM_PCIE_ATS_CNTL_VF_12__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_13__GFX09            regVM_PCIE_ATS_CNTL_VF_13__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_14__GFX09            regVM_PCIE_ATS_CNTL_VF_14__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_15__GFX09            regVM_PCIE_ATS_CNTL_VF_15__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_2__GFX09             regVM_PCIE_ATS_CNTL_VF_2__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_3__GFX09             regVM_PCIE_ATS_CNTL_VF_3__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_4__GFX09             regVM_PCIE_ATS_CNTL_VF_4__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_5__GFX09             regVM_PCIE_ATS_CNTL_VF_5__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_6__GFX09             regVM_PCIE_ATS_CNTL_VF_6__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_7__GFX09             regVM_PCIE_ATS_CNTL_VF_7__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_8__GFX09             regVM_PCIE_ATS_CNTL_VF_8__GFX09;
typedef union VM_PCIE_ATS_CNTL_VF_9__GFX09             regVM_PCIE_ATS_CNTL_VF_9__GFX09;
typedef union WD_BUF_RESOURCE_1                        regWD_BUF_RESOURCE_1;
typedef union WD_BUF_RESOURCE_2                        regWD_BUF_RESOURCE_2;
typedef union WD_CNTL_SB_BUF_BASE                      regWD_CNTL_SB_BUF_BASE;
typedef union WD_CNTL_SB_BUF_BASE_HI                   regWD_CNTL_SB_BUF_BASE_HI;
typedef union WD_CNTL_STATUS                           regWD_CNTL_STATUS;
typedef union WD_DEBUG_DATA__GFX09                     regWD_DEBUG_DATA__GFX09;
typedef union WD_DEBUG_REG0__GFX09                     regWD_DEBUG_REG0__GFX09;
typedef union WD_DEBUG_REG1__GFX09                     regWD_DEBUG_REG1__GFX09;
typedef union WD_DEBUG_REG2__GFX09                     regWD_DEBUG_REG2__GFX09;
typedef union WD_DEBUG_REG3__GFX09                     regWD_DEBUG_REG3__GFX09;
typedef union WD_DEBUG_REG5__GFX09                     regWD_DEBUG_REG5__GFX09;
typedef union WD_DEBUG_REG7__GFX09                     regWD_DEBUG_REG7__GFX09;
typedef union WD_DEBUG_REG9__GFX09                     regWD_DEBUG_REG9__GFX09;
typedef union WD_ENHANCE                               regWD_ENHANCE;
typedef union WD_INDEX_BUF_BASE                        regWD_INDEX_BUF_BASE;
typedef union WD_INDEX_BUF_BASE_HI                     regWD_INDEX_BUF_BASE_HI;
typedef union WD_PERFCOUNTER0_HI__GFX09                regWD_PERFCOUNTER0_HI__GFX09;
typedef union WD_PERFCOUNTER0_LO__GFX09                regWD_PERFCOUNTER0_LO__GFX09;
typedef union WD_PERFCOUNTER0_SELECT__GFX09            regWD_PERFCOUNTER0_SELECT__GFX09;
typedef union WD_PERFCOUNTER1_HI__GFX09                regWD_PERFCOUNTER1_HI__GFX09;
typedef union WD_PERFCOUNTER1_LO__GFX09                regWD_PERFCOUNTER1_LO__GFX09;
typedef union WD_PERFCOUNTER1_SELECT__GFX09            regWD_PERFCOUNTER1_SELECT__GFX09;
typedef union WD_PERFCOUNTER2_HI__GFX09                regWD_PERFCOUNTER2_HI__GFX09;
typedef union WD_PERFCOUNTER2_LO__GFX09                regWD_PERFCOUNTER2_LO__GFX09;
typedef union WD_PERFCOUNTER2_SELECT__GFX09            regWD_PERFCOUNTER2_SELECT__GFX09;
typedef union WD_PERFCOUNTER3_HI__GFX09                regWD_PERFCOUNTER3_HI__GFX09;
typedef union WD_PERFCOUNTER3_LO__GFX09                regWD_PERFCOUNTER3_LO__GFX09;
typedef union WD_PERFCOUNTER3_SELECT__GFX09            regWD_PERFCOUNTER3_SELECT__GFX09;
typedef union WD_POS_BUF_BASE                          regWD_POS_BUF_BASE;
typedef union WD_POS_BUF_BASE_HI                       regWD_POS_BUF_BASE_HI;
typedef union WD_QOS                                   regWD_QOS;
typedef union WD_UTCL1_CNTL__GFX09                     regWD_UTCL1_CNTL__GFX09;
typedef union WD_UTCL1_STATUS                          regWD_UTCL1_STATUS;
typedef union XPB_CLG_CFG0                             regXPB_CLG_CFG0;
typedef union XPB_CLG_CFG1                             regXPB_CLG_CFG1;
typedef union XPB_CLG_CFG2                             regXPB_CLG_CFG2;
typedef union XPB_CLG_CFG3                             regXPB_CLG_CFG3;
typedef union XPB_CLG_CFG4                             regXPB_CLG_CFG4;
typedef union XPB_CLG_CFG5                             regXPB_CLG_CFG5;
typedef union XPB_CLG_CFG6                             regXPB_CLG_CFG6;
typedef union XPB_CLG_CFG7                             regXPB_CLG_CFG7;
typedef union XPB_CLG_EXTRA                            regXPB_CLG_EXTRA;
typedef union XPB_CLG_EXTRA_MSK                        regXPB_CLG_EXTRA_MSK;
typedef union XPB_CLG_EXTRA_MSK_RD                     regXPB_CLG_EXTRA_MSK_RD;
typedef union XPB_CLG_EXTRA_RD                         regXPB_CLG_EXTRA_RD;
typedef union XPB_CLG_GFX_MATCH                        regXPB_CLG_GFX_MATCH;
typedef union XPB_CLG_GFX_MATCH_MSK                    regXPB_CLG_GFX_MATCH_MSK;
typedef union XPB_CLG_GFX_UNITID_MAPPING0              regXPB_CLG_GFX_UNITID_MAPPING0;
typedef union XPB_CLG_GFX_UNITID_MAPPING1              regXPB_CLG_GFX_UNITID_MAPPING1;
typedef union XPB_CLG_GFX_UNITID_MAPPING2              regXPB_CLG_GFX_UNITID_MAPPING2;
typedef union XPB_CLG_GFX_UNITID_MAPPING3              regXPB_CLG_GFX_UNITID_MAPPING3;
typedef union XPB_CLG_GFX_UNITID_MAPPING4              regXPB_CLG_GFX_UNITID_MAPPING4;
typedef union XPB_CLG_GFX_UNITID_MAPPING5              regXPB_CLG_GFX_UNITID_MAPPING5;
typedef union XPB_CLG_GFX_UNITID_MAPPING6              regXPB_CLG_GFX_UNITID_MAPPING6;
typedef union XPB_CLG_GFX_UNITID_MAPPING7              regXPB_CLG_GFX_UNITID_MAPPING7;
typedef union XPB_CLG_MM_MATCH__GFX09                  regXPB_CLG_MM_MATCH__GFX09;
typedef union XPB_CLG_MM_MATCH_MSK                     regXPB_CLG_MM_MATCH_MSK;
typedef union XPB_CLG_MM_UNITID_MAPPING0               regXPB_CLG_MM_UNITID_MAPPING0;
typedef union XPB_CLG_MM_UNITID_MAPPING1               regXPB_CLG_MM_UNITID_MAPPING1;
typedef union XPB_CLG_MM_UNITID_MAPPING2               regXPB_CLG_MM_UNITID_MAPPING2;
typedef union XPB_CLG_MM_UNITID_MAPPING3               regXPB_CLG_MM_UNITID_MAPPING3;
typedef union XPB_CLK_GAT                              regXPB_CLK_GAT;
typedef union XPB_HST_CFG                              regXPB_HST_CFG;
typedef union XPB_INTF_CFG                             regXPB_INTF_CFG;
typedef union XPB_INTF_CFG2                            regXPB_INTF_CFG2;
typedef union XPB_INTF_STS                             regXPB_INTF_STS;
typedef union XPB_LB_ADDR                              regXPB_LB_ADDR;
typedef union XPB_MAP_INVERT_FLUSH_NUM_LSB             regXPB_MAP_INVERT_FLUSH_NUM_LSB;
typedef union XPB_MISC_CFG                             regXPB_MISC_CFG;
typedef union XPB_P2P_BAR0                             regXPB_P2P_BAR0;
typedef union XPB_P2P_BAR1                             regXPB_P2P_BAR1;
typedef union XPB_P2P_BAR2                             regXPB_P2P_BAR2;
typedef union XPB_P2P_BAR3                             regXPB_P2P_BAR3;
typedef union XPB_P2P_BAR4                             regXPB_P2P_BAR4;
typedef union XPB_P2P_BAR5                             regXPB_P2P_BAR5;
typedef union XPB_P2P_BAR6                             regXPB_P2P_BAR6;
typedef union XPB_P2P_BAR7                             regXPB_P2P_BAR7;
typedef union XPB_P2P_BAR_CFG                          regXPB_P2P_BAR_CFG;
typedef union XPB_P2P_BAR_DEBUG                        regXPB_P2P_BAR_DEBUG;
typedef union XPB_P2P_BAR_DELTA_ABOVE                  regXPB_P2P_BAR_DELTA_ABOVE;
typedef union XPB_P2P_BAR_DELTA_BELOW                  regXPB_P2P_BAR_DELTA_BELOW;
typedef union XPB_P2P_BAR_SETUP                        regXPB_P2P_BAR_SETUP;
typedef union XPB_PEER_SYS_BAR0                        regXPB_PEER_SYS_BAR0;
typedef union XPB_PEER_SYS_BAR1                        regXPB_PEER_SYS_BAR1;
typedef union XPB_PEER_SYS_BAR2                        regXPB_PEER_SYS_BAR2;
typedef union XPB_PEER_SYS_BAR3                        regXPB_PEER_SYS_BAR3;
typedef union XPB_PEER_SYS_BAR4                        regXPB_PEER_SYS_BAR4;
typedef union XPB_PEER_SYS_BAR5                        regXPB_PEER_SYS_BAR5;
typedef union XPB_PEER_SYS_BAR6                        regXPB_PEER_SYS_BAR6;
typedef union XPB_PEER_SYS_BAR7                        regXPB_PEER_SYS_BAR7;
typedef union XPB_PEER_SYS_BAR8                        regXPB_PEER_SYS_BAR8;
typedef union XPB_PEER_SYS_BAR9                        regXPB_PEER_SYS_BAR9;
typedef union XPB_PERF_KNOBS                           regXPB_PERF_KNOBS;
typedef union XPB_PIPE_STS                             regXPB_PIPE_STS;
typedef union XPB_RTR_DEST_MAP0                        regXPB_RTR_DEST_MAP0;
typedef union XPB_RTR_DEST_MAP1                        regXPB_RTR_DEST_MAP1;
typedef union XPB_RTR_DEST_MAP2                        regXPB_RTR_DEST_MAP2;
typedef union XPB_RTR_DEST_MAP3                        regXPB_RTR_DEST_MAP3;
typedef union XPB_RTR_DEST_MAP4                        regXPB_RTR_DEST_MAP4;
typedef union XPB_RTR_DEST_MAP5                        regXPB_RTR_DEST_MAP5;
typedef union XPB_RTR_DEST_MAP6                        regXPB_RTR_DEST_MAP6;
typedef union XPB_RTR_DEST_MAP7                        regXPB_RTR_DEST_MAP7;
typedef union XPB_RTR_DEST_MAP8                        regXPB_RTR_DEST_MAP8;
typedef union XPB_RTR_DEST_MAP9                        regXPB_RTR_DEST_MAP9;
typedef union XPB_RTR_SRC_APRTR0                       regXPB_RTR_SRC_APRTR0;
typedef union XPB_RTR_SRC_APRTR1                       regXPB_RTR_SRC_APRTR1;
typedef union XPB_RTR_SRC_APRTR2                       regXPB_RTR_SRC_APRTR2;
typedef union XPB_RTR_SRC_APRTR3                       regXPB_RTR_SRC_APRTR3;
typedef union XPB_RTR_SRC_APRTR4                       regXPB_RTR_SRC_APRTR4;
typedef union XPB_RTR_SRC_APRTR5                       regXPB_RTR_SRC_APRTR5;
typedef union XPB_RTR_SRC_APRTR6                       regXPB_RTR_SRC_APRTR6;
typedef union XPB_RTR_SRC_APRTR7                       regXPB_RTR_SRC_APRTR7;
typedef union XPB_RTR_SRC_APRTR8                       regXPB_RTR_SRC_APRTR8;
typedef union XPB_RTR_SRC_APRTR9                       regXPB_RTR_SRC_APRTR9;
typedef union XPB_STICKY                               regXPB_STICKY;
typedef union XPB_STICKY_W1C                           regXPB_STICKY_W1C;
typedef union XPB_SUB_CTRL                             regXPB_SUB_CTRL;
typedef union XPB_WCB_STS                              regXPB_WCB_STS;
typedef union XPB_XDMA_PEER_SYS_BAR0                   regXPB_XDMA_PEER_SYS_BAR0;
typedef union XPB_XDMA_PEER_SYS_BAR1                   regXPB_XDMA_PEER_SYS_BAR1;
typedef union XPB_XDMA_PEER_SYS_BAR2                   regXPB_XDMA_PEER_SYS_BAR2;
typedef union XPB_XDMA_PEER_SYS_BAR3                   regXPB_XDMA_PEER_SYS_BAR3;
typedef union XPB_XDMA_RTR_DEST_MAP0                   regXPB_XDMA_RTR_DEST_MAP0;
typedef union XPB_XDMA_RTR_DEST_MAP1                   regXPB_XDMA_RTR_DEST_MAP1;
typedef union XPB_XDMA_RTR_DEST_MAP2                   regXPB_XDMA_RTR_DEST_MAP2;
typedef union XPB_XDMA_RTR_DEST_MAP3                   regXPB_XDMA_RTR_DEST_MAP3;
typedef union XPB_XDMA_RTR_SRC_APRTR0                  regXPB_XDMA_RTR_SRC_APRTR0;
typedef union XPB_XDMA_RTR_SRC_APRTR1                  regXPB_XDMA_RTR_SRC_APRTR1;
typedef union XPB_XDMA_RTR_SRC_APRTR2                  regXPB_XDMA_RTR_SRC_APRTR2;
typedef union XPB_XDMA_RTR_SRC_APRTR3                  regXPB_XDMA_RTR_SRC_APRTR3;
typedef union port_a_addr                              regport_a_addr;
typedef union port_a_data_hi                           regport_a_data_hi;
typedef union port_a_data_lo                           regport_a_data_lo;
typedef union port_b_addr                              regport_b_addr;
typedef union port_b_data_hi                           regport_b_data_hi;
typedef union port_b_data_lo                           regport_b_data_lo;
typedef union port_c_addr                              regport_c_addr;
typedef union port_c_data_hi                           regport_c_data_hi;
typedef union port_c_data_lo                           regport_c_data_lo;
typedef union port_d_addr                              regport_d_addr;
typedef union port_d_data_hi                           regport_d_data_hi;
typedef union port_d_data_lo                           regport_d_data_lo;
